CN108650643B

CN108650643B - Method for effectively reducing signaling response time in DMR/MPT terminal equipment

Info

Publication number: CN108650643B
Application number: CN201810442821.9A
Authority: CN
Inventors: 杨宏; 宋洋军; 姚忠邦; 付文良
Original assignee: Fujian Kirisun Communications Co ltd
Current assignee: Fujian Kirisun Communications Co ltd
Priority date: 2018-05-10
Filing date: 2018-05-10
Publication date: 2021-06-15
Anticipated expiration: 2038-05-10
Also published as: CN108650643A

Abstract

The invention discloses a method for effectively reducing the signaling response time in DMR/MPT terminal equipment. The invention takes the short message sending as an example for explanation, and comprises the following steps: after RQC is sent by the terminal, effective information bits of local AHYC are constructed according to the received base station information in the registration process, and a first packet MSK modulation signal is generated according to the effective information bits; calculating the Euclidean distance between the data in the receiving buffer area and the pre-constructed effective information bits of the AHYC; and if the Euclidean distance is smaller than the preset threshold value, the terminal does not receive the rest 16-bit check bits at the moment, the terminal is switched into a transmitting state from receiving, the first packet of data is transmitted immediately, and the subsequent processes are processed continuously. The invention utilizes the common CPU with low performance and low cost to simultaneously process the received information once every 20ms in the DMR digital system and the MPT1327 analog trunking signaling system, and reduces the time for responding the downlink signaling of the base station in the MPT1327 system, thereby meeting the time sequence requirement of a time sequence Aloha mechanism in the MPT1327 analog trunking signaling system.

Description

Method for effectively reducing signaling response time in DMR/MPT terminal equipment

Technical Field

The invention relates to the technical field of DMR/MPT terminal equipment, in particular to a method for effectively reducing the signaling response time in the DMR/MPT terminal equipment.

Background

At present, many countries in the world still use the MPT1327 analog cluster system, the system is mature and stable, and basically meets the requirements of users on voice and low-speed data services, particularly in european countries, but also in vast client groups, and many places still use the MPT1327 system in China. Meanwhile, "analog to digital" is a necessity for the development of the professional mobile communication industry, and the DMR digital technology system has become an industry standard of the professional mobile communication technology. Under the background, the DMR digital walkie-talkie developed by each manufacturer needs to be compatible with the original analog walkie-talkie, and a hardware circuit block diagram of the DMR/MPT terminal is shown in fig. 1 and includes modules such as a CPU, a receiver/transmitter, a codec, a display screen, keys, an antenna, a power supply, and the like.

At present, the widely adopted method is to adopt a special chip or a CPU with strong performance to realize digital-analog compatibility, but the scheme causes high cost of the whole product and is not suitable for occasions needing low-cost application. When a powerful CPU is used, for a DMR digital system, a 20ms period can be used to process DMR digital voice and analog voice because the voice frame length is 20ms, but in an MPT1327 system, due to the requirement of a timeslot Aloha technical system (a fixed Aloha timeslot is 128 bits and is about 106.67ms), it is difficult to use a 20ms periodic processing sequence, and generally a 5ms or shorter period is used as a period for processing one-time signaling, which requires the CPU to have a higher main frequency, so that it needs higher power consumption and cost to complete multiple operations such as MSK demodulation, signaling analysis, signaling framing and the like in the MPT1327 system in a 5ms or shorter time, which is difficult to implement in a low-cost CPU system with general performance.

The existing scheme of adopting a high-performance CPU to be compatible with signaling of a digital DMR system and an MPT1327 system is high in cost, a 20ms voice frame period is adopted in the DMR system to process analog voice, and in the analog MPT1327 system, in order to meet the time sequence requirement of a time slot Aloha and improve the response speed, a time slice of 5ms or shorter is required, so that the complexity of software is increased.

Disclosure of Invention

Aiming at the defects in the prior art, the technical problem to be solved by the invention is to provide a method for effectively reducing the signaling response time in DMR/MPT terminal equipment so as to solve the problems of cost and software complexity in the prior art.

The technical scheme adopted by the invention for realizing the purpose is as follows: a method for effectively reducing the signaling response time in DMR/MPT terminal equipment is characterized by comprising the following steps:

after RQC is sent by the terminal, the effective information bit of local AHYC is constructed according to the information such as the system code of the base station received in the registration process, and a first packet MSK modulation signal is generated according to the effective information bit;

calculating the Euclidean distance between the buffer data and the pre-constructed effective information bits of the AHYC;

and if the Euclidean distance is smaller than the preset threshold value, the terminal does not continuously receive the check bit of the AHYC and is switched from the receiving state to the transmitting state.

The further improvement is that: the information such as the system code of the base station comprises a local prefix code (PFIX), a local address (IDENT2), a destination address (IDENT1), a time slot occupied by a short message (SLOTS), a short message description code (DESC), CAT, TYPE and FUNC.

The further improvement is that: the effective information bits of the local AHYC are constructed according to the MPT1327 standard protocol.

The further improvement is that: the AHYC signaling is 48 bits of information bits and 16 bits of check bits.

The further improvement is that: and in the process of demodulating the MSK modulation signal, calculating the Euclidean distance between the data in the buffer area and the pre-constructed AHYC every time 1 bit is demodulated.

The further improvement is that: the part of the MSK modulation signal corresponding to the preamble and the synchronous word is generated in advance by the terminal and stored in the memory.

The invention has the following advantages and beneficial effects:

1. the invention provides a method for processing received information once every 20ms in a signaling system compatible with a DMR digital system and an MPT1327 analog system by utilizing a general-performance low-cost CPU, and provides a method for reducing downlink signaling time of a terminal response base station in the MPT1327 system, thereby meeting the time sequence requirement of a time slot Aloha mechanism in the MPT1327 analog cluster signaling system.

2. The invention reduces the software complexity in the DMR/MPT software, reduces the requirement on the computing capability of the CPU in the DMR/MPT software, can simultaneously be compatible with a DMR and MPT analog cluster technical system on the basis of adopting 20ms of periodic processing data, thereby adopting the CPU with general performance, and effectively reducing the equipment cost.

3. The invention reduces the requirement of the dual-mode terminal equipment on the locking speed of the hardware phase-locked loop.

Drawings

FIG. 1 is a hardware block diagram of a DMR/MPT terminal;

fig. 2 is a timing diagram of MPT1327 signaling;

FIG. 3 is a timing diagram of short message transmission;

FIG. 4 is a flow chart of the present invention.

Detailed Description

The present invention will be described in further detail with reference to the accompanying drawings and examples.

As shown in fig. 2, there is a strict timing requirement in the MPT1327 system (in the system, MSK digital modulation is used for signaling, the rate is 1200bps, and analog FM modulation is used for voice). In order to meet the requirement and simultaneously be compatible with an information processing mode of 20ms one period of voice information in a DMR digital system, we need to perform some advanced processing on an MPT1327 signaling in CPU software adopted by a DMR/analog dual-mode device product, otherwise it will be difficult to meet the time sequence requirement of a timeslot Aloha, as shown in fig. 3. Such as: in the short message service, after the terminal requests RQC (short Data transmission request) signaling to be successfully transmitted, the base station issues AHYC (short Data transmission invitation) signaling, and then the terminal must transmit Data/Head information in a time slot subsequent to the reception of the AHYC frame, otherwise the requirement of the MPT1327 signaling system on the time slot Aloha is violated. In the following, we will use the example that the terminal responds to the downlink AHYC signaling of the base station in time in the process of sending the short message.

Fig. 2 is a MPT1327 signaling timing diagram. The interval T0 to T0 is one standard slot (128 bits, 106.7 ms). The downlink signaling of the system control channel is sent periodically by taking a time slot as a periodicity. The AHYC referred to in this invention is the address codeword. Taking short message as an example, after RQC (short message sending request) is sent by the terminal, the system issues AHYC (short message sending invitation) to invite the terminal to send the message content. The terminal transmits data between the immediately following T3-T5 after resolving the AHYC. The invention aims to save time for resolving AHYC, thereby sending short message content between T3-T5 specified by the system.

According to the MPT technical standard, AHYC signaling has 64 bits in total, where: contains 48-bit valid information bits and 16-bit check bits, while in a CPU with general performance, when processing MPT1327 signaling, the CRC check value in the signaling codeword is processed in a "hard decoding" manner, which means that the CRC check value is only used to calculate whether the received signaling bits are correct and not to correct errors. According to the MPT1327 standard, the CRC check value can check all odd bit errors, any 5 random bit errors, and any burst bit errors up to 16 bits in length.

As mentioned above, since the DMR digital system generally uses an information processing method with a period of 20ms, in order to reduce the software complexity, we generally use an information processing method with a period of 20ms in the software branch of the MPT1327, in this case, each time the information processing process of 20ms is performed, MSK signaling information with 24 bits is generated, and then the CPU determines whether the buffer has complete AHYC (64-bit) signaling.

As shown in fig. 4, in order to improve the way of the terminal responding to the downlink AHYC signaling of the base station, the invention adopts a way of "constructing prior information in advance" to solve the problem, that is: RQC, according to the received base station system code information in the registration process, the terminal will construct 48 bits of local AHYC and generate MSK modulation signal, then, in the 20ms period information processing process, every time 1 bit is demodulated, the Euclidean distance between the buffer Data and the 48 bits of the pre-constructed AHYC (i.e. the code weight of bit XOR value) will be calculated, if the distance is small enough, for example, less than or equal to 1, the terminal will regard "successfully received base station downlink AHYC" without receiving and judging the subsequent 16 bit check bit, then the terminal will start to switch from "receiving to transmitting" state, the timer waits for the arrival of Head/Data time, meanwhile, because the lead code and the synchronous word are fixed in advance, the terminal can generate the lead code and the MSK modulation signal waveform of the synchronous word in advance to be stored in the memory, therefore, the speed of the terminal responding to the AHYC signaling of the base station is greatly advanced by two technical measures of quickly matching the received demodulation bits with the locally pre-calculated AHYC and quickly calling the MSK modulation waveforms of the lead code and the synchronous word which are generated in advance.

In the above technical measures, for the missed detection rate of AHYC, the probability is 0, and the false detection rate probability is estimated as follows:

if the bit error rate that the system can tolerate is 5%, then the bit error rate of 48 bits is about 2.4 bits, and if 3 bit errors are allowed at most, then the false detection rate is about (1/48) × (1/48) + (2/48) × (1/48) ^2+ (3/48) ^ (1/48) ^3 is 0.05%, and it is acceptable to see that the false detection rate is small enough. Therefore, the above method is theoretically possible.

It can be seen that, with the above method, for the reception of the terminal, it can be determined at least in advance by a time of 13.3ms for 16 bits/1200 bps whether the AHYC signaling sent by the base station has been correctly received; for the transmission of the terminal, because the transmission is often performed by adopting a digital baseband forming method, a large amount of operations and memory copy operations are involved, the time required for the transmission is not small, and the time required for preparation before the transmission can be greatly saved by constructing the preamble and the synchronization word locally in advance, so that the time for the terminal to respond to the downlink AHYC of the base station is effectively reduced by the measures in the two aspects. Therefore, the digital DMR and the analog MPT1327 modes can be compatible by a CPU with general performance, so that the cost is reduced, and the software complexity is reduced.

As shown in fig. 3, taking the short message transmission timing as an example, the original 20ms decoding method is adopted. After the terminal sends RQC request, the system finishes sending 64-bit AHYC at time t11, the terminal decodes the next 20ms, and assuming that AHYC is resolved at time t12, the time t _ find _ AHYC required for decoding is (23-m)/1.2. In the worst case, the terminal can resolve the AHYC after 19.16 ms. The terminal reception transmission time t _ rx2tx is approximately 10ms, and the time t _ encode _24bit to modulate a packet of 20ms (24 bits) data requires approximately 10.5 ms. The terminal determines the total time t _ total from parsing AHYC to transmitting DATA + HEAD to t _ find _ AHYC + t _ rx2tx + t _ encode _24bit to 39.66ms (maximum time). Whereas the MPT1327 standard protocol specifies that the terminal upstream time T must be between T3(24.16ms) and T5(35 ms). The 20ms decoding approach is difficult to meet the timing requirements of the MPT1327 protocol.

Claims

1. A method for effectively reducing the signaling response time in DMR/MPT terminal equipment is characterized by comprising the following steps:

after the terminal sends a short data sending request RQC, firstly constructing a 48-bit effective information bit of local AHYC according to the received base station system code information in the registration process; generating a first packet MSK modulation signal of the lead code and the synchronous word according to the lead code and the synchronous word which are fixed in advance by the terminal and storing the first packet MSK modulation signal in a memory;

calculating the Euclidean distance between the buffer data and the 48-bit effective information bit of the local AHYC;

and if the Euclidean distance is smaller than the preset threshold value, the terminal does not continuously receive the short data and sends the check bit requiring AHYC, and the receiving state is switched into the transmitting state.

2. The method of claim 1, wherein the base station system code information includes a local prefix code (PFIX), a local address (IDENT2), a destination address (IDENT1), a slot occupied by the short message (SLOTS), a short message description code (DESC), CAT, TYPE, and FUNC.

3. The method of claim 1, wherein the valid information bits of the local AHYC are constructed according to MPT1327 standard protocol.

4. The method of claim 1, wherein the portion of the first MSK-modulated signal corresponding to the preamble and the sync word is pre-generated by the terminal and stored in a memory.