CN108599761B - 一种宽带信号源 - Google Patents
一种宽带信号源 Download PDFInfo
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- H03B5/1841—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising distributed inductance and capacitance the frequency-determining element being a strip line resonator
- H03B5/1847—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising distributed inductance and capacitance the frequency-determining element being a strip line resonator the active element in the amplifier being a semiconductor device
- H03B5/1852—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising distributed inductance and capacitance the frequency-determining element being a strip line resonator the active element in the amplifier being a semiconductor device the semiconductor device being a field-effect device
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Abstract
本发明的公开了一种宽带信号源。所述宽带信号源包括压控振荡器(VCO)、第一缓冲器和可编程的频率扩展器。所述VCO输出频率调谐比至少为N:1的信号,其中N为大于1的整数或非整数。所述频率扩展器通过缓冲器接收信号以产生最终输出信号,所述最终输出信号具有比VCO输出信号更宽的频带。所述缓冲器将最终输出信号与VCO隔离以使得VCO稳定运行。所述频率扩展器包括至少一个分频比为1/N分频器,该分频比与信号的频率调谐比N:1相匹配,以使得最终输出信号具有比VCO输出信号的频带更宽的无间隙频带。
Description
技术领域
本发明涉及一种宽带信号源,具体涉及一种低噪声宽带信号源。
背景技术
宽带信号源被广泛地用于各种电子应用中。在理想情况下,宽带信号源拥有覆盖从近乎直流到高频的连续信号输出。此外,信号源通常要求低带内噪声和杂散。产生具有低带内噪声的宽带信号非常具有挑战性。迄今为止虽然已作出各种努力以探索宽带信号源,但由于存在带内噪声,将宽带压控振荡器(特别是调谐比≥2:1)和可编程分频器集成到单个芯片以实现紧凑封装极具挑战性。
因此,需要一种方法和***以产生低噪声的宽带信号源。
发明内容
本发明涉及一种用于产生具有降低的噪声的宽带信号源的方法和***。
在部分实施例中,本发明提供一种宽带信号源,所述宽带信号源包括压控振荡器(VCO)、第一缓冲器和可编程的频率扩展器。在实施例中,VCO输出频率范围从Fmin至Fmax的信号,该信号的频率调谐比(定义为Fmax:Fmin)至少为N:1,N为大于1的整数或非整数。所述频率扩展器通过第一缓冲器接收该信号以产生频带更宽的最终输出信号。所述第一缓冲器将最终输出信号与VCO隔离,避免最终输出信号干扰VCO以使得VCO稳定运行。所述频率扩展器包括n个分频器(n为整数,n≥1)。每个分频器具有与VCO输出信号的频率调谐比N:1相匹配的分频比1/N,以使得最终输出信号具有覆盖的无间隙频带,该无间隙频带比原始的VCO输出信号的频率范围更宽。例如,对于带宽为8-16GHz的信号(频率调谐比为2:1),频率扩展器能够通过采用三个串联的分频比为1/2的分频器产生具有1-16GHz无间隙带宽的最终输出信号。
在部分实施例中,可编程的频率扩展器包括第一放大器A1、第二缓冲器、分频器模块、多路选择器、第二放大器A2、第一解码器和第二解码器。所述第一放大器连接第一缓冲器以产生第一输出信号(OUT1)。所述分频器模块经由第二缓冲器与第一缓冲器连接,所述第二缓冲器用于将OUT2、分频器模块的输出信号与VCO、OUT1隔离,避免干扰VCO和OUT1。分频器模块可以包括多个串联的分频器。每个分频器根据第二解码器的信号输出可以被使能或不使能。所述多路选择器用于接收第二缓冲器的输出信号(作为基础信号)和各分频器的输出信号,并基于多路选择器接收到的所有输入信号的进行选择,产生多路选择器输出信号。所述选择过程可由第一解码器的输出信号确定。第一解码器和第二解码器可接收相同的输入信号以协作多路选择器,共同控制分频器模块内的分频器。多路选择器输出信号被馈送至第二放大器以产生第二输出信号OUT2。宽带信号源的最终输出信号可以是第一输出信号(OUT1)、第二输出信号OUT2、或两者的组合。
在部分实施例中,第二输出信号OUT2被馈送至频率扩展器外部的分频器(该分频器的分频比为1/Ne)以产生分频输出信号。Ne为大于1的数字,且Ne可能与N相同,也可能不相同。鉴频鉴相器/电荷泵(PFD/CP)模块检测分频输出信号和参考时钟信号之间的相位差和频率差,并输出电压或电流脉冲信号,所述脉冲信号通过环路滤波器(该环路滤波器可以是低通滤波器)以斜升或斜降电压信号(Vt)。所述电压信号驱动VCO增加或降低输出频率。上述配置确保宽带信号源可被实现为宽带锁相式信号源。
本领域技术人员应当认识到,宽带VCO可以被配置为多种不同的形式,本领域技术人员还应当认识到,宽带VCO可以以多种配置方式连接至频率扩展器,并且这些配置方式均可产生宽带信号源,那么这些配置方式应当落入本发明的保护范围中。
附图说明
附图中示出了本发明的示例性实施例以供参考,附图的作用在于说明而非限制本发明。虽然本发明大致记载于实施例中,但如此做的目的不是将本发明的保护范围限制为所描述实施例的具体技术特征。
图1为本发明实施例1中的宽带信号源的框图。
图2为本发明实施例1中的宽带信号源的示意图。
图3为本发明实施例2中的宽带信号源的示意图。
图4为本发明实施例3中的用于宽带信号源应用的宽带VCO的示意图。
图5为本发明实施例4中的用于宽带信号源应用的宽带VCO的示意图。
本领域技术人员将认识到,根据说明书能够实施本发明的多种实施方式和实施例。所有这些实施方式和实施例均应包含在本发明的保护范围之内。
具体实施方式
在下文的描述中,为了解释本发明,将陈述本发明的具体细节以方便理解,但本发明可能不通过部分或者全部所述的具体细节亦可实施。下文所述的本发明的实施例可能被包含在许多不同的电气组件、电路、设备和***中。附图的电路框图中所示的***和设备用以说明本发明的示例性实施例,并且不作为用于模糊本发明宽泛指导的托辞。附图中所示的元件之间的连接关系不限于直接连接,而是能够被修改、重构或者通过中间组件来改变的。
在下文的描述中,为了解释本发明,将陈述本发明的具体细节以方便理解,但本发明可能不通过部分或者全部所述的具体细节亦可实施。下文所述的本发明的实施例可能被包含在许多不同的电气组件、电路、设备和***中。附图的电路框图中所示的***和设备用以说明本发明的示例性实施例,并且不作为用于模糊本发明宽泛指导的托辞。附图中所示的元件之间的连接关系不限于直接连接,而是能够被修改、重构或者通过中间组件来改变的。
【实施例1】
图1是本实施例的宽带信号源的框图。所述宽带信号源100包括压控振荡器(VCO)110、第一缓冲器120和可编程的频率扩展器130。在实施例中,VCO 110是双推式VCO或者差分式VCO,其输出具有介于最小频率(Fmin)与最大频率(Fmax)之间的频率范围的输出信号112,并由Fmax:Fmin定义信号的频率调谐比至少为N:1,例如,频率范围为8-16GHz时,N=2。所述输出信号112可以是差分信号或单端信号,优选地,输出信号112为差分信号,因为差分信号本身能够抑制偶模噪声。频率扩展器130通过第一缓冲器120接收输出信号112以产生频带较输出信号112更宽的最终输出信号132。所述第一缓冲器120将最终输出信号132与VCO110隔离,避免最终输出信号干扰VCO以使得VCO得以稳定运行。频率扩展器130包括n级(n≥1)1/N分频器,所述分频器的分频比1/N与输出信号112的频率调谐比N:1相匹配,以使得最终输出信号132具有覆盖的更宽的无间隙频带。其中,N可以是大于1的整数或者非整数。例如,对于带宽为8-16GHz的输出信号112(频率调谐比为2:1),频率扩展器130能够通过采用三个串联的1/2分频器产生具有1-16GHz的无间隙带宽的最终输出信号132。
图2为实施例1的宽带信号源的示意图。如图2所示,所述可编程的频率扩展器130包括第一放大器A1 134、第二缓冲器138、分频器模块140、多路选择器150、第二放大器A2160、第一解码器170和第二解码器180。所述第一放大器134连接至第一缓冲器120以产生第一输出信号(OUT1)136。所述分频器模块140经由第二缓冲器138与第一缓冲器120连接,所述第二缓冲器138用于将OUT2、分频器模块140的输出信号与VCO和OUT1隔离,避免干扰VCO和OUT1。在实施例中,分频器模块140包括多个串联的分频器(例如如图2所示的第一分频器142、第二分频器144和第三分频器146)。每个分频器根据第二解码器180的信号输出182可以被使能或不使能,所述第二解码器180可以包括多个信道,例如如图2所示的pd0、pd1和pd2。所述多路选择器150用于接收第二缓冲器138的输出信号(作为基础信号)和各分频器的输出信号,并基于多路选择器所接收到的所有输入信号选择产生多路选择器输出信号152。所述选择过程可以由第一解码器170的输出信号172确定。在实施例中,输出信号172可以包括多个信道,例如图2所示的sa、sb、sc、sd。所述第一解码器170和第二解码器180可以接收相同的输入信号以协作多路选择器150共同控制分频器模块140内的分频器。多路选择器输出信号152被馈送至第二放大器160以产生第二输出信号OUT2 162。本领域技术人员应当理解,最终输出信号132可以是第一输出信号(OUT1)136、第二输出信号(OUT2)162、或者两者的组合。
在本实施例中,第一解码器170为2-4解码器,该2-4解码器的两个输入端S0和S1用于输入逻辑选择信号,2-4解码器的四个输出端sa、sb、sc和sd分别连接至多路选择器四个逻辑触发输入端。第二解码器180产生控制三个分频器142、144和146的开(ON)或关(OFF)状态的逻辑控制信号pd0、pd1和pd2。
表1和表2是用于实现可编程的频率扩展器130的控制的示例性逻辑控制真值表。OUT2列中的“选择/1”对应于仅选择第二缓冲器138的输出信号(基础信号,a和na一对)以产生第二输出信号OUT2 162的情况,进行该选择时,所有的分频器不使能。OUT2列中的“选择/2”对应于仅选择第一分频器142(频带除以2)的输出信号(b和nb一对)以产生第二输出信号OUT2 162的情况,在该选择中第二分频器144和第三分频器146不使能。OUT2列中的“选择/4”对应于仅选择第二分频器144(频带除以4)的输出信号(c和nc一对)以产生第二输出信号OUT2 162的情况,在该选择中第三分频器146不使能。OUT2列中的“选择/8”对应于仅选择第三分频器146(频带除以8)的输出信号(d和nd一对)以产生第二输出信号OUT2 162的情况,在该选择中所有的分频器均使能。
表1展示了本实施例的逻辑控制真值表,该逻辑控制真值表将输入端S0、S1处的输入逻辑控制信号与输出端口OUT2处对应的输出信号相关联:
表1——输出端S0、S1处的输入逻辑控制信号和输出端OUT2处对应的输出信号的真值表。
S1 | S0 | sa | sb | sc | sd | OUT2 |
0 | 0 | 1 | 0 | 0 | 0 | 选择/1 |
0 | 1 | 0 | 1 | 0 | 0 | 选择/2 |
1 | 0 | 0 | 0 | 1 | 0 | 选择/4 |
1 | 1 | 0 | 0 | 0 | 1 | 选择/8 |
表2展示了本实施例的逻辑控制真值表,该逻辑控制真值表将输入端S0、S1处的输入控制信号与分频器的开(ON)或关(OFF)状态相关联。
表2——输出端S0、S1处的输入控制信号和对应的分频器的ON或OFF状态的真值表。
S1 | S0 | pd0 | pd1 | pd2 | OUT2 |
0 | 0 | 1 | 1 | 1 | 选择/1 |
0 | 1 | 0 | 1 | 1 | 选择/2 |
1 | 0 | 0 | 0 | 1 | 选择/4 |
1 | 1 | 0 | 0 | 0 | 选择/8 |
尽管图2中示出了第二缓冲器138串联至第一缓冲器120,但本领域技术人员应当理解多个缓冲器也可以并联配置,例如,第二缓冲器138直接连接VCO接收VCO输出信号112,这类变化仍然应当落入本发明的保护范围中。
使用时,当选择第一输出信号OUT1 136作为最终信号输出,并且不需要次谐波(/2、/4或/8部分)时,可以将输入至第一解码器和第二解码器的输入信号(S0或S1)设置为0,以使得分频器模块140不使能,确保分频信号不会泄漏至第一输出信号OUT1 136中。在一个操作示例中,当VCO120输出的输出信号112具有8-16GHz的带宽时,宽带信号源200能够输出具有1-16GHz无间隙带宽的信号,这种实施方式极大地增强了宽带信号源的稳定性。
在本实施例中,可以通过控制引脚pd或者通过单独VCC偏压节点导通/关断第一放大器134。不仅如此,第一放大器134可以是倍频器,以使得第一输出信号(OUT1)136的频带为VCO输出的输出信号112的频带的两倍。
【实施例2】
图3示出了实施例2的宽带信号源300。图3中,第二输出信号OUT2 162被馈送至频率扩展器外部的分频器(1/Ne)310以产生分频输出信号312。分频器(1/Ne)310的分频比可以与分频器模块140中的各分频器(142、144和146)相同,也可以不同。鉴频鉴相器(PFD)模块312检测分频输出信号312和参考时钟信号之间的相位差和频率差,并输出电压脉冲信号322,所述电压脉冲信号322通过环路滤波器330(可以是低通滤波器)以斜升或斜降电压信号(Vt)332。在实施例中,鉴频鉴相器(PFD)模块312还可包括电荷泵(CP),以基于检测到的相位差向环路滤波器330输出正脉冲电流和/或负电流脉冲。所述电压信号Vt 332驱动VCO增加或降低输出频率。上述配置确保了宽带信号源300可被实现为宽带锁相式信号源。
本领域技术人员应当理解,图1至图3中所示的VCO可以是在单一状态下通过控制单个Vt具有能够达到2:1的频率调谐比,也可以是具有多个状态的多频带VCO,且各状态均覆盖一部分输出频率以实现总体的频率调谐比为2:1。
【实施例3】
图4为本发明用于宽带信号源应用的宽带VCO 400的示意图。所述VCO 400可以是双推式VCO或者差分式VCO,所述VCO 400包括实施为平衡结构的两个单端VCO 410和420。所述单端VCO 410和420沿虚拟地(或者实地)以对称平衡的结构连接。如图4所示,单端VCO410包括电感-电容(LC)谐振器412和负阻电路414。由于存在内阻或者其他损耗,LC谐振器412中的振荡可能被衰减或衰退至零。所述负阻电路414连接LC谐振器412以消除LC谐振器412的正阻抗,从而有效地产生无损耗的LC谐振器412以在LC谐振器412的谐振频率处保持连续振荡。在一个或多个实施例中,所述负阻电路414包括NPN晶体管Q1、电容C3、电容C4、电阻R3和电感L5。所述电容C4连接在NPN晶体管Q1的基极和发射极之间。NPN晶体管Q1的基极经由DC隔离电容Cb连接至LC谐振器412以阻断从NPN晶体管Q1泄漏至LC谐振器412中的DC偏置电压。NPN晶体管Q1的集电极连接外部电源VCC。NPN晶体管Q1的发射极经由电阻R3和电感L5接地。LC谐振器412连接NPN晶体管Q1的基极。在部分实施例中,所述负阻电路414可以被视为包括了NPN晶体管Q1、电容C3和电容C4的分压器。电容C3两端的电压提供电压反馈,且电感L5为NPN晶体管Q1提供负反馈。
在一个或多个实施例中,LC谐振器412包括串联的电感L1、电感L2和电容C1,所述电感L1、电感L2和电容C1中至少有一个是可变的以使得谐振频率可调。在实施例中,电容C1(以及对称的VCO420中的电容C1’)可以是超突变变容二极管,以提供,例如,具有大于2:1的频率调谐比的连续宽频率调谐范围。Cb可以用作DC隔离电容以阻断NPN晶体管Q1的DC偏置电压泄漏至LC谐振器412。Cb的取值同样影响VCO整体的谐振频率。电容Cb、电容C3和电容C4可以是固定电容器、开关电容器、或者两者的任意组合。若电容Cb、电容C3和电容C4中的一个或多个为电容值可调的开关电容器,则LC谐振器412的频率调谐范围可以进一步扩展。
任何X和X’元件或节点均沿虚拟地对称。例如,对称节点a/a’、b/b’、c/c’、d/d’、e/e’、f/f’、和/或g/g’可以是被用于VCO差分输出的位置。
【实施例4】
图5是本发明的另一种用于宽带信号源应用的宽带VCO 500的示意图。所述宽带VCO500可以是双推式VCO或者差分式VCO,其结构与图4所示实施例中的宽带VCO 400类似,但仍具有一些差别。首先,宽带VCO 500采用超突变变容二极管502和504作为谐振器的一部分。超突变结提供C-V曲线,该C-V曲线在至少一些特征上呈反平方定律曲线。相比于常规的突变变容二极管,超突变变容二极管对于给定的电压变化能够提供更大的电容变化。超突变变容二极管Var1 502和Var1’504相互连接以在电压控制端510接收同一控制电压Vt并提供具有,例如,频率调谐比至少为2:1的连续宽频率调谐范围。
在部分实施例中,超突变变容二极管Var1 502和Var1’504可以与宽带VCO 500的其余部分集成在一个芯片上。在部分实施例中,所述宽带VCO,不包含超突变变容二极管Var1 502和Var1’504,但包含电压控制端510,集成在一个宽带VCO芯片520上(虚线框520)。在部分实施例中,超突变变容二极管Var1 502和Var1’504可以是分立元件,其负极节点通过导电材料,例如导电的环氧树脂,连接宽带VCO芯片520的电压控制端510,而正极节点通过电感值相同的引线键合电感L1/L1’连接至宽带VCO芯片520的对称节点b/b’上。电感值与引线键合长度有关的引线键合电感L1/L1’可能影响整个谐振频率。因此,可以在引线键合过程中调整和设置引线键合电感L1/L1’的引线键合长度以设置所期望的VCO 500输出频率范围。在部分实施例中,分立的超突变变容二极管Var1 502和Var1’504的负极节点和正极节点可以都以倒装芯片的方式连接至宽带VCO芯片520。在图5所示的实施例中,节点b/b’处的差分信号也被用于VCO 500的差分输出,所述差分输出通过DC隔离电容Cc和Cc’被馈送至(图1、图2和图3的)第一缓冲器BUF1。在部分实施例中,宽带VCO 500进一步并入了扼流电感Lc和Lc’以阻断RF信号,同时也作为Var1和Var1’的对称DC接地路径。在实施例中,扼流电感Lc和Lc’具有大约nH级的电感,例如,3nH。
本发明的上述描述用于清楚和理解本发明,而不是用于将本发明限制在所公开的精确形式中,在所公开的内容上做出的各种修改也同样有可能落入本发明权力要求书的保护范围中。
本领域技术人员应当理解的是前文所述的示例和实施例是示例性的,而不是用于限制本发明的保护范围的。所有根据阅读本发明说明书及研究本发明附图后所作出的对于本领域技术人员来说显而易见的置换、增强、等同、结合和改进都应落入本发明的精神和保护范围中。
还应当注意的是,各权利要求中所提及的元件之间可以进行不同的布置,包括具有多种依赖关系、结构及组合。例如,在某些实施例中,各权利要求的主要内容可以相互结合。
Claims (10)
1.一种宽带信号源,其特征在于,包括:
压控振荡器,所述压控振荡器用于输出频率范围在最小频率Fmin与最大频率Fmax之间的输出信号,所述输出信号频率范围的频率调谐比定义为Fmax:Fmin,频率调谐比至少为N:1,其中N是大于1的整数或非整数;
缓冲器,所述缓冲器连接压控振荡器;及
分频器模块,所述分频器模块包括n个串联的分频器,n为大于或等于1的整数,各分频器的分频比1/N与压控振荡器的输出信号的频率调谐比N:1相匹配,n个分频器中的第一分频器经由缓冲器接收压控振荡器的输出信号;
多路选择器,所述多路选择器接收n个分频器的输出信号和经由缓冲器的压控振荡器的输出信号,多路选择器基于接收到的所有输入信号选择产生多路选择器输出信号,所述多路选择器输出信号具有覆盖从Fmin/Nn至Fmax的无间隙频带。
2.根据权利要求1所述的一种宽带信号源,其特征在于,所述压控振荡器为差分式压控振荡器或者双推式压控振荡器,所述压控振荡器包含相互连接的谐振器和负阻电路。
3.根据权利要求2所述的一种宽带信号源,其特征在于,所述压控振荡器中的一对对称位置经由缓冲器差分地输出一个输出信号至分频器模块,所述一对对称位置沿虚拟地或者实地对称。
4.根据权利要求2所述的一种宽带信号源,其特征在于,所述谐振器包括一对对称连接的串联电感-电容谐振器,所述一对串联电感-电容谐振器均各自包括超突变变容二极管,所述超突变变容二极管用于输出信号的频率调谐。
5.根据权利要求4所述的一种宽带信号源,其特征在于,除了超突变变容二极管外,所述串联电感-电容谐振器还包括至少一个开关电容器以使输出信号的频率调谐比达到N:1。
6.根据权利要求4所述的一种宽带信号源,其特征在于,所述压控振荡器及超突变变容二极管集成在单个芯片上。
7.根据权利要求4所述的一种宽带信号源,其特征在于,除了超突变变容二极管,所述压控振荡器的其余部分集成在单个芯片上,所述超突变变容二极管为分立元件,且超突变变容二极管的负极节点粘结在所述单个芯片上。
8.根据权利要求1~7中任一项所述的一种宽带信号源,其特征在于,还包括放大器,所述放大器用于接收多路选择器输出信号并产生放大的输出信号。
9.根据权利要求1~7中任一项所述的一种宽带信号源,其特征在于,所述多路选择器还包括第一解码器,所述第一解码器输出一个或多个选择信号以控制多路选择器接收到的所有输入信号的选择。
10.一种宽带信号源,其特征在于,包括:
压控振荡器,所述压控振荡器用于输出频率范围在最小频率Fmin与最大频率Fmax之间的输出信号,所述频率范围的频率调谐比定义为Fmax:Fmin,所述频率调谐比至少为N:1,其中N是大于1的整数或非整数;
第一放大器,所述第一放大器经由缓冲器接受来自压控振荡器的输出信号以输出第一输出信号;
分频器模块,所述分频器模块用于接收来自压控振荡器的输出信号,所述分频器模块包括n个串联的分频器,其中,n为大于或等于1的整数,各分频器的分频比1/N与压控振荡器的输出信号的频率调谐比N:1相匹配;
多路选择器,所述多路选择器用于接收一个或多个分频器的输出信号,所述多路选择器基于接收到的所有输入信号选择输出多路选择器输出信号;
第二放大器,所述第二放大器用于接收多路选择器输出信号并产生第二输出信号;
外部分频器,所述外部分频器连接第二放大器以接收第二输出信号以产生分频输出信号;
鉴频鉴相器模块,所述鉴频鉴相器模块连接外部分频器,所述鉴频鉴相器模块检测分频输出信号和参考时钟信号之间的频率差和相位差以输出电压或电流脉冲信号;及
环路滤波器,所述环路滤波器用于接收电压或电流脉冲信号并输出电压信号以驱动压控振荡器,实现压控振荡器输出信号的频率控制,使得第一输出信号成为以参考时钟信号为基准的锁相信号。
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