CN108572955A - A kind of journal file generation method and device - Google Patents

A kind of journal file generation method and device Download PDF

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Publication number
CN108572955A
CN108572955A CN201710132102.2A CN201710132102A CN108572955A CN 108572955 A CN108572955 A CN 108572955A CN 201710132102 A CN201710132102 A CN 201710132102A CN 108572955 A CN108572955 A CN 108572955A
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Prior art keywords
daily record
cache
ocm
ddr
written
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Inventor
慕芳利
潘浩曼
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Datang Mobile Communications Equipment Co Ltd
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Datang Mobile Communications Equipment Co Ltd
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Priority to CN201710132102.2A priority Critical patent/CN108572955A/en
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Abstract

An embodiment of the present invention provides a kind of journal file generation method and devices, wherein the method includes:Obtain daily record data, level cache is written into daily record data, when detecting anomalous event, L2 cache is written into the daily record data that the level cache includes anomalous event, journal file is generated using the daily record data in L2 cache, using the embodiment of the present invention, when detecting anomalous event, by the daily record data whole unloading comprising anomalous event in L2 cache, to which the daily record data ensured in L2 cache certainly exists abnormal log data, the range that FPGA searches abnormal log data is reduced, crawl abnormal log data are easy.

Description

A kind of journal file generation method and device
Technical field
The present invention relates to fields of communication technology, more particularly to a kind of journal file generation method and device.
Background technology
With the development of the communication technology, to the reliability of system, more stringent requirements are proposed, wherein FPGA (Field- Programmable Gate Array, i.e. field programmable gate array) technology in electronic system using widely, Therefore, the test of FPGA just becomes extremely important.
Currently, on LTE Baseband Processing Unit, at no OSP (operating system platform, Operation System Platform) Under environment, when PL (Physical Layer, physical layer) downlinks FPGA test, all unloadings of whole daily record datas in caching, and Usual buffer memory capacity is smaller, and Refresh Data is very fast, and therefore, generation daily record data amount is small, when abnormal accidental, it is difficult to capture To abnormal log data, also, the generation of journal file is not directed to abnormal log data, is unfavorable for asking present in assignment test Topic.
Invention content
In view of the above problems, it is proposed that the embodiment of the present invention overcoming the above problem or at least partly in order to provide one kind A kind of journal file generation method and device to solve the above problems.
To solve the above-mentioned problems, the embodiment of the invention discloses a kind of journal file generation methods, including:
Obtain daily record data;
Level cache is written into the daily record data;
When detecting anomalous event, the daily record data write-in two level that the level cache includes anomalous event is delayed It deposits;
Journal file is generated using the daily record data in the L2 cache.
Preferably, the step of acquisition daily record data includes:
Obtain the daily record data of preset duration;
Preset buffer memory is written into the daily record data.
Preferably, the level cache includes on-chip memory OCM level caches, the storage of Double Data Rate synchronous dynamic random Device DDR level caches and daily record switch, the daily record data includes OCM data and DDR data, described by the daily record data Be written level cache the step of include:
Judge whether the daily record switch is opened;
If so, OCM level caches are written into the OCM data, and, delay the preset buffer memory as DDR level-ones It deposits, and using the daily record data in the preset buffer memory as DDR data.
Preferably, the L2 cache includes OCM L2 caches, DDR L2 caches, write-in label, said write label It is described when detecting anomalous event including allowing write-in to mark, include the daily record number of anomalous event by the level cache Include according to the step of write-in L2 cache:
Judge whether the daily record switch is opened;
If so, when said write is labeled as allowing write-in to mark, the OCM obtained in the OCM level caches is abnormal Subframe, and, obtain the DDR exception subframes in the DDR level caches;
OCM L2 caches are written into the OCM exceptions subframe, and, DDR exceptions subframe write-in DDR two levels are delayed It deposits.
Preferably, the OCM exceptions subframe and DDR exception subframes have subframe numbers, described to write the OCM exceptions subframe Enter OCM L2 caches, and, include by the step of DDR exceptions subframe write-in DDR L2 caches:
Obtain the corresponding L2 cache address of the subframe numbers;
The OCM exceptions subframe is written in the corresponding OCM L2 caches in the L2 cache address, and, it will be described DDR exception subframes are written in the corresponding DDR L2 caches in the L2 cache address.
Preferably, the daily record data using in the L2 cache generates the step of journal file and includes:
The daily record data in the L2 cache is extracted, the daily record data includes OCM exceptions subframe and DDR extremely sub Frame;
Journal file is written into the daily record data.
To solve the above-mentioned problems, the embodiment of the invention discloses a kind of journal file generating means, described device includes:
Acquisition module, for obtaining daily record data;
Level cache writing module, for level cache to be written in the daily record data;
L2 cache writing module, for including anomalous event by the level cache when detecting anomalous event Daily record data be written L2 cache;
Journal file generation module, for generating journal file using the daily record data in the L2 cache.
Preferably, the acquisition module includes:
Acquisition submodule, the daily record data for obtaining preset duration;
Submodule is written in daily record, for preset buffer memory to be written in the daily record data.
Preferably, the level cache includes OCM level caches, DDR level caches and daily record switch, the daily record number According to including OCM data and DDR data, the level cache writing module includes:
First judging submodule, for judging whether the daily record switch is opened;
Submodule is written in level cache, is used to OCM data OCM level caches are written, and, it will be described default slow It deposits as DDR level caches, and using the daily record data in the preset buffer memory as DDR data.
Preferably, the L2 cache includes OCM L2 caches, DDR L2 caches, write-in label, said write label Including allowing write-in to mark, the L2 cache writing module includes:
Second judgment submodule, for judging whether the daily record switch is opened;
Abnormal subframe acquisition submodule, for when said write is labeled as allowing write-in to mark, obtaining the OCM level-ones OCM exception subframes in caching, and, obtain the DDR exception subframes in the DDR level caches;
Submodule is written in L2 cache, is used to OCM exceptions subframe OCM L2 caches are written, and, DDR is different DDR L2 caches are written in normal subframe.
Preferably, there are subframe numbers, the L2 cache submodule is written for the OCM exceptions subframe and DDR exception subframes Including:
L2 cache address acquisition unit, for obtaining the corresponding L2 cache address of the subframe numbers;
L2 cache writing unit, for the corresponding OCM in the L2 cache address bis- to be written in the OCM exceptions subframe In grade caching, and, the DDR exceptions subframe is written in the corresponding DDR L2 caches in the L2 cache address.
Preferably, the journal file generation module includes:
Extracting sub-module, for extracting the daily record data in the L2 cache, the daily record data includes OCM extremely sub Frame and DDR exception subframes;
Submodule is written, for journal file to be written in the daily record data.
The embodiment of the present invention includes following advantages:
The embodiment of the present invention obtains daily record data, level cache is written in daily record data, and work as and detect anomalous event When, L2 cache is written into the daily record data that level cache includes anomalous event, finally uses the daily record number in L2 cache It is when detecting anomalous event, the daily record data including anomalous event is complete using the embodiment of the present invention according to generation journal file Portion's unloading reduces FPGA in L2 cache to which the daily record data ensured in L2 cache certainly exists abnormal log data The range of abnormal log data is searched, crawl abnormal log data are easy.
Further, the buffer address maintenance mode moved using direct memory access, from level cache unloading two level When caching, level cache and L2 cache address correspond rather than dynamically distribute, and abnormal subframe are placed on corresponding with subframe numbers Specified address, facilitate FPGA to search the abnormal log data of corresponding time, improve positioning problems efficiency.
Description of the drawings
Fig. 1 is a kind of step flow chart of journal file generation method embodiment of the present invention;
Fig. 2 is the exemplary flow chart of the daily record data write-in level cache of the present invention;
Fig. 3 is the schematic diagram of the journal file generting machanism of the present invention;
Fig. 4 is the exemplary flow chart of the daily record data write-in L2 cache of the present invention;
Fig. 5 is the corresponding schematic diagram of level cache and L2 cache address of the present invention;
Fig. 6 is a kind of structure diagram of journal file generating means embodiment of the present invention.
Specific implementation mode
In order to make the foregoing objectives, features and advantages of the present invention clearer and more comprehensible, below in conjunction with the accompanying drawings and specific real Applying mode, the present invention is described in further detail.
Referring to Fig.1, a kind of step flow chart of journal file generation method embodiment of the present invention is shown, it specifically can be with Include the following steps:
Step 101, daily record data is obtained.
In practice, daily record data can be the data generated in real time when debugging, may include frequency domain data, scheduling ginseng Number, wherein daily record data may include normal daily record data and abnormal log data, and abnormal log data are to detect abnormal thing It is generated when part, in embodiments of the present invention, it may include following sub-step to obtain daily record data:
Sub-step 1011 obtains the daily record data of preset duration;
Preset buffer memory is written in the daily record data by sub-step 1012.
PL downlinks need to cache the daily record data of certain time length, and the duration of caching depends on round-trip delay and processing delay. Round-trip delay indicates that since transmitting terminal transmission data, receiving the confirmation from receiving terminal to transmitting terminal, (receiving terminal receives data Soon send and confirm afterwards), the time delay undergone in total.In the embodiment of the present invention, round-trip delay is downlink data incoming terminal MAC (Media Access Control, media intervene control layer), and uplink feedback required time is obtained, air protocol determines past It is 4ms-8ms to return time delay.Processing delay be send out after base station MAC gets PL downlink exceptions message informing PL downlinks transmission and The time delay of software processing, is less than 1ms.Therefore, the daily record data that can theoretically cache 9ms, in order to ensure daily record data The integrality and success rate of acquisition can set caching duration to 10ms, that is, cache the daily record data of 10ms, therefore, can be with Setting preset duration is 10ms, and by the daily record data write-in preset buffer memory of 10ms, which can be DDR cachings.
Step 102, level cache is written into the daily record data.
In one preferred embodiment of the invention, level cache may include that OCM (deposit by On-Chip Memery, on piece Reservoir) level cache, DDR (Double Data Rate, Double Data Rate synchronous DRAM) level caches and day Will switchs, and daily record data includes OCM data and DDR data, includes by the step of daily record data write-in level cache:
Sub-step 1021, judges whether the daily record switch is opened, if so, executing sub-step 1022.
OCM level caches are written in the OCM data by sub-step 1022, and, using the preset buffer memory as DDR mono- Grade caching, and using the daily record data in the preset buffer memory as DDR data.
In practical applications, DDR level caches can be multiplexed the existing 10ms preset buffer memories of PL, i.e., in sub-step 1012 10ms preset buffer memories can open up the OCM level caches of 10ms again.According to the OCM data of single cell 13.25KB/ms Generating rate needs 132.5KB cachings to be used as OCM level caches.
PL downlink processings generate level cache daily record data, and the sides business datum PL cache 10ms daily record datas in DDR, that is, need The DDR data being cached in DDR level caches, in addition, record has configuration parameter in OCM, these configuration parameters are also required to make For daily record data, i.e. OCM data, by DMA (Direct Memory Access, direct memory access) by the OCM numbers in OCM According to moving OCM level caches.DMA is a kind of without CPU and directly from the data exchange mode of memory access data, Under DMA mode, CPU need only assign instruction to dma controller, allow dma controller to handle the transmission of data, Data Transfer Done Information is fed back to CPU again, thus largely alleviates cpu resource occupation rate, system resource can be greatlyd save.
For level cache using cycle coverage mode log data, level cache switch is that daily record switch is believed by logic Number control, such as by logical signal 0 and 1 control, logical signal be 1 when open, daily record data can be written, logical signal is It is closed when 0, forbids that daily record data is written, wherein the logical signal of daily record switch is by OM (Opreations and Maintenance, Operation and Maintenance) update preset data structure in predicted elemental depending on.
The step 102 of embodiment for a better understanding of the present invention is further illustrated referring to Fig. 2 as example.
Fig. 2 is the exemplary flow chart of daily record data write-in level cache in the embodiment of the present invention, is included the following steps:
S11, PL downlink processing generate daily record data;
S12, judges whether daily record switch is opened, if so, S13 is executed, if it is not, executing S14;
OCM level caches are written in S13, OCM data, using the sides PL preset buffer memory as DDR level caches.
S14 terminates.
In the examples described above, it during PL downlink processings, generates daily record data and deposits in preset buffer memory, when daily record switchs When opening, using the preset buffer memory as DDR level caches, while OCM level caches is written into the OCM data in OCM, needed Bright, level cache can be cycle coverage mode write-in daily record data, for example, during the test, by the daily record of generation For data by the duration write-in level cache of 10ms, daily record data therein can include abnormal log when anomalous event occurs Data.
Step 103, will include the daily record data write-in of anomalous event in the level cache when detecting anomalous event L2 cache.
It is described when detecting anomalous event in the embodiment of the present invention, the day of anomalous event will be included in the level cache It includes following sub-step that L2 cache, which is written, in will data:
Sub-step 1031, judges whether the daily record switch is opened, if so, executing sub-step 1032.
In practical applications, the daily record data that journal file is recorded is needed to include:Configuration data (0x3500B/ms), 14 The business datum (4800B/ms*14*2) of a symbol, 6 cells, generating rate add up to 867KB/ms.It is given birth to by above-mentioned daily record data At rate it is found that the production quantity of 1 second time daily record data is 867MB, since daily record data generating rate is bigger, by existing DMA processing capacities cannot achieve, and therefore, level cache and L2 cache pass through the data of dma mode one cell of caching.
As shown in figure 3, the schematic diagram of the journal file generting machanism for the embodiment of the present invention.
In order to support online daily record data to generate, using two-level cache mode, by recycling coverage mode first by OCM days OCM level caches are written in will data, and the DDR data in the preset buffer memory of the sides PL are detected that MAC is anti-as DDR level caches When the anomalous event of feedback, the daily record data in level cache is written by L2 cache using cycle coverage mode, at this point, due to hair Anomalous event is given birth to, then the daily record data in level cache certainly exists the daily record data including anomalous event.Therefore write-in two level The daily record data of caching also certainly exists abnormal log data, when OM extracts journal file, by the daily record data in L2 cache Journal file is written, generates journal file and uploads, case study can be carried out according to the abnormal log data in journal file.
In the embodiment of the present invention, anomalous event can be confirmly detected in the following manner:
First, the interface message of data transmission link is obtained;The interface message includes version, new data instruction and retransmits Reason.
Finally, when the version is that default version, new data are designated as default new data instruction and retransmit reason to be default When retransmitting reason, anomalous event is confirmly detected.
In practical applications, terminal receives PDSCH (Physical Downlink Shared Channel, physical down Shared channel) after message, carry out ACK (Acknowledgement, positive acknowledgement message) or NACK (Negative Acknowledgement, negative acknowledgment message) feedback, therefore FPGA can judge according to the interface message of data transmission link The re-transmission situation of user is to confirm the downlink reception of terminal.
Specifically, Msg_macdl_dl_sch_para_data-Ymac_dl_ in the interface message of data transmission link Ue_para-Ymac_dl_codeword_para includes version, new data instruction and re-transmission reason instruction.Reason is retransmitted to be designated as NACK is defined as when 0,1, which is defined as uplink, only activates detection, and 2 are defined as other reasons;New data is designated as being defined as when 0 new Data upload, and 1 is defined as data re-transmission.Version is defined as transmitting for the first time for 1, and 2 transmit for second, therefore, work as new data Be designated as 1 and version be 2 when, the daily record data of generation includes abnormal log data, at this point, FPGA can be determined as need from In level cache in crawl log data write-in L2 cache.Only crawl retransmits daily record data when reason is 0, i.e. terminal is fed back Include the daily record data of abnormal log data when NACK.
Since level cache is provided with daily record switch, when detecting anomalous event, it is also necessary to judge the day of level cache Whether will switch is opened, if so, executing sub-step 1032.
Sub-step 1032 obtains the OCM in the OCM level caches when said write is labeled as allowing write-in to mark Abnormal subframe, and, obtain the DDR exception subframes in the DDR level caches.
In the embodiment of the present invention, daily record data is written using cycle coverage mode in L2 cache, and daily record data is written Journal file operation needs hundreds of milliseconds, is far longer than L2 cache refresh time, in order to avoid day is being written in daily record data In will file processes, L2 cache refreshing causes current daily record data capped, in fact it could happen that daily record " part ", in addition it is current The problem of needing the daily record data that journal file is written thoroughly to be covered can be arranged write-in label, such as write-in is allowed to mark, Allow write-in label that can indicate after the completion of journal file is written in current log data, to allow daily record data from level cache L2 cache is written.
Level cache includes OCM level caches and DDR level caches, and OCM level caches include 10 OCM number of sub frames According to DDR level caches include 10 DDR sub-frame datas.Include abnormal subframe and normal sub-frames in all sub-frame datas. Therefore, when write-in is labeled as allowing write-in to mark, the OCM exception subframes in OCM level caches can be obtained, and, it obtains DDR exception subframes in DDR level caches.
In a kind of example of the present invention, abnormal subframe can be tetra- subframes of N-4, N-6, N-7, N-8, and wherein N is to work as Preceding storage location pointer, such as when current storage location pointer is the 9th (i.e. subframe numbers are 8) subframe, then the 0th, 1,2,4 subframes be Abnormal subframe, naturally it is also possible to set other subframes as abnormal subframe, the embodiment of the present invention is without limitation.
OCM L2 caches are written in the OCM exceptions subframe by sub-step 1033, and, the DDR exceptions subframe is write Enter DDR L2 caches.
In the embodiment of the present invention, L2 cache includes OCM L2 caches and DDR L2 caches, according to single cell The DDR data generation rates of the OCM data generation rates of 13.25KB/ms and single cell 131.25KB/ms, need to open up 132.5KB cachings are used for OCM L2 caches, open up 1.3125MB cachings and are used for DDR L2 caches, need 1.445MB altogether (132.5KB+1.3125MB) caching is used as L2 cache, has son in the OCM exceptions subframe and DDR exception subframes of level cache OCM L2 caches are written in the OCM exceptions subframe by frame number, and, DDR L2 cache packets are written into the DDR exceptions subframe Include following sub-step:
Sub-step 1033-1 obtains the corresponding L2 cache address of the subframe numbers;
The corresponding OCM L2 caches in the L2 cache address are written in the OCM exceptions subframe by sub-step 1033-2 In, and, the DDR exceptions subframe is written in the corresponding DDR L2 caches in the L2 cache address.
In practical applications, OCM exceptions subframe and DDR exceptions subframe are moved mode by DMA and are written in L2 cache, i.e., The one-to-one correspondence mode to specified destination address is moved from specified source address, rather than dynamically distributes address, so from level cache In the abnormal subframe write-in L2 cache moved in corresponding subframe address, rather than it is continuously written into.It should be noted that level-one In caching other than OCM exceptions subframe and DDR exception subframes, further includes normal sub-frame data, L2 cache is also written together In.
The step 103 of embodiment for a better understanding of the present invention, referring to Fig. 4 and Fig. 5 as example furtherly It is bright.
Fig. 4 is the exemplary flow chart of daily record data of embodiment of the present invention write-in L2 cache, is included the following steps:
S21 starts;
S22, if detect anomalous event;If so, S23 is executed, if it is not, executing S26;
S23, whether daily record switch is opened, if so, S24 is executed, if it is not, executing S26;
S24, if be that write-in is allowed to mark, if so, S25 is executed, if it is not, executing S26;
L2 cache is written in abnormal sub-frame data by S25;
S26 terminates.
By above-mentioned example, when detecting anomalous event, the abnormal sub-frame data write-in two level in level cache is delayed It deposits, since in TD-LTE (Time Division Long Term Evolution) uplink-downlink configuration 2, sub-frame of uplink N is fed back Be downlink subframe N-8, N-7, N-6, N-4 data transmission as a result, therefore might have normal-sub frame number in this four subframes According to being also written into L2 cache, but greatly reduced by among abnormal data control herein four subframe ranges in this way FPGA searches the range of abnormal log data.
It is the corresponding schematic diagram of level cache and L2 cache address in the embodiment of the present invention shown in Fig. 5, in Fig. 5, OCM Level cache includes 10 subframes, and DDR level caches also include 10 subframes, and L2 cache includes OCM L2 caches and DDR bis- Grade caching includes respectively similarly 10 subframes.Current level cache storage location pointer is N, then the subframe numbers point of abnormal subframe Not Wei N-4, N-6, N-7, N-8, when current pointer location is the 9th, the 0th, 1,2,4 subframes are abnormal subframe, therefore can obtain In L2 cache subframe numbers be the corresponding L2 cache address N-4, N-6, N-7, N-8, i.e., the 0th, 1,2,4 subframes, level-one is delayed OCM exceptions subframe and the DDR exception subframes that middle subframe numbers are 0,1,2,4 are deposited, being respectively written into subframe numbers in L2 cache is respectively 0, in 1,2,4 corresponding OCM L2 caches and DDR L2 caches, and L2 cache is provided with subframe numbers and half frame number, convenient FPGA searches the abnormal subframe of corresponding time.
Step 104, journal file is generated using the abnormal log data in the L2 cache.
In embodiments of the present invention, it includes following to generate journal file using the abnormal log data in the L2 cache Sub-step:
Sub-step 1041, extracts the daily record data in the L2 cache, the daily record data include OCM exceptions subframe and DDR exception subframes;
Journal file is written in the daily record data by sub-step 1042.
When OM extracts daily record, the daily record data in L2 cache is extracted, daily record data includes OCM exceptions subframe and DDR different Journal file is written in all daily record datas by normal subframe, generates journal file, such as the journal file of text formatting, then will Journal file uploads.In this way, since L2 cache only has 10 subframes, and abnormal subframe is moved mode using DMA and is only stored In one or more subframe that subframe numbers are N-4, N-6, N-7, N-8, the seeking scope of FPGA is greatly reduced.
The embodiment of the present invention obtains daily record data, level cache is written in daily record data, and work as and detect anomalous event When, it will include the daily record data write-in L2 cache of anomalous event in level cache, finally use the daily record number in L2 cache It is when detecting anomalous event, the daily record data comprising anomalous event is whole using the embodiment of the present invention according to journal file is generated Unloading ensures to certainly exist abnormal log data in L2 cache, reduces the seeking scope of abnormal log in L2 cache, It is easy to arrest abnormal log data.
Further, the DMA of use moves the buffer address maintenance mode of mode, from level cache unloading L2 cache When, level cache and L2 cache address correspond rather than dynamically distribute, and abnormal subframe is placed on finger corresponding with subframe numbers Determine address, FPGA is facilitated to search the abnormal log data of corresponding time, improves positioning problems efficiency.
It should be noted that for embodiment of the method, for simple description, therefore it is all expressed as a series of action group It closes, but those skilled in the art should understand that, the embodiment of the present invention is not limited by the described action sequence, because according to According to the embodiment of the present invention, certain steps can be performed in other orders or simultaneously.Secondly, those skilled in the art also should Know, embodiment described in this description belongs to preferred embodiment, and the involved action not necessarily present invention is implemented Necessary to example.
With reference to Fig. 6, show a kind of structure diagram of journal file generating means embodiment of the present invention, specifically include as Lower module:
Acquisition module 201, for obtaining daily record data;
Level cache writing module 202, for level cache to be written in the daily record data;
L2 cache writing module 203, for when detecting anomalous event, abnormal thing will to be included in the level cache L2 cache is written in the daily record data of part;
Journal file generation module 204, for generating journal file using the daily record data in the L2 cache.
In one preferred embodiment of the invention, acquisition module 201 includes:
Acquisition submodule, the daily record data for obtaining preset duration;
Submodule is written in daily record, for preset buffer memory to be written in the daily record data.
Level cache writing module 202 includes:
First judging submodule, for judging whether the daily record switch is opened;
Submodule is written in level cache, is used to OCM data OCM level caches are written, and, it will be described default slow It deposits as DDR level caches, and using the daily record data in the preset buffer memory as DDR data.
In an embodiment of the present invention, L2 cache writing module 203 includes:
Second judgment submodule, for judging whether the daily record switch is opened;
Abnormal subframe acquisition submodule, for when said write is labeled as allowing write-in to mark, obtaining the OCM level-ones OCM exception subframes in caching, and, obtain the DDR exception subframes in the DDR level caches;
Submodule is written in L2 cache, is used to OCM exceptions subframe OCM L2 caches are written, and, DDR is different DDR L2 caches are written in normal subframe.
Submodule is written in the L2 cache:
L2 cache address acquisition unit, for obtaining the corresponding L2 cache address of the subframe numbers;
L2 cache writing unit, for the corresponding OCM in the L2 cache address bis- to be written in the OCM exceptions subframe In grade caching, and, the DDR exceptions subframe is written in the corresponding DDR L2 caches in the L2 cache address.
Journal file generation module 204 includes:
Extracting sub-module, for extracting the daily record data in the L2 cache, the daily record data includes OCM extremely sub Frame and DDR exception subframes;
Submodule is written, for journal file to be written in the daily record data.
For device embodiments, since it is basically similar to the method embodiment, so fairly simple, the correlation of description Place illustrates referring to the part of embodiment of the method.
Each embodiment in this specification is described in a progressive manner, the highlights of each of the examples are with The difference of other embodiment, the same or similar parts between the embodiments can be referred to each other.
It should be understood by those skilled in the art that, the embodiment of the embodiment of the present invention can be provided as method, apparatus or calculate Machine program product.Therefore, the embodiment of the present invention can be used complete hardware embodiment, complete software embodiment or combine software and The form of the embodiment of hardware aspect.Moreover, the embodiment of the present invention can be used one or more wherein include computer can With in the computer-usable storage medium (including but not limited to magnetic disk storage, CD-ROM, optical memory etc.) of program code The form of the computer program product of implementation.
The embodiment of the present invention be with reference to according to the method for the embodiment of the present invention, terminal device (system) and computer program The flowchart and/or the block diagram of product describes.It should be understood that flowchart and/or the block diagram can be realized by computer program instructions In each flow and/or block and flowchart and/or the block diagram in flow and/or box combination.These can be provided Computer program instructions are set to all-purpose computer, special purpose computer, Embedded Processor or other programmable data processing terminals Standby processor is to generate a machine so that is held by the processor of computer or other programmable data processing terminal equipments Capable instruction generates for realizing in one flow of flow chart or multiple flows and/or one box of block diagram or multiple boxes The device of specified function.
These computer program instructions, which may also be stored in, can guide computer or other programmable data processing terminal equipments In computer-readable memory operate in a specific manner so that instruction stored in the computer readable memory generates packet The manufacture of command device is included, which realizes in one flow of flow chart or multiple flows and/or one side of block diagram The function of being specified in frame or multiple boxes.
These computer program instructions can be also loaded into computer or other programmable data processing terminal equipments so that Series of operation steps are executed on computer or other programmable terminal equipments to generate computer implemented processing, thus The instruction executed on computer or other programmable terminal equipments is provided for realizing in one flow of flow chart or multiple flows And/or in one box of block diagram or multiple boxes specify function the step of.
Although the preferred embodiment of the embodiment of the present invention has been described, once a person skilled in the art knows bases This creative concept, then additional changes and modifications can be made to these embodiments.So the following claims are intended to be interpreted as Including preferred embodiment and fall into all change and modification of range of embodiment of the invention.
Finally, it is to be noted that, herein, relational terms such as first and second and the like be used merely to by One entity or operation are distinguished with another entity or operation, without necessarily requiring or implying these entities or operation Between there are any actual relationship or orders.Moreover, the terms "include", "comprise" or its any other variant meaning Covering non-exclusive inclusion, so that process, method, article or terminal device including a series of elements not only wrap Those elements are included, but also include other elements that are not explicitly listed, or further include for this process, method, article Or the element that terminal device is intrinsic.In the absence of more restrictions, being wanted by what sentence "including a ..." limited Element, it is not excluded that there is also other identical elements in process, method, article or the terminal device including the element.
Above to a kind of journal file generation method provided by the present invention and device, it is described in detail, herein Applying specific case, principle and implementation of the present invention are described, and the explanation of above example is only intended to help Understand the method and its core concept of the present invention;Meanwhile for those of ordinary skill in the art, according to the thought of the present invention, There will be changes in the specific implementation manner and application range, in conclusion the content of the present specification should not be construed as to this The limitation of invention.

Claims (12)

1. a kind of journal file generation method, which is characterized in that the method includes:
Obtain daily record data;
Level cache is written into the daily record data;
When detecting anomalous event, L2 cache is written into the daily record data that the level cache includes anomalous event;
Journal file is generated using the daily record data in the L2 cache.
2. according to the method described in claim 1, it is characterized in that, the step of acquisition daily record data include:
Obtain the daily record data of preset duration;
Preset buffer memory is written into the daily record data.
3. according to the method described in claim 2, it is characterized in that, the level cache includes that on-chip memory OCM level-ones are slow It deposits, Double Data Rate synchronous DRAM DDR level caches and daily record switch, the daily record data includes OCM data With DDR data, described the step of level cache is written in the daily record data, includes:
Judge whether the daily record switch is opened;
If so, OCM level caches are written into the OCM data, and, using the preset buffer memory as DDR level caches, and Using the daily record data in the preset buffer memory as DDR data.
4. according to the method described in claim 3, it is characterized in that, the L2 cache includes OCM L2 caches, DDR two levels Caching, write-in label, said write label includes that write-in is allowed to mark, described when detecting anomalous event, by the level-one Include the steps that in caching anomalous event daily record data write-in L2 cache include:
Judge whether the daily record switch is opened;
If so, when said write is labeled as allowing write-in to mark, the OCM exception subframes in the OCM level caches are obtained, And obtain DDR exception subframes in the DDR level caches;
OCM L2 caches are written into the OCM exceptions subframe, and, DDR L2 caches are written into the DDR exceptions subframe.
5. according to the method described in claim 4, it is characterized in that, the OCM exceptions subframe and DDR exception subframes have subframe Number, it is described that OCM L2 caches are written into the OCM exceptions subframe, and, DDR L2 caches are written into the DDR exceptions subframe The step of include:
Obtain the corresponding L2 cache address of the subframe numbers;
The OCM exceptions subframe is written in the corresponding OCM L2 caches in the L2 cache address, and, the DDR is different Normal subframe is written in the corresponding DDR L2 caches in the L2 cache address.
6. according to the method described in claim 5, it is characterized in that, the daily record data using in the L2 cache generates The step of journal file includes:
The daily record data in the L2 cache is extracted, the daily record data includes OCM exceptions subframe and DDR exception subframes;
Journal file is written into the daily record data.
7. a kind of journal file generating means, which is characterized in that described device includes:
Acquisition module, for obtaining daily record data;
Level cache writing module, for level cache to be written in the daily record data;
L2 cache writing module, for including the day of anomalous event by the level cache when detecting anomalous event L2 cache is written in will data;
Journal file generation module, for generating journal file using the daily record data in the L2 cache.
8. device according to claim 7, which is characterized in that the acquisition module includes:
Acquisition submodule, the daily record data for obtaining preset duration;
Submodule is written in daily record, for preset buffer memory to be written in the daily record data.
9. device according to claim 8, which is characterized in that the level cache includes OCM level caches, DDR level-ones Caching and daily record switch, the daily record data includes OCM data and DDR data, and the level cache writing module includes:
First judging submodule, for judging whether the daily record switch is opened;
Submodule is written in level cache, is used to OCM data OCM level caches are written, and, the preset buffer memory is made For DDR level caches, and using the daily record data in the preset buffer memory as DDR data.
10. device according to claim 9, which is characterized in that the L2 cache includes OCM L2 caches, DDR two levels Caching, write-in label, said write label include that write-in is allowed to mark, and the L2 cache writing module includes:
Second judgment submodule, for judging whether the daily record switch is opened;
Abnormal subframe acquisition submodule, for when said write is labeled as allowing write-in to mark, obtaining the OCM level caches In OCM exception subframes, and, obtain the DDR exception subframes in the DDR level caches;
Submodule is written in L2 cache, is used to OCM exceptions subframe OCM L2 caches are written, and, DDR is extremely sub DDR L2 caches are written in frame.
11. device according to claim 10, which is characterized in that the OCM exceptions subframe and DDR exception subframes have son Frame number, the L2 cache write-in submodule include:
L2 cache address acquisition unit, for obtaining the corresponding L2 cache address of the subframe numbers;
L2 cache writing unit delays for the corresponding OCM two levels in the L2 cache address to be written in the OCM exceptions subframe In depositing, and, the DDR exceptions subframe is written in the corresponding DDR L2 caches in the L2 cache address.
12. according to the devices described in claim 11, which is characterized in that the journal file generation module includes:
Extracting sub-module, for extracting the daily record data in the L2 cache, the daily record data include OCM exceptions subframe and DDR exception subframes;
Submodule is written, for journal file to be written in the daily record data.
CN201710132102.2A 2017-03-07 2017-03-07 A kind of journal file generation method and device Pending CN108572955A (en)

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Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109597739A (en) * 2018-12-10 2019-04-09 苏州思必驰信息科技有限公司 Voice log services method and system in human-computer dialogue
CN109614042A (en) * 2018-11-30 2019-04-12 维沃移动通信有限公司 A kind of method and terminal device storing log information
CN110213074A (en) * 2019-03-07 2019-09-06 腾讯科技(深圳)有限公司 The anomalous structure mthods, systems and devices of distributed protocol
WO2022166875A1 (en) * 2021-02-04 2022-08-11 展讯通信(上海)有限公司 Log storage method, communication apparatus, chip, and module device

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102053923A (en) * 2009-11-05 2011-05-11 北京金山软件有限公司 Storage method and storage device for logbook data
WO2011113504A1 (en) * 2010-03-16 2011-09-22 Amplidata Nv Device driver for use in a data storage system
CN103488558A (en) * 2013-09-17 2014-01-01 北京思特奇信息技术股份有限公司 Device and method of automatically acquiring application anomalies based on LOG4J logging framework
CN105677258A (en) * 2016-02-23 2016-06-15 浪潮(北京)电子信息产业有限公司 Method and system for managing log data
CN105868092A (en) * 2016-03-28 2016-08-17 广东欧珀移动通信有限公司 Log file processing method and device

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102053923A (en) * 2009-11-05 2011-05-11 北京金山软件有限公司 Storage method and storage device for logbook data
WO2011113504A1 (en) * 2010-03-16 2011-09-22 Amplidata Nv Device driver for use in a data storage system
CN103488558A (en) * 2013-09-17 2014-01-01 北京思特奇信息技术股份有限公司 Device and method of automatically acquiring application anomalies based on LOG4J logging framework
CN105677258A (en) * 2016-02-23 2016-06-15 浪潮(北京)电子信息产业有限公司 Method and system for managing log data
CN105868092A (en) * 2016-03-28 2016-08-17 广东欧珀移动通信有限公司 Log file processing method and device

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109614042A (en) * 2018-11-30 2019-04-12 维沃移动通信有限公司 A kind of method and terminal device storing log information
CN109614042B (en) * 2018-11-30 2022-09-02 维沃移动通信有限公司 Method for storing log information and terminal equipment
CN109597739A (en) * 2018-12-10 2019-04-09 苏州思必驰信息科技有限公司 Voice log services method and system in human-computer dialogue
CN110213074A (en) * 2019-03-07 2019-09-06 腾讯科技(深圳)有限公司 The anomalous structure mthods, systems and devices of distributed protocol
CN110213074B (en) * 2019-03-07 2022-03-11 腾讯科技(深圳)有限公司 Distributed protocol exception construction method, system and device
WO2022166875A1 (en) * 2021-02-04 2022-08-11 展讯通信(上海)有限公司 Log storage method, communication apparatus, chip, and module device

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