CN108551433A - The decoding system and coding/decoding method of BMC codes - Google Patents
The decoding system and coding/decoding method of BMC codes Download PDFInfo
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L25/00—Baseband systems
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- H—ELECTRICITY
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- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M5/00—Conversion of the form of the representation of individual digits
- H03M5/02—Conversion to or from representation by pulses
- H03M5/04—Conversion to or from representation by pulses the pulses having two levels
- H03M5/06—Code representation, e.g. transition, for a given bit cell depending only on the information in that bit cell
- H03M5/12—Biphase level code, e.g. split phase code, Manchester code; Biphase space or mark code, e.g. double frequency code
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Abstract
The present invention relates to a kind of decoding system of BMC codes and coding/decoding methods.The coding/decoding method of the BMC codes, filter module is first passed through to be filtered input signal, eliminate burr interference, then hopping edge detection and analysis is carried out to filtered signal, signal is avoided to be influenced by the distortion of flash width, finally, it is decoded according to hopping edge testing result, decodes accuracy and decoding efficiency is high.In addition, using the decoding system of this coding/decoding method, simple in structure, cost is relatively low.
Description
Technical field
The present invention relates to communication technique fields, and in particular to a kind of the decoding system and coding/decoding method of BMC codes.
Background technology
USB Type-C Power Delivery agreements (hereinafter referred to as PD agreements) are a kind of based on Type-C interfaces
Power transmission protocol.USB PD support the combination of multiple voltage and electric current, maximum that can support 100W（20V/5A）Power transmission,
Power supply role transforming is supported simultaneously, meets Most electronic equipment power demands.In USB Type-C interfaces, made with CC lines
For dedicated plug detection and PD communication ports.It uses half-duplex operation mechanism, is encoded using two-way mark（Biphase
Mark Coding, BMC）Transmission data.The method simple and flexible has been used as PD communication standards to issue, and just gradually obtains at present
To being widely applied.BMC codings belong to a kind of coding techniques of phase-modulation, are that clock and data are mixed transmission
Coding method.The characteristics of BMC is encoded is, if data negate for 1 in this intermediate level, and in each data transmission bit
Boundary level negate.Transmission end can be allowed only to need a data line can be by data just with receiving terminal using BMC codings
True transmission and reception, and keep good synchronism in transmitting-receiving two-end.PD agreements provide that BMC code transmission frequencies are 300K,
I.e. each data bit transfer time is 3.33us.PD agreements allow the coding to have +/- 10% frequency departure, but are actually answering
It since transmission medium is very different, channel is different in size in, or is influenced by noise, electromagnetic environment etc., BMC encoded signals are by dry
It is very universal to disturb phenomenon, in receiving terminal frequency departure often bigger.It it requires that receiving terminal has certain fault-tolerant ability, can tolerate
BMC signal pulse widths distort, the interference such as signal burr.
Invention content
In view of the above problems, the present invention provides a kind of anti-interference BMC codes to decode system and method, it can be to disturbed coding
Signal carries out anti-interference process and decodes, and realizes that signal compiles BMC under by compared with interference such as the distortion of flash width, signal burrs
Code data are correctly decoded.The specific technical solution of the present invention is as follows：
A kind of decoding system of BMC codes, including filter module, saltus step analysis module and the data decoder module contacted successively.Its
In：Filter module, the input signal for receiving BMC codings, and after being filtered to the input signal, output filtering letter
Number.Saltus step analysis module, the filtering signal for receiving the filter module output, and according to the jump of the filtering signal
Become edge and bound-time interval, whether analysis current transition is data jump.Data decoder module, for according to the saltus step point
The analysis result for analysing module controls the shift register write-in corresponding data in the data decoder module, then the shifting
Data in bit register are exported as decoding data.
Further, the filter module includes counting submodule and filtering flag submodule.Wherein：The counting submodule
Block is used to carry out time counting to the process for receiving the input signal, and when carrying out at the hopping edge moment of the input signal
Between count value clearing, after clearing again the time started count；The counting submodule is additionally operable in the time counting value
When more than preset filter window value, time count halted, and carry out time counting at the hopping edge moment of the input signal
The clearing of value, the time started counts again after clearing.The filtering flag submodule in the time counting value for being more than
When preset filter window value, high level marking signal is exported, at the hopping edge of the input signal, exports low level mark
Signal.
Further, the saltus step analysis module includes hopping edge detection sub-module, timing submodule and judging submodule.
Wherein：The hopping edge detection sub-module is used to detect the hopping edge of the filtering signal.The timing submodule is for calculating
Bound-time interval between the adjacent hopping edge that the hopping edge detection sub-module detects.Judging submodule is used for according to institute
It states bound-time interval and judges that current transition is data jump, boundary saltus step or wrong saltus step.
Further, the data decoder module includes Data Labels submodule and shift register.Wherein：The data
Indicate that submodule is used for according to the arrival of the hopping edge of the data jump determined by the judging submodule output data
Indicate high level, otherwise, the output data mark low level according to the arrival of the hopping edge of boundary saltus step.The shift register
Data Labels high level for being exported according to the Data Labels submodule, and write when the hopping edge of boundary saltus step is arrived
Enter high level deposit signal, according to the Data Labels low level that the Data Labels submodule exports, and in the jump of boundary saltus step
Become and low level deposit signal is written along when arriving, and after data receiver, output high level be written deposits signal
Signal is deposited with low level.
A kind of coding/decoding method of BMC codes, includes the following steps：Step 1：Filter module receives the input signal of BMC codings,
And after being filtered to the input signal, filtering signal is exported, enters step 2；Step 2：Described in saltus step analysis module receives
The filtering signal of filter module output, and according to the hopping edge of the filtering signal and bound-time interval, analysis is current
Whether saltus step is data jump, subsequently into step 3；Step 3：The data decoder module is according to the saltus step analysis module
Analysis result controls its shift register write-in corresponding data, then using the data in the shift register as solution yardage
According to output.
Further, the step 1 specifically comprises the following steps：Step 11：The filter module receives the defeated of BMC codings
Enter signal, subsequently into step 12；Step 12：Counting submodule in the filter module is started from scratch to receiving the input
The process of signal carries out time counting, subsequently into step 13；Step 13：The filter module judges whether to detect described defeated
Enter the hopping edge of signal, if it is, entering step 14, otherwise continues time counting, and enter step 15；Step 14：
The counting submodule carries out the clearing of time counting value, and the time started counts again after clearing, is then back to step 13；Step
Rapid 15：The filter module judges whether the time counting value is more than preset filter window value, if it is, entering step
16, otherwise continue time counting, is then back to step 13；Step 16：The counting submodule stops counting, the filtering
Mould filtering flag submodule in the block exports high level marking signal, and the filter module output is made to believe with the input this moment
Number identical level signal, subsequently into step 17；Step 17：The filter module judges whether to detect the input signal
Hopping edge so that the filter module is kept current if it is, the filtering flag submodule exports low level marking signal
The level signal of output is constant, and return to step 14, if it is not, then return to step 16.
Further, the step 2 specifically comprises the following steps：Step 21：The saltus step analysis module receives the filter
The filtering signal of wave module output, subsequently into step 22；Step 22：Hopping edge detection in the saltus step analysis module
Whether submodule detects the hopping edge of the filtering signal, if it is, 23 are entered step, if it is not, then return to step 21；
Step 23：Timing submodule in the saltus step analysis module calculates the adjacent saltus step that the hopping edge detection sub-module detects
Bound-time interval between, subsequently into step 24；Step S24：Judging submodule root in the saltus step analysis module
Judge whether current transition is data jump according to the bound-time interval.
Further, the step S24 specifically comprises the following steps：When the judging submodule judges the bound-time
Individual data bit transmission time of the interval more than 5/4 times, it is determined that current transition is wrong saltus step；When the judging submodule
Judge that the bound-time interval is greater than or equal to 3/4 times of individual data bit transmission time, and is less than or equal to 5/4 times
Individual data bit transmission time, it is determined that current transition is boundary saltus step；When the judging submodule judges the saltus step
Between interval more than or equal to 1/4 times of individual data bit transmission time, and when individual data bit transfer less than 3/4 times
Between, and when judging a upper saltus step for boundary saltus step, determine that current transition is data jump；When the judging submodule judges institute
State the individual data bit transmission time that bound-time interval is greater than or equal to 1/4 times, and the individual data bit less than 3/4 times
Transmission time, and when judging a upper saltus step for data jump, determine that current transition is boundary saltus step；When the judging submodule
Judge that the bound-time interval is less than 1/4 times of individual data bit transmission time, it is determined that current transition is wrong saltus step.
Further, the step 3 specifically comprises the following steps：Data Labels submodule in the data decoder module
The output data mark high level according to the arrival of the hopping edge of the data jump determined by the judging submodule, it is no
Then, the output data mark low level according to the arrival of the hopping edge of boundary saltus step；The shift register is according to the data
Indicate the Data Labels high level of submodule output, and high level deposit letter is written when the hopping edge of boundary saltus step is arrived
Number, and according to the Data Labels submodule export Data Labels low level, and when the hopping edge of boundary saltus step is arrived and
Low level is written and deposits signal；After the shift register judges data receiver, output high level deposit be written
Signal and low level deposit signal.
The coding/decoding method of BMC codes of the present invention, first passes through filter module and is filtered to input signal, eliminates burr
Then interference carries out hopping edge detection and analysis to filtered signal, avoid signal from being influenced by the distortion of flash width, most
Afterwards, it is decoded according to hopping edge testing result, decodes accuracy and decoding efficiency is high.In addition, using this coding/decoding method
Decoding system, simple in structure, cost is relatively low.
Description of the drawings
Fig. 1 is the structure diagram of the decoding system of the BMC codes.
Fig. 2 is the flow diagram of the coding/decoding method of the BMC codes.
Fig. 3 is the testing process schematic diagram of hopping edge.
Specific implementation mode
Following will be combined with the drawings in the embodiments of the present invention, and technical solution in the embodiment of the present invention is retouched in detail
It states.It should be appreciated that specific embodiment disclosed below is only used for explaining the present invention, it is not intended to limit the present invention.
The decoding system of BMC codes as shown in Figure 1, including filter module, saltus step analysis module and the data contacted successively
Decoder module.Wherein, shown filter module is used to receive the input signal of BMC codings, and is filtered to the input signal
Afterwards, filtering signal is exported.The filtering signal of the saltus step analysis module for receiving the filter module output, and according to
The hopping edge and bound-time interval of the filtering signal, whether analysis current transition is data jump.The data decode mould
Block is used for the analysis result according to the saltus step analysis module, controls the shift register write-in phase in the data decoder module
Data are answered, are then exported using the data in the shift register as decoding data.The system first passes through filter module pair
Input signal is filtered, and eliminates burr interference, then carries out hopping edge inspection to filtered signal by saltus step analysis module
It surveys and analyzes, avoid signal from being influenced by the distortion of flash width, finally, by data decoder module according to hopping edge testing result
It is decoded, decodes accuracy and decoding efficiency is high.In addition, the decoding system structure is simple, cost is relatively low.
Preferably, the filter module includes counting submodule and filtering flag submodule.Wherein, the counting submodule
For carrying out time counting to the process for receiving the input signal, and the time is carried out at the hopping edge moment of the input signal
The clearing of count value, the time started counts again after clearing.The counting submodule is additionally operable to big in the time counting value
When preset filter window value, time count halted, and carry out time counting value at the hopping edge moment of the input signal
Clearing, after clearing again the time started count.The filtering flag submodule is used to be more than in the time counting value pre-
If filter window value when, export high level marking signal, at the hopping edge of the input signal, output low level mark letter
Number.Wherein, the filter window value can be accordingly arranged according to specific design requirement, it is preferred that could be provided as 10
Any one value in microsecond to 30 microseconds.The filter module by the time counting value of counting submodule with it is preset in system
Filter window value is compared, can accurately output identification signal, effectively filter out the interference of the clutters such as burr, improve signal
Accuracy.
Preferably, the saltus step analysis module includes hopping edge detection sub-module, timing submodule and judging submodule.Its
In：The hopping edge detection sub-module is used to detect the hopping edge of the filtering signal.The timing submodule is for calculating institute
State the bound-time interval between the adjacent hopping edge that hopping edge detection sub-module detects.Judging submodule is used for according to
Bound-time interval judges whether current transition is data jump.The saltus step analysis module detects submodule by the hopping edge
Block carries out hopping edge detection to filtered input signal, and the time between hopping edge is then calculated by the timing submodule
Interval, it is to belong to normal data jump finally to analyze current transition by the judging submodule again, still falls within boundary jump
Change or wrong saltus step, to be that subsequent decoding improves accurate reference frame.
Preferably, the data decoder module includes Data Labels submodule and shift register.Wherein：The data mark
Measure module is used for according to the arrival of the hopping edge of the data jump determined by the judging submodule output data mark
Chigo level, otherwise, the output data mark low level according to the arrival of the hopping edge of boundary saltus step.The shift register is used
In the Data Labels high level exported according to the Data Labels submodule, and be written when the hopping edge of boundary saltus step is arrived
High level deposits signal；According to the Data Labels low level that the Data Labels submodule exports, and in the saltus step of boundary saltus step
Low level deposit signal is written along when arriving；And after data receiver, output high level deposit signal be written and
Low level deposits signal, to be exported as decoding data.The data decoder module is by analyzing data flag signal and saltus step
The sequential on edge can accurately input corresponding deposit signal, to ensure that decoded accuracy in a shift register.
The coding/decoding method of BMC codes as shown in Figure 2, includes the following steps：Step 1：Filter module receives the defeated of BMC codings
Enter signal, and after being filtered to the input signal, exports filtering signal, enter step 2.Step 2：Saltus step analysis module connects
The filtering signal of the filter module output is received, and according to the hopping edge of the filtering signal and bound-time interval, is divided
Analyse whether current transition is data jump, subsequently into step 3.Step 3：The data decoder module is analyzed according to the saltus step
The analysis result of module, control its shift register write-in corresponding data, then using the data in the shift register as
Decoding data exports.The coding/decoding method first passes through filter module and is filtered to input signal, eliminates burr interference, then
Hopping edge detection and analysis is carried out to filtered signal, avoids signal from being influenced by the distortion of flash width, finally, according to jump
Change is decoded along testing result, decodes accuracy and decoding efficiency is high.
Preferably, the step 1 specifically comprises the following steps：In a step 11, the filter module receives BMC codings
Input signal, subsequently into step 12.In step 12, the counting submodule in the filter module is started from scratch to receiving institute
The process for stating input signal carries out time counting, subsequently into step 13.In step 13, the filter module judges whether to examine
The hopping edge of the input signal is measured, if it is, entering step 14, otherwise continues time counting, and enter step
15.At step 14, the counting submodule carries out the clearing of time counting value, and the time started counts again after clearing, so
Return to step 13 afterwards.In step 15, the filter module judges whether the time counting value is more than preset filter window
Value, if it is, entering step 16, otherwise continues time counting, is then back to step 13.In step 16, the meter
Number submodule stops counting, and the filtering flag submodule in the filter module exports high level marking signal, makes the filtering
Module exports level signal identical with the input signal this moment, subsequently into step 17.In step 17, the filtering
Module judges whether to detect the hopping edge of the input signal, if it is, the filtering flag submodule exports low level
Marking signal makes the filter module keep the level signal currently exported constant, and return to step 14, if it is not, then returning
Step 16.The method is filtered input signal by the way of filter window, can effectively filter out input signal middle arteries
The noise signals such as the smaller burr of width are rushed, to improve the accuracy of input signal, improve interference free performance.
Preferably, the step 2 specifically comprises the following steps：In step 21, described in the saltus step analysis module reception
The filtering signal of filter module output, subsequently into step 22.In step 22, the saltus step in the saltus step analysis module
The hopping edge of the filtering signal whether is detected along detection sub-module, if it is, 23 are entered step, if it is not, then returning
Step 21.In step 23, the timing submodule in the saltus step analysis module calculates the hopping edge detection sub-module detection
Bound-time interval between the adjacent hopping edge arrived, subsequently into step 24.In step s 24, the saltus step analysis module
In judging submodule judge whether current transition is data jump according to the bound-time interval.The method passes through to filter
Input signal after wave carries out hopping edge detection, and by analyzing the bound-time interval between hopping edge, can be accurately
The situation of change for judging input signal, avoid signal by flash width distortion influenced, improve signal detection accuracy and
Anti-interference ability.
Preferably, the step S24 specifically comprises the following steps：Between the judging submodule judges the bound-time
Every the individual data bit transmission time more than 5/4 times, it is determined that current transition is wrong saltus step.When the judging submodule is sentenced
Break individual data bit transmission time of the bound-time interval more than or equal to 3/4 times, and the list less than or equal to 5/4 times
A data bit transmission time, it is determined that current transition is boundary saltus step.When the judging submodule judges the bound-time
Individual data bit transmission time of the interval more than or equal to 1/4 times, and the individual data bit transmission time less than 3/4 times,
And when judging a upper saltus step for boundary saltus step, determine that current transition is data jump.Described in judging when the judging submodule
Bound-time interval is greater than or equal to 1/4 times of individual data bit transmission time, and the individual data bit less than 3/4 times passes
The defeated time, and when judging a upper saltus step for data jump, determine that current transition is boundary saltus step.When the judging submodule is sentenced
Break individual data bit transmission time of the bound-time interval less than 1/4 times, it is determined that current transition is wrong saltus step.Institute
Method is stated by analyzing bound-time interlude length, the type of saltus step can be effectively distinguished, be improved for subsequent decoding
Accurate reference frame.
Preferably, the step 3 specifically comprises the following steps：Data Labels submodule root tuber in the data decoder module
The output data mark high level according to the arrival of the hopping edge of the data jump determined by the judging submodule, otherwise,
The output data mark low level according to the arrival of the hopping edge of boundary saltus step.The shift register is according to the Data Labels
The Data Labels high level of submodule output, and high level deposit signal is written when the hopping edge of boundary saltus step is arrived, and
According to the Data Labels low level that the Data Labels submodule exports, and be written low when the hopping edge of boundary saltus step is arrived
Level register signal.After the shift register judges data receiver, output high level deposit signal be written and
Low level deposits signal.The method, can be in a shift register by the sequential of analysis data flag signal and hopping edge
Corresponding deposit signal is accurately input, to ensure that decoded accuracy.
Specifically, the coding/decoding method based on above-mentioned decoding system, after system power-on reset, the marking signal of filter module
Filter_ok is set to 0, and counting submodule counts from zero, if counting submodule value is more than filter window value (filter_
Stop counting when val), marking signal filter_ok sets 1.At the hopping edge of input signal, marking signal filter_ok is set
0, counting submodule is reset, and restarts to count.Therefore, when marking signal filter_ok sets 1, input signal filter successfully,
Filtered input signal is output to saltus step analysis module, and otherwise, the output signal of filter module remains unchanged.Wherein, it filters
Window value filter_val can configure different value, such as system clock 20MHz according to user demand, need to filter out pulse width
Burr less than 1us, then filter_val Configuration Values may be configured as 20.Saltus step analysis module detect every input it is filtered
Level hopping edge in BMC code signals（Rising edge：Rise_edge, failing edge：fall_edge）, while recording each hopping edge
Between interval time time_gap.
The characteristics of according to BMC codes, a data-signal, if the data will produce data jump edge for 1 in this centre；
If the data are 0, level remains unchanged, and does not generate data jump edge.And generate side in each data bit boundary
Boundary hopping edge.Therefore, it as long as either with or without data jump is generated between judging two data bit boundaries hopping edges, can distinguish
Data 0 and 1, to be correctly decoded data.Saltus step analysis module is according to signal hopping edge（rise_edge/fall_edge）And it jumps
Become along time interval time_gap, to distinguish data jump and boundary saltus step.Hopping edge testing process is as shown in figure 3, the saltus step
It can tolerate that pulse width distortion range is +/- 25% along detection method, if it exceeds this range is taken as wrong hopping edge.
BMC code transmission frequencies are 300K, i.e., each data bit transfer time is 3.33us（T=3.33us）.Data jump, boundary are jumped
Become as follows with wrong saltus step decision condition：When hopping edge is arrived：a）Timer value time_gap is more than 5/4T, for wrong saltus step
Edge；B) timer value time_gap is boundary saltus step at time range [3/4T -5/4T]；C) timer value time_gap
Time range [1/4T -3/4T) (do not include 3/4T) when, if a upper hopping edge is boundary saltus step, jumped for data
Become；If a upper hopping edge is data jump, for boundary saltus step.D) timer value time_gap is less than 1/4T, is mistake
Saltus step.
Data decoder module is equipped with data flag signal data1_flag.When detecting data jump, Data Labels letter
Number data1_flag sets 1；When detecting boundary saltus step, then data flag signal data1_flag is set to 0.Data decoder module is set
There is shift register, when detecting boundary saltus step, and when data flag signal data1_flag=1, is write toward shift register
“1”；If data flag signal data1_flag=0, write " 0 " toward shift register.When wrong saltus step, error flag
Err_flag sets 1.After receiving end of data, the value of shift register is exported as decoding data.
BMC codes decoding system and coding/decoding method can be good at solving tradition based on single-point or multi-point sampling method
BMC decoding apparatus job insecurity is easily disturbed, the technical problem that reliability is not high.System structure is simple, and BMC codes
It is higher to decode accuracy rate.
Finally it should be noted that：Each embodiment is described by the way of progressive in this specification, each embodiment emphasis
What is illustrated is all the difference with other embodiments, and just to refer each other for same or similar part between each embodiment, respectively
Technical solution between embodiment can be combined with each other.The above various embodiments is only used to illustrate the technical scheme of the present invention,
Rather than its limitations, although present invention has been described in detail with reference to the aforementioned embodiments, the ordinary skill people of this field
Member still can be with technical scheme described in the above embodiments is modified, either to which part or whole technologies
Feature carries out equivalent replacement；And these modifications or replacements, the present invention that it does not separate the essence of the corresponding technical solution is each to be implemented
The range of example technical solution.
Claims (9)
1. a kind of decoding system of BMC codes, which is characterized in that including contact successively filter module, saltus step analysis module sum number
According to decoder module, wherein：
Filter module, the input signal for receiving BMC codings, and after being filtered to the input signal, output filtering letter
Number；
Saltus step analysis module, the filtering signal for receiving the filter module output, and according to the filtering signal
Hopping edge and bound-time interval, whether analysis current transition is data jump；
Data decoder module is controlled for the analysis result according to the saltus step analysis module in the data decoder module
Corresponding data is written in shift register, is then exported using the data in the shift register as decoding data.
2. system according to claim 1, which is characterized in that the filter module includes counting submodule and filtering flag
Submodule, wherein：
The counting submodule is used to carry out time counting to the process for receiving the input signal, and in the input signal
The hopping edge moment carries out the clearing of time counting value, and the time started counts again after clearing；The counting submodule is additionally operable to
When the time counting value is more than preset filter window value, time count halted, and in the hopping edge of the input signal
Moment carries out the clearing of time counting value, and the time started counts again after clearing；
The filtering flag submodule is used to, when the time counting value is more than preset filter window value, export high level mark
Will signal exports low level marking signal at the hopping edge of the input signal.
3. system according to claim 2, which is characterized in that the saltus step analysis module includes hopping edge detection submodule
Block, timing submodule and judging submodule, wherein：
The hopping edge detection sub-module is used to detect the hopping edge of the filtering signal；
When the timing submodule is used to calculate the saltus step between the adjacent hopping edge that the hopping edge detection sub-module detects
Between be spaced；
Judging submodule is used to judge that current transition is data jump, boundary saltus step or mistake according to the bound-time interval
Saltus step.
4. system according to claim 3, which is characterized in that the data decoder module include Data Labels submodule and
Shift register, wherein：
The Data Labels submodule is used for arriving according to the hopping edge of the data jump determined by the judging submodule
Come and output data mark high level, otherwise, the output data mark low level according to the arrival of the hopping edge of boundary saltus step；
The Data Labels high level that the shift register is used to be exported according to the Data Labels submodule, and in boundary saltus step
Hopping edge arrive when and be written high level deposit signal, according to the Data Labels submodule export the low electricity of Data Labels
It is flat, and low level deposit signal is written when the hopping edge of boundary saltus step is arrived, and after data receiver, output is write
The high level deposit signal and low level deposit signal entered.
5. a kind of coding/decoding method of BMC codes, which is characterized in that include the following steps：
Step 1：Filter module receives the input signal of BMC codings, and after being filtered to the input signal, output filtering letter
Number, enter step 2；
Step 2：Saltus step analysis module receives the filtering signal of the filter module output, and according to the filtering signal
Hopping edge and bound-time interval, whether analysis current transition is data jump, subsequently into step 3；
Step 3：The data decoder module controls the write-in of its shift register according to the analysis result of the saltus step analysis module
Then corresponding data is exported using the data in the shift register as decoding data.
6. according to the method described in claim 5, it is characterized in that, the step 1 specifically comprises the following steps：
Step 11：The filter module receives the input signal of BMC codings, subsequently into step 12；
Step 12：Counting submodule in the filter module is started from scratch carries out the time to the process for receiving the input signal
It counts, subsequently into step 13；
Step 13：The filter module judges whether to detect the hopping edge of the input signal, if it is, entering step
14, otherwise continue time counting, and enter step 15；
Step 14：The counting submodule carries out the clearing of time counting value, and the time started counts again after clearing, then returns
Return step 13；
Step 15：The filter module judges whether the time counting value is more than preset filter window value, if it is, into
Enter step 16, otherwise continue time counting, is then back to step 13；
Step 16：The counting submodule stops counting, and the filtering flag submodule in the filter module exports high level mark
Will signal makes the filter module export level signal identical with the input signal this moment, subsequently into step 17；
Step 17：The filter module judges whether to detect the hopping edge of the input signal, if it is, the filtering is marked
Measure module exports low level marking signal, makes the filter module keep the level signal currently exported constant, and return to step
Rapid 14, if it is not, then return to step 16.
7. according to the method described in claim 6, it is characterized in that, the step 2 specifically comprises the following steps：
Step 21：The saltus step analysis module receives the filtering signal of the filter module output, subsequently into step 22；
Step 22：Whether the hopping edge detection sub-module in the saltus step analysis module detects the saltus step of the filtering signal
Edge, if it is, 23 are entered step, if it is not, then return to step 21；
Step 23：Timing submodule in the saltus step analysis module calculate the hopping edge detection sub-module detect it is adjacent
Bound-time interval between hopping edge, subsequently into step 24；
Step S24：Judging submodule in the saltus step analysis module judges that current transition is according to the bound-time interval
No is data jump.
8. the method according to the description of claim 7 is characterized in that the step S24 specifically comprises the following steps：
When the judging submodule judges that the bound-time interval is more than 5/4 times of individual data bit transmission time, then really
Settled front jumping becomes wrong saltus step；
When the judging submodule judges that the bound-time interval is greater than or equal to 3/4 times of individual data bit transfer
Between, and the individual data bit transmission time less than or equal to 5/4 times, it is determined that current transition is boundary saltus step；
When the judging submodule judges that the bound-time interval is greater than or equal to 1/4 times of individual data bit transfer
Between, and less than 3/4 times of individual data bit transmission time, and when judging a upper saltus step for boundary saltus step, determines and work as front jumping
Become data jump；
When the judging submodule judges that the bound-time interval is greater than or equal to 1/4 times of individual data bit transfer
Between, and less than 3/4 times of individual data bit transmission time, and when judging a upper saltus step for data jump, determines and work as front jumping
Become boundary saltus step；
When the judging submodule judges that the bound-time interval is less than 1/4 times of individual data bit transmission time, then really
Settled front jumping becomes wrong saltus step.
9. according to the method described in claim 8, it is characterized in that, the step 3 specifically comprises the following steps：
Data Labels submodule in the data decoder module is according to the data jump determined by the judging submodule
Hopping edge arrival and output data mark high level, otherwise, the output data according to the arrival of the hopping edge of boundary saltus step
Indicate low level；
The Data Labels high level that the shift register is exported according to the Data Labels submodule, and in the jump of boundary saltus step
Become along the Data Labels low level that high level deposit signal is written, and is exported according to the Data Labels submodule when arriving,
And low level deposit signal is written when the hopping edge of boundary saltus step is arrived；
After the shift register judges data receiver, output high level deposit signal be written and low level deposit
Signal.
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