CN108521232B - Three-phase three-level inverter based on switched capacitor - Google Patents
Three-phase three-level inverter based on switched capacitor Download PDFInfo
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- CN108521232B CN108521232B CN201810385340.9A CN201810385340A CN108521232B CN 108521232 B CN108521232 B CN 108521232B CN 201810385340 A CN201810385340 A CN 201810385340A CN 108521232 B CN108521232 B CN 108521232B
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
- H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
- H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
- H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M7/483—Converters with outputs that each can have more than two voltages levels
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Abstract
The invention discloses a three-phase three-level inverter based on a switched capacitor. The inverter comprises a capacitance voltage stabilizing unit and an output unit, wherein the capacitance voltage stabilizing unit generates a capacitance voltage with the same size as an input voltage, the capacitance voltage is connected with the input voltage in series and superposed to generate a direct current three-level voltage, and the capacitance voltage stabilizing unit can have two different forms; the output unit inverts the DC three-level voltage generated by the capacitor voltage stabilizing unit into the required three-phase AC voltage, and adopts a T-shaped three-phase three-level inverter structure or a diode clamping type three-phase three-level converter structure. The invention can realize the self-balance of the bus capacitor voltage, reduce the resource occupation of the controller, reduce the output harmonic content and ensure that the amplitude of the output alternating-current phase voltage can reach twice of the input direct-current voltage.
Description
Technical Field
The invention belongs to the technical field of power electronic inverters, and particularly relates to a three-phase three-level inverter based on a switched capacitor.
Background
In the aspect of high-voltage high-power inversion, the traditional two-level voltage source inverter cannot be applied due to the problem of voltage resistance of power devices. In recent years, three-level inverters have been widely used in medium-high voltage large-capacity applications due to their unique structural advantages. The most common three-level inverter topologies can be classified into a diode-clamped three-level inverter, a T-type three-level inverter, and a capacitor-clamped three-level inverter. The voltage stress of the power switch tube in the diode clamping type three-level topology is half of the direct-current bus voltage, the number of capacitors is small, and the problem of unbalanced direct-current bus capacitance voltage exists. Compared with a diode-clamped three-level inverter, the T-type three-level inverter has the advantages that six clamping diodes are omitted, topology is simple, however, voltage stress of the switching tubes is inconsistent, and the problem of unbalanced capacitance and voltage exists. The capacitance clamping type multi-level converter topology increases the number of required capacitors along with the increase of the number of levels, and the voltages at two ends of a clamping capacitor are difficult to balance.
The switched capacitor multi-level inverter can obtain the level which is multiplied by the input voltage by using less devices, has no problem of capacitor voltage unbalance, and has attracted much attention at home and abroad in recent years, but is mainly used in the single-phase low-power occasions and is rarely used in the three-phase output occasions.
Disclosure of Invention
The invention aims to provide a three-phase three-level inverter based on a switched capacitor, which realizes the self-balance of the capacitor voltage of a direct current bus.
The technical solution for realizing the purpose of the invention is as follows: a three-phase three-level inverter based on switched capacitor comprises a capacitor voltage stabilizing unit 1 and an output unit 2, wherein:
the capacitance voltage stabilizing unit 1 generates a capacitance voltage equal to the input voltage Vdc, and the capacitance voltage and the input voltage Vdc are superposed in series to generate a direct-current three-level voltage;
the output unit 2 inverts the dc three-level voltage generated by the capacitor voltage stabilizing unit 1 into a desired three-phase ac voltage.
Further, the first structural form of the capacitance-voltage stabilizing unit 1 includes a first capacitor Ca1, a second capacitor Ca2, a first power switch Sa1, a second power switch Sa2, a first diode D1, and a second diode D2; the first power switch Sa1 and the second power switch Sa2 are complementarily turned on, so that the voltages of the first capacitor Ca1 and the second capacitor Ca2 are both equal to the input voltage Vdc, which is specifically as follows:
the negative electrode of the first capacitor Ca1 is connected to the positive electrode of a power supply Vdc, and the connection point is marked as O; the anode of the first capacitor Ca1 is connected to the cathode of the second diode D2, and the connection point is denoted as P; an anode of the second diode D2 is connected to a cathode of the first diode D1; the anode of the first diode D1 is connected to the connection point O; the anode of the second capacitor Ca2 is connected to the cathode of the first diode D1; the cathode of the second capacitor Ca2 is connected to the collector of the first power switch Sa 1; an emitter of the first power switch tube Sa1 is connected to a negative electrode of a power supply Vdc, and a connection point is marked as N; the emitter of the second power switch Sa2 is connected to the collector of the first power switch Sa 1; the collector of the second power switch Sa2 is connected to the connection point O.
Further, the second structural form of the capacitance-voltage stabilizing unit 1 includes a third capacitor Cb1, a fourth capacitor Cb2, a third power switch tube Sb1, a fourth power switch tube Sb2, a fifth power switch tube Sb3, and a sixth power switch tube Sb 4; the third power switch Sb1 and the fourth power switch Sb2 are turned on synchronously, the fifth power switch Sb3 and the sixth power switch Sb4 are turned on synchronously, and the two synchronous conduction are turned on complementarily, so that the voltages of the third capacitor Cb1 and the fourth capacitor Cb2 are equal to the input voltage Vdc, which is specifically as follows:
the negative electrode of the third capacitor Cb1 is connected to the positive electrode of the power supply Vdc, and the connection point is marked as O; the positive electrode of the third capacitor Cb1 is connected to the collector of the sixth power switch Sb4, and the connection point is denoted as P; the emitter of the sixth power switch Sb4 is connected to the collector of the third power switch Sb 3; the emitter of the fifth power switch Sb3 is connected to the connection point O; the anode of the fourth capacitor Cb2 is connected to the emitter of the sixth power switch Sb 4; the negative electrode of the fourth capacitor Cb2 is connected to the collector of the third power switch tube Sb 1; the emitter of the third power switch tube Sb1 is connected to the negative electrode of the power supply Vdc, and the connection point is marked as N; the emitter of the fourth power switch Sb2 is connected to the collector of the third power switch Sb 1; the collector of the fourth power switch Sb2 is connected to the connection point O.
Further, the output unit 2 adopts a T-type three-phase three-level inverter structure, and includes a seventh power switch tube S1, an eighth power switch tube S2, a ninth power switch tube S3, a tenth power switch tube S4, an eleventh power switch tube S5, a twelfth power switch tube S6, a thirteenth power switch tube S7, a fourteenth power switch tube S8, a fifteenth power switch tube S9, a sixteenth power switch tube S10, a seventeenth power switch tube S11, and an eighteenth power switch tube S12;
the emitter of the seventh power switch tube S1 is connected to the connection point O; the collector of the seventh power switch tube S1 is connected to the collector of the eighth power switch tube S2; the emitter of the eighth power switch tube S2 is connected with the emitter of the ninth power switch tube S3, and the connection point is marked as an a-phase alternating current output end; the collector of the ninth power switch tube S3 is connected to the connection point P; the collector of the tenth power switch S4 is connected to the emitter of the ninth power switch S3; the emitter of the tenth power switch tube S4 is connected to the connection point N; the emitter of the eleventh power switch tube S5 is connected to the connection point O; the collector of the eleventh power switch tube S5 is connected with the collector of the twelfth power switch tube S6; the emitter of the twelfth power switch tube S6 is connected with the emitter of the thirteenth power switch tube S7, and the connection point is marked as a b-phase alternating current output end; the collector of the thirteenth power switch tube S7 is connected to the connection point P; the collector of the fourteenth power switch tube S8 is connected to the emitter of the thirteenth power switch tube S7; the emitter of the fourteenth power switch tube S8 is connected to the connection point N; the emitter of the fifteenth power switch tube S9 is connected to the connection point O; the collector of the fifteenth power switch tube S9 is connected with the collector of the sixteenth power switch tube S10; the emitter of the sixteenth power switch tube S10 is connected with the emitter of the seventeenth power switch tube S11, and the connection point is recorded as a c-phase alternating current output end; the collector of the seventeenth power switch tube S11 is connected to the connection point P; the collector of the eighteenth power switch tube S12 is connected to the emitter of the seventeenth power switch tube S11; the emitter of the eighteenth power switch S12 is connected to the connection point N.
Further, the output unit 2 adopts a diode clamping type three-phase three-level converter structure.
Compared with the prior art, the invention has the remarkable advantages that: (1) the voltage of the direct current bus capacitor can be self-balanced, extra balance calculation is not needed by a control algorithm, and the occupied resource and operation delay of a processor are reduced, so that the output harmonic content is reduced; (2) an output phase voltage 2 times the input voltage can be obtained, and thus the input dc voltage amplitude can be reduced.
Drawings
Fig. 1 is a schematic structural diagram of a three-phase three-level inverter based on switched capacitors.
Fig. 2 is a second structural diagram of the capacitor voltage stabilizing unit in the present invention.
Detailed Description
The invention is examined below with the aid of the accompanying drawings and examples.
With reference to fig. 1, the three-phase three-level inverter based on switched capacitors of the present invention includes a capacitor voltage stabilizing unit 1 and an output unit 2, wherein:
the capacitance voltage stabilizing unit 1 generates a capacitance voltage equal to the input voltage Vdc, and the capacitance voltage and the input voltage Vdc are superposed in series to generate a direct-current three-level voltage;
the output unit 2 inverts the dc three-level voltage generated by the capacitor voltage stabilizing unit 1 into a desired three-phase ac voltage.
The capacitance voltage stabilizing unit 1 may adopt different structural forms. The first structure form comprises a first capacitor Ca1, a second capacitor Ca2, a first power switch Sa1, a second power switch Sa2, a first diode D1 and a second diode D2; the first power switch Sa1 and the second power switch Sa2 are conducted complementarily, so that the voltages of the first capacitor Ca1 and the second capacitor Ca2 are equal to the input voltage Vdc. The second structure form comprises a third capacitor Cb1, a fourth capacitor Cb2, a third power switch tube Sb1, a fourth power switch tube Sb2, a fifth power switch tube Sb3 and a sixth power switch tube Sb 4; the third power switch Sb1 and the fourth power switch Sb2 are turned on synchronously, the fifth power switch Sb3 and the sixth power switch Sb4 are turned on synchronously, and the two synchronous breakdowns are turned on complementarily, so that the voltages on the third capacitor Cb1 and the fourth capacitor Cb2 are equal to the input voltage Vdc.
The output unit 2 adopts a T-shaped three-phase three-level inverter structure or a diode clamping type three-phase three-level converter structure.
Example 1
The first structural form of the capacitance voltage stabilizing unit 1 is as follows:
the circuit comprises a first capacitor Ca1, a second capacitor Ca2, a first power switch tube Sa1, a second power switch tube Sa2, a first diode D1 and a second diode D2; the negative electrode of the first capacitor Ca1 is connected to the positive electrode of a power supply Vdc, and the connection point is marked as O; the anode of the first capacitor Ca1 is connected to the cathode of the second diode D2, and the connection point is denoted as P; an anode of the second diode D2 is connected to a cathode of the first diode D1; the anode of the first diode D1 is connected to the connection point O; the anode of the second capacitor Ca2 is connected to the cathode of the first diode D1; the cathode of the second capacitor Ca2 is connected to the collector of the first power switch Sa 1; an emitter of the first power switch tube Sa1 is connected to a negative electrode of a power supply Vdc, and a connection point is marked as N; the emitter of the second power switch Sa2 is connected to the collector of the first power switch Sa 1; the collector of the second power switch Sa2 is connected to the connection point O.
Example 2
With reference to fig. 2, the second structure form of the capacitance voltage stabilizing unit 1 includes a third capacitor Cb1, a fourth capacitor Cb2, a third power switch Sb1, a fourth power switch Sb2, a fifth power switch Sb3, and a sixth power switch Sb 4. The method comprises the following specific steps: the negative electrode of the third capacitor Cb1 is connected to the positive electrode of the power supply Vdc, and the connection point is marked as O; the positive electrode of the third capacitor Cb1 is connected to the collector of the sixth power switch Sb4, and the connection point is denoted as P; the emitter of the sixth power switch Sb4 is connected to the collector of the third power switch Sb 3; the emitter of the fifth power switch Sb3 is connected to the connection point O; the anode of the fourth capacitor Cb2 is connected to the emitter of the sixth power switch Sb 4; the negative electrode of the fourth capacitor Cb2 is connected to the collector of the third power switch tube Sb 1; the emitter of the third power switch tube Sb1 is connected to the negative electrode of the power supply Vdc, and the connection point is marked as N; the emitter of the fourth power switch Sb2 is connected to the collector of the third power switch Sb 1; the collector of the fourth power switch Sb2 is connected to the connection point O.
Example 3
With reference to fig. 1, the output unit 2 adopts a T-type three-phase three-level inverter structure, and includes a seventh power switch tube S1, an eighth power switch tube S2, a ninth power switch tube S3, a tenth power switch tube S4, an eleventh power switch tube S5, a twelfth power switch tube S6, a thirteenth power switch tube S7, a fourteenth power switch tube S8, a fifteenth power switch tube S9, a sixteenth power switch tube S10, a seventeenth power switch tube S11, and an eighteenth power switch tube S12;
the emitter of the seventh power switch tube S1 is connected to the connection point O; the collector of the seventh power switch tube S1 is connected to the collector of the eighth power switch tube S2; the emitter of the eighth power switch tube S2 is connected with the emitter of the ninth power switch tube S3, and the connection point is marked as an a-phase alternating current output end; the collector of the ninth power switch tube S3 is connected to the connection point P; the collector of the tenth power switch S4 is connected to the emitter of the ninth power switch S3; the emitter of the tenth power switch tube S4 is connected to the connection point N; the emitter of the eleventh power switch tube S5 is connected to the connection point O; the collector of the eleventh power switch tube S5 is connected with the collector of the twelfth power switch tube S6; the emitter of the twelfth power switch tube S6 is connected with the emitter of the thirteenth power switch tube S7, and the connection point is marked as a b-phase alternating current output end; the collector of the thirteenth power switch tube S7 is connected to the connection point P; the collector of the fourteenth power switch tube S8 is connected to the emitter of the thirteenth power switch tube S7; the emitter of the fourteenth power switch tube S8 is connected to the connection point N; the emitter of the fifteenth power switch tube S9 is connected to the connection point O; the collector of the fifteenth power switch tube S9 is connected with the collector of the sixteenth power switch tube S10; the emitter of the sixteenth power switch tube S10 is connected with the emitter of the seventeenth power switch tube S11, and the connection point is recorded as a c-phase alternating current output end; the collector of the seventeenth power switch tube S11 is connected to the connection point P; the collector of the eighteenth power switch tube S12 is connected to the emitter of the seventeenth power switch tube S11; the emitter of the eighteenth power switch S12 is connected to the connection point N.
Example 4
The output unit 2 adopts a diode clamping type three-phase three-level converter structure.
In conclusion, the invention can realize the self-balance of the voltage of the bus capacitor, reduce the resource occupation of the controller, reduce the output harmonic content and ensure that the amplitude of the output alternating-current phase voltage can reach twice of the input direct-current voltage.
Claims (4)
1. A three-phase three-level inverter based on switched capacitor, comprising a capacitor voltage stabilizing unit (1) and an output unit (2), wherein:
the capacitance voltage stabilizing unit (1) generates a capacitance voltage which is equal to the input voltage (Vdc), and the capacitance voltage is superposed with the input voltage (Vdc) in series to generate a direct-current three-level voltage;
the output unit (2) inverts the direct-current three-level voltage generated by the capacitance voltage stabilizing unit (1) into the required three-phase alternating-current voltage;
the first structural form of the capacitance voltage stabilizing unit (1) comprises a first capacitor (Ca1), a second capacitor (Ca2), a first power switch tube (Sa1), a second power switch tube (Sa2), a first diode (D1) and a second diode (D2); the first power switch (Sa1) and the second power switch (Sa2) are conducted complementarily, so that the voltages on the first capacitor (Ca1) and the second capacitor (Ca2) are both equal to the input voltage (Vdc), specifically as follows:
the negative electrode of the first capacitor (Ca1) is connected to the positive electrode of a power supply (Vdc), and the connection point is marked as O; the anode of the first capacitor (Ca1) is connected to the cathode of the second diode (D2), and the connection point is marked as P; an anode of the second diode (D2) is connected to a cathode of the first diode (D1); the anode of the first diode (D1) is connected to the connection point O; the anode of the second capacitor (Ca2) is connected to the cathode of the first diode (D1); the negative electrode of the second capacitor (Ca2) is connected to the collector electrode of the first power switch tube (Sa 1); the emitter of the first power switch tube (Sa1) is connected to the negative electrode of the power supply (Vdc), and the connection point is marked as N; the emitter of the second power switch tube (Sa2) is connected to the collector of the first power switch tube (Sa 1); the collector of the second power switch (Sa2) is connected to the connection point O.
2. A three-phase three-level inverter based on switched capacitor, comprising a capacitor voltage stabilizing unit (1) and an output unit (2), wherein:
the capacitance voltage stabilizing unit (1) generates a capacitance voltage which is equal to the input voltage (Vdc), and the capacitance voltage is superposed with the input voltage (Vdc) in series to generate a direct-current three-level voltage;
the output unit (2) inverts the direct-current three-level voltage generated by the capacitance voltage stabilizing unit (1) into the required three-phase alternating-current voltage;
the second structural form of the capacitance voltage stabilizing unit (1) comprises a third capacitor (Cb1), a fourth capacitor (Cb2), a third power switch tube (Sb1), a fourth power switch tube (Sb2), a fifth power switch tube (Sb3) and a sixth power switch tube (Sb4), and specifically comprises the following steps:
the negative electrode of the third capacitor (Cb1) is connected to the positive electrode of the power supply (Vdc), and the connection point is marked as O; the positive electrode of the third capacitor (Cb1) is connected to the collector electrode of the sixth power switch tube (Sb4), and the connection point is marked as P; the emitter of the sixth power switch tube (Sb4) is connected to the collector of the third power switch tube (Sb 3); the emitter of the fifth power switch tube (Sb3) is connected to the connection point O; the positive electrode of the fourth capacitor (Cb2) is connected to the emitter of the sixth power switch tube (Sb 4); the negative electrode of the fourth capacitor (Cb2) is connected to the collector electrode of the third power switch tube (Sb 1); the emitter of the third power switch tube (Sb1) is connected to the negative electrode of the power supply (Vdc), and the connection point is marked as N; the emitter of the fourth power switch tube (Sb2) is connected to the collector of the third power switch tube (Sb 1); the collector of the fourth power switch (Sb2) is connected to the connection point O.
3. The switched capacitor-based three-phase three-level inverter according to claim 1 or 2, wherein the output unit (2) adopts a T-type three-phase three-level inverter structure, and comprises a seventh power switch tube (S1), an eighth power switch tube (S2), a ninth power switch tube (S3), a tenth power switch tube (S4), an eleventh power switch tube (S5), a twelfth power switch tube (S6), a thirteenth power switch tube (S7), a fourteenth power switch tube (S8), a fifteenth power switch tube (S9), a sixteenth power switch tube (S10), a seventeenth power switch tube (S11), and an eighteenth power switch tube (S12);
an emitter of the seventh power switch tube (S1) is connected with a connection point O; the collector of the seventh power switch tube (S1) is connected with the collector of the eighth power switch tube (S2); the emitter of the eighth power switch tube (S2) is connected with the emitter of the ninth power switch tube (S3), and the connection point is marked as an a-phase alternating current output end; the collector of the ninth power switch tube (S3) is connected with the connection point P; the collector of the tenth power switch (S4) is connected to the emitter of the ninth power switch (S3); the emitter of the tenth power switch tube (S4) is connected with the connection point N; the emitter of the eleventh power switch tube (S5) is connected with the connection point O; the collector of the eleventh power switch tube (S5) is connected with the collector of the twelfth power switch tube (S6); the emitter of the twelfth power switch tube (S6) is connected with the emitter of the thirteenth power switch tube (S7), and the connection point is marked as a b-phase alternating current output end; the collector of the thirteenth power switch tube (S7) is connected with the connection point P; the collector of the fourteenth power switch tube (S8) is connected to the emitter of the thirteenth power switch tube (S7); the emitter of the fourteenth power switch tube (S8) is connected with the connection point N; the emitter of the fifteenth power switch tube (S9) is connected with the connection point O; the collector of the fifteenth power switch tube (S9) is connected with the collector of the sixteenth power switch tube (S10); the emitter of the sixteenth power switch tube (S10) is connected with the emitter of the seventeenth power switch tube (S11), and the connection point is recorded as a c-phase alternating current output end; the collector of the seventeenth power switch tube (S11) is connected with the connection point P; the collector of the eighteenth power switch (S12) is connected to the emitter of the seventeenth power switch (S11); the emitter of the eighteenth power switching tube (S12) is connected to the connection point N.
4. The switched-capacitor based three-phase three-level inverter according to claim 1 or 2, characterized in that the output unit (2) employs a diode-clamped three-phase three-level converter structure.
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| CN110572061B (en) * | 2019-08-14 | 2021-02-26 | 郑州大学 | Hybrid T-type multi-level inverter and control method thereof |
| CN111224574B (en) * | 2020-02-13 | 2021-08-03 | 广东工业大学 | Multi-level conversion system |
| CN115864833B (en) * | 2022-12-09 | 2023-06-16 | 广东工业大学 | Embedded multi-level reconfigurable switched capacitor converter |
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| CN106712599A (en) * | 2017-01-23 | 2017-05-24 | 哈尔滨工程大学 | Commutation torque ripple suppression device and suppression method for brushless DC motor |
| CN206790354U (en) * | 2017-06-09 | 2017-12-22 | 江苏固德威电源科技股份有限公司 | The two-way charging device of the more level of high-frequency isolation series resonance |
| CN107733271A (en) * | 2017-11-14 | 2018-02-23 | 山东奥太电气有限公司 | A kind of circuit structure and method for realizing three-level inverter circuit neutral-point potential balance |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106712599A (en) * | 2017-01-23 | 2017-05-24 | 哈尔滨工程大学 | Commutation torque ripple suppression device and suppression method for brushless DC motor |
| CN206790354U (en) * | 2017-06-09 | 2017-12-22 | 江苏固德威电源科技股份有限公司 | The two-way charging device of the more level of high-frequency isolation series resonance |
| CN107733271A (en) * | 2017-11-14 | 2018-02-23 | 山东奥太电气有限公司 | A kind of circuit structure and method for realizing three-level inverter circuit neutral-point potential balance |
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