CN108447445B - Pixel circuit, display panel and driving method thereof - Google Patents
Pixel circuit, display panel and driving method thereof Download PDFInfo
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- CN108447445B CN108447445B CN201810289385.6A CN201810289385A CN108447445B CN 108447445 B CN108447445 B CN 108447445B CN 201810289385 A CN201810289385 A CN 201810289385A CN 108447445 B CN108447445 B CN 108447445B
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
- G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
- G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
- G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
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Abstract
The invention provides a pixel circuit which comprises a driving transistor, a storage compensation module, a light emitting diode, a data writing module, a light emitting control module and a setting module, wherein the control end of the setting module is electrically connected with the control end of the storage compensation module, the input end of the setting module is electrically connected with a reference voltage signal end, and when the control end of the setting module receives a first scanning signal, the input end of the setting module is conducted with the output end of the setting module. The invention also provides a display panel and a driving method of the display panel. The pixel circuit allows less wiring to be provided in the display panel, improving the resolution of the display panel.
Description
Technical Field
The present invention relates to the field of display devices, and in particular, to a pixel circuit, a display panel including the pixel circuit, and a driving method of the display panel.
Background
The organic light emitting diode display panel is widely used due to advantages such as strong color expression capability.
In the organic light emitting diode display panel, the organic light emitting diode is driven to emit light by providing a pixel circuit in a pixel unit.
A typical pixel circuit of the 2T1C type is shown in fig. 1. The pixel circuit includes a driving transistor DTFT, a switching transistor T1, and a storage capacitor C.
Due to the limitation of the process level, the threshold voltages of the different driving transistors DTFT are not uniform (threshold voltage shift), and a phenomenon of luminance non-uniformity occurs when driving the organic light emitting diode.
To avoid threshold voltage drift, a storage compensation module may be provided in the pixel circuit. When the storage compensation module is added, a reset module needs to be arranged in the pixel circuit to reset the storage compensation module and the gate of the driving transistor DTFT.
In order to supply the pixel circuits with corresponding signals, a large number of wirings, for example, gate lines, reset signal lines, data lines, and the like, need to be provided, occupying a large space, and affecting the arrangement of thin film transistors in the pixel circuits.
Therefore, how to reduce the number of wirings while supplying various signals to the pixel circuit becomes a technical problem to be solved in the art.
Disclosure of Invention
The invention aims to provide a pixel circuit, a display panel comprising the pixel circuit and a driving method of the display panel. The pixel circuit requires fewer signal lines, thereby saving space.
In order to achieve the above object, as one aspect of the present invention, there is provided a pixel circuit, wherein the pixel circuit includes a driving transistor, a memory compensation module, a light emitting diode, a data writing module, a light emission control module, and a setting module,
a first pole of the driving transistor is electrically connected with a first end of the light-emitting control module and an output end of the data writing module, a second pole of the driving transistor is electrically connected with a second end of the light-emitting control module, and a grid electrode of the driving transistor is electrically connected with a first end of the storage compensation module;
when the control end of the light emitting control module receives a first light emitting control signal, the third end of the light emitting control module is conducted with the third end of the light emitting control module and the fifth end of the light emitting control module, and the second end of the light emitting control module is conducted with the fourth end of the light emitting control module;
the second end of the storage compensation module is electrically connected with the second pole of the driving transistor, the third end of the storage compensation module is electrically connected with the output end of the setting module, and when the control end of the storage compensation module receives a first scanning signal, the first end of the storage compensation module and the second end of the storage compensation module are conducted to store the threshold voltage of the driving transistor and the data voltage written by the data writing module;
the control end of the data writing module is electrically connected with the control end of the storage compensation module, and when the control end of the data writing module receives the first scanning signal, the input end of the data writing module is conducted with the output end of the data writing module;
the control end of the setting module is electrically connected with the control end of the storage compensation module, the input end of the setting module is electrically connected with the reference voltage signal end, and when the control end of the setting module receives a first scanning signal, the input end of the setting module is conducted with the output end of the setting module.
Preferably, the storage compensation module comprises a compensation transistor and a storage capacitor,
the first end of the storage capacitor is formed as the third end of the storage compensation module, and the second end of the storage capacitor is formed as the first end of the storage compensation module;
the gate of the compensation transistor is formed as the control terminal of the storage compensation module, the first pole of the compensation transistor is electrically connected with the second terminal of the storage capacitor, the second pole of the compensation transistor is formed as the second terminal of the storage compensation module, the first pole of the compensation transistor and the second pole of the compensation transistor can be turned on when the gate of the compensation transistor receives a first scanning signal, the first pole of the compensation transistor and the second pole of the compensation transistor can be turned off when the gate of the compensation transistor receives a second scanning signal, and the first scanning signal and the second scanning signal have opposite phases.
Preferably, the light emission control module includes a first light emission control transistor, a second light emission control transistor, and a third light emission control transistor, a gate of the first light emission control transistor, a gate of the second light emission control transistor, and a gate of the third light emission control transistor are connected and formed as a control terminal of the light emission control transistor,
a first pole of the first light emitting control transistor is formed as a third end of the light emitting control module, a second pole of the first light emitting control transistor is formed as a first end of the light emitting control module, the first pole of the first light emitting control transistor and the second pole of the first light emitting control transistor can be turned on when the gate of the first light emitting control transistor receives a first light emitting control signal, and the first pole of the first light emitting control transistor and the second pole of the first light emitting control transistor can be turned off when the gate of the first light emitting control transistor receives a second light emitting control signal, wherein the first light emitting control signal and the second light emitting control signal have opposite phases;
a first electrode of the second light emission control transistor is formed as a second end of the light emission control transistor, a second electrode of the second light emission control transistor is formed as a fourth end of the light emission control transistor, the first electrode of the second light emission control transistor and the second electrode of the second light emission control transistor can be turned on when the gate of the second light emission control transistor receives a first light emission control signal, and the first electrode of the second light emission control transistor and the second electrode of the second light emission control transistor can be turned off when the gate of the second light emission control transistor receives a second light emission control signal;
the first pole of the third light emission control transistor is electrically connected to the first pole of the first light emission control transistor, the second pole of the third light emission control transistor is formed as a fifth terminal of the light emission control module, the first pole of the third light emission control transistor and the second pole of the third light emission control transistor can be turned on when the gate of the third light emission control transistor receives the first light emission control signal, and the first pole of the third light emission control transistor and the second pole of the third light emission control transistor can be turned off when the gate of the third light emission control transistor receives the second light emission control signal.
Preferably, the data writing module includes a data writing transistor, a gate of the data writing transistor is formed as a control terminal of the data writing module, a first pole of the data writing transistor is formed as an input terminal of the data writing module, a second pole of the data writing transistor is formed as an output terminal of the data writing module, the first pole of the data writing transistor and the second pole of the data writing transistor can be turned on when the gate of the data writing transistor receives a first scanning signal, and the first pole of the data writing transistor and the second pole of the data writing transistor can be turned off when the gate of the data writing transistor receives a second scanning signal, and the first scanning signal and the second scanning signal have opposite phases.
Preferably, the set module includes a set transistor,
the gate of the set transistor is formed as the control terminal of the set module, the first pole of the set transistor is formed as the input terminal of the set module, the second pole of the set transistor is formed as the output terminal of the set module, the first pole of the set transistor and the second pole of the set transistor can be switched on when the gate of the set transistor receives a first scanning signal, the first pole of the set transistor and the second pole of the set transistor can be switched off when the gate of the set transistor receives a second scanning signal, and the phases of the first scanning signal and the second scanning signal are opposite.
Preferably, the driving transistor is a P-type transistor, the first scan signal is a low level signal, and the first light emission control signal is a low level signal.
As a second aspect of the present invention, a display panel is provided, where the display panel includes a plurality of gate lines, a plurality of data lines, and a plurality of light-emitting control lines, where the gate lines and the data lines divide the display panel into a plurality of pixel units, each pixel unit is provided with a pixel circuit, each row of pixel units corresponds to one gate line, each row of pixel units corresponds to one light-emitting control line, and a same column of pixel units corresponds to one data line, where the pixel circuit is the pixel circuit provided in the present invention, a control end of the storage compensation module is electrically connected to the corresponding gate line, a control end of the light-emitting control module is electrically connected to the corresponding light-emitting control line, and an input end of the data write module is electrically connected to the corresponding data line.
As a third aspect of the present invention, there is provided a driving method of a display panel, wherein the display panel is the display panel provided by the present invention, the driving method includes a plurality of driving periods, each driving period includes:
in a setting phase, providing a first scanning signal to a grid line and providing a first light-emitting control signal to a light-emitting control signal line, wherein the setting phase can last for a first preset time period;
in a data writing phase, providing a first scanning signal to the grid line, providing a second light-emitting control signal to the light-emitting control signal line, and providing a data signal to the data line, wherein the data writing phase lasts for a second preset time which is more than the first preset time;
in a light emitting stage, a second scan signal is supplied to the gate line, and a first light emission control signal is supplied to the light emission control signal line, wherein,
the first scan signal is opposite in phase to the second scan signal, and the first light emission control signal is opposite in phase to the second light emission control signal.
Preferably, the first predetermined time lasts for 0.5 μ s to 1.5 μ s.
In the pixel circuit provided by the invention, each module in the pixel circuit can be controlled only by two signal lines, namely the grid line and the light-emitting control signal line. Specifically, the setting module is controlled by using the light-emitting control signal line for controlling the light-emitting control module, the control data writing module and the scanning signal line for storing the compensation module, and a reset signal line is not required to be specially arranged, so that the number of wiring lines can be reduced, and more pixel circuits can be arranged on a display panel comprising the pixel circuits, so that the display panel with high resolution can be realized.
Drawings
The accompanying drawings, which are included to provide a further understanding of the invention and are incorporated in and constitute a part of this specification, illustrate embodiments of the invention and together with the description serve to explain the principles of the invention and not to limit the invention. In the drawings:
FIG. 1 is a circuit schematic of a 2T1C pixel circuit;
FIG. 2 is a block diagram of a pixel circuit according to the present invention;
FIG. 3 is a signal timing diagram of a pixel circuit provided by the present invention;
FIG. 4 is an embodiment of a pixel circuit of the pixel circuit provided by the present invention;
FIG. 5 is an equivalent circuit diagram of the pixel circuit provided by the present invention in the set phase;
FIG. 6 is an equivalent circuit diagram of the pixel circuit provided by the present invention in the data writing phase;
fig. 7 is an equivalent circuit diagram of the pixel circuit provided by the invention in the light-emitting stage.
Description of the reference numerals
110: the storage compensation module 120: data writing module
130: light emission control module 140: setting module
Detailed Description
The following detailed description of embodiments of the invention refers to the accompanying drawings. It should be understood that the detailed description and specific examples, while indicating the present invention, are given by way of illustration and explanation only, not limitation.
The present invention provides a pixel circuit, as shown in fig. 1, the pixel circuit includes a driving transistor T1, a storage compensation module 110, a light emitting diode OLED, a data writing module 120, a light emitting control module 130, and a setting module 140.
A first electrode of the driving transistor T1 is electrically connected to the first terminal of the light emitting control module 130 and the output terminal of the data writing module 120, a second electrode of the driving transistor T1 is electrically connected to the second terminal of the light emitting control module 130 and the second terminal of the storage compensation module 110, and a gate of the driving transistor T1 is electrically connected to the first terminal of the storage compensation module 110.
The third terminal of the light-emitting control module 130 is electrically connected to the high-level signal terminal ELVdd, the fourth terminal of the light-emitting control module 130 is electrically connected to the anode of the light-emitting diode OLED, and the fifth terminal of the light-emitting control module 130 is electrically connected to the third terminal of the storage compensation module 110. When the control terminal of the lighting control module 130 receives the first lighting control signal, the third terminal of the lighting control module 130 is connected to the first terminal of the lighting control module 130 and the fifth terminal of the lighting control module 130, and the second terminal of the lighting control module 130 is connected to the fourth terminal of the lighting control module 130.
The third terminal of the storage compensation module 110 is electrically connected to the output terminal of the setting module 140. When the control terminal of the storage compensation module 110 receives the first scan signal, the first terminal of the storage compensation module 110 and the second terminal of the storage compensation module 110 are turned on to store the threshold voltage of the driving transistor T1 and the data voltage written by the data writing module 120.
The control terminal of the data writing module 120 is electrically connected to the control terminal of the storage compensation module 110, and when the control terminal of the data writing module 120 receives the first scan signal, the input terminal of the data writing module 120 is connected to the output terminal of the data writing module 120.
The control terminal of the setting module 140 is electrically connected to the control terminal of the storage compensation module 110, and the input terminal of the setting module 140 is electrically connected to the reference voltage signal terminal Vref. When the control terminal of the setting module 140 receives the first scan signal, the input terminal of the setting module 140 is connected to the output terminal of the setting module 140.
In the pixel circuit provided by the invention, each module in the pixel circuit can be controlled only by two signal lines, namely the grid line and the light-emitting control signal line. Specifically, the set module 140 is controlled by the scan signal line without specially setting the reset signal line, so that the number of wirings can be reduced and more pixel circuits can be allowed to be provided on a display panel including the pixel circuits to realize a high-resolution display panel.
In the present invention, the driving transistor T1 is used for driving the light emitting diode OLED to emit light, and the second input terminal Vref of the setting module 140 is used for inputting the reset reference voltage.
The operation of the pixel circuit provided by the present invention is described below with reference to the signal timing diagram of fig. 3.
The duty cycle of the pixel circuit includes a set phase t0, a data write phase t1, and a light emission phase t 2. The first and second scan signals have opposite phases, and the first and second light emission control signals have opposite phases.
In the set phase t0, the first light emitting control signal is provided to the control terminal of the light emitting control module 130, the first scan signal is provided to the control terminal of the storage compensation module 110, and the data signal is not provided. During the set phase t0, the input terminal of the set block 140 is conducted to the output terminal of the set block 140. At this stage, the gate of the driving transistor T1 is turned on with the second pole of the driving transistor T1 to be diode-connected, and the gate of the driving transistor T1 is turned on with the output terminal of the set block 140. Since the third terminal of the light-emitting control module 130 is conducted with the first terminal of the light-emitting control module 130 and the fifth terminal of the light-emitting control module 130, the second terminal of the light-emitting control module 130 is conducted with the fourth terminal of the light-emitting control module 130. The driving transistor T1 forms a diode connection, and the cathode of the light emitting diode OLED is electrically connected to the low-level signal terminal, so that the gate of the driving transistor T1 and the second electrode of the driving transistor discharge to the anode of the light emitting diode OLED. The gate voltage of the driving transistor T1 may be discharged to min (vdata) -max (vth). Where min (vdata) is the minimum value among all data signals, and max (vth) is the maximum value among the threshold voltages of all driving transistors. When designing a display panel, there is a corresponding requirement for the error range of the threshold voltage of the driving transistor. When the threshold voltage of the driving transistor is at VthminAnd VthmaxIn between, the driving transistor is considered to be a qualified product meeting the production requirements. Max (Vth) above may be Vthmax. And, during the set phase t0, the reference voltage provided by the reference voltage signal terminal Vref is written into the third terminal of the storage compensation module 110, so that the data writing phase can correctly write the data voltage into the storage compensation module 110.
Preferably, this phase should be sufficiently short that the light emitting diode OLED emits light negligibly. As a preferred embodiment, the setting phase t0 may last from 0.5 μ s to 1.5 μ s, so that the influence on the display contrast may be reduced. When the time T0 is set, the threshold voltage Vth of the driving transistor T1 may be compensated when the gray scale of the pixel unit changes from 0 to 255. In the set phase T0, no data voltage is input, so that the driving transistor T1 and the high signal terminal can be influenced in the set phase T0, and the normal display in the light-emitting phase T2 can be ensured.
In the data writing phase t1, the second light emitting control signal is provided to the control terminal of the light emitting control module 130, the first scan signal is provided to the control terminal of the storage compensation module 110, and the data voltage is provided to the input terminal of the data writing module 120. The data write module 120 writes the data voltage to the first pole of the driving transistor T1. Since the control terminal of the storage compensation module 110 is the first scan signal at this time, the input terminal of the set module 140 is turned on with the output terminal of the set module, so that the reset reference voltage provided by the reset reference voltage signal terminal Vref is provided to the gate of the driving transistor T1, and the driving transistor T1 is diode-connected, and at the same time, since the driving transistor T1 is diode-connected, the threshold voltage Vth written in the driving transistor T1 and the data voltage written in the first pole of the driving transistor T1 are stored in the storage compensation module 110. Since the first terminal of the light emitting control module 130 is disconnected from the third terminal of the light emitting control module 130, and the second terminal of the light emitting control module 130 is disconnected from the fourth terminal of the light emitting control module 130, the light emitting diode OLED does not emit light.
In the light emitting period t2, the first light emitting control signal is provided to the control terminal of the light emitting control module 130, the second scan signal is provided to the control terminal of the storage compensation module 110, and the data voltage supply is stopped. The first terminal of the light-emitting control module 130 is connected to the third terminal of the light-emitting control module 130, the second terminal of the light-emitting control module 130 is connected to the fourth terminal of the light-emitting control module 130, and the storage compensation module 110 starts to discharge. Since the threshold voltage Vth of the driving transistor T1 is already stored in the memory compensation module 110 in the data writing phase, the current driving the organic light emitting diode OLED to emit light is no longer affected by the threshold voltage of the driving transistor T1 in the light emitting phase, so that the uniformity of the display luminance of the display panel including the pixel circuit can be improved.
In the present invention, the specific structure of the storage compensation module 110 is not particularly limited, and as a preferred embodiment, as shown in fig. 4, the storage compensation module 110 includes a compensation transistor T2 and a storage capacitor C.
A first terminal of the storage capacitor C is formed as a third terminal of the storage compensation module 110, and a second terminal of the storage capacitor C is formed as a first terminal of the storage compensation module 110.
The gate of the compensation transistor T2 is formed as the control terminal of the memory compensation module 110, the first pole of the compensation transistor T2 is electrically connected to the second terminal of the storage capacitor C, and the second pole of the compensation transistor T2 is formed as the second terminal of the memory compensation module 110. The first pole of the compensation transistor T2 and the second pole of the compensation transistor T2 can be turned on when the gate of the compensation transistor T2 receives the first scan signal, and the first pole of the compensation transistor T2 and the second pole of the compensation transistor T2 can be turned off when the gate of the compensation transistor receives the second scan signal.
In the present invention, the specific structure of the light-emitting control module 130 is not particularly limited. In the specific embodiment shown in fig. 4, the light emission control module 130 includes a first light emission control transistor T6, a second light emission control transistor T7, and a third light emission control transistor T5.
The gate of the first light emission control transistor T6 is connected to the gate of the second light emission control transistor T7 and is formed as a control terminal of the light emission control transistor.
A first pole of the first light emitting control transistor T6 is formed as a third terminal of the light emitting control module 130, and a second pole of the first light emitting control transistor T6 is formed as a first terminal of the light emitting control module 130. The first pole of the first light emitting control transistor T6 and the second pole of the first light emitting control transistor T6 can be turned on when the gate of the first light emitting control transistor T6 receives a first light emitting control signal, and the first pole of the first light emitting control transistor T6 and the second pole of the first light emitting control transistor T6 can be turned off when the gate of the first light emitting control transistor T6 receives a second light emitting control signal.
A first pole of the second light emission controlling transistor T7 is formed as a second terminal of the light emission controlling transistor 130, and a second pole of the second light emission controlling transistor T7 is formed as a fourth terminal of the light emission controlling transistor 130. The first pole of the second light emission controlling transistor T7 and the second pole of the second light emission controlling transistor T7 can be turned on when the gate of the second light emission controlling transistor T7 receives the first light emission control signal, and the first pole of the second light emission controlling transistor T7 and the second pole of the second light emission controlling transistor T7 can be turned off when the gate of the second light emission controlling transistor T7 receives the second light emission control signal.
A first pole of the third light emission control transistor T5 is electrically connected to the first pole of the first light emission control transistor T6, a second pole of the third light emission control transistor T5 is formed as a fifth terminal of the light emission control module 130, the first pole of the third light emission control transistor T5 and the second pole of the third light emission control transistor T5 can be turned on when the gate of the third light emission control transistor T5 receives the first light emission control signal, and the first pole of the third light emission control transistor T5 and the second pole of the third light emission control transistor T5 can be turned off when the gate of the third light emission control transistor T5 receives the second light emission control signal.
The third light emission controlling transistor T5 is provided to ensure that the gate of the driving transistor T1 is properly biased during the light emission period, thereby ensuring that the light emitting diode OLED can emit light normally.
In the embodiment shown in fig. 4, the data writing module 120 includes a data writing transistor T4, a gate of the data writing transistor T4 is formed as a control terminal of the data writing module 120, a first pole of the data writing transistor T4 is formed as an input terminal of the data writing module 120, and a second pole of the data writing transistor T4 is formed as an output terminal of the data writing module 120.
The first pole of the data writing transistor T4 and the second pole of the data writing transistor T4 can be turned on when the gate of the data writing transistor T4 receives a first scan signal, and the first pole of the data writing transistor T4 and the second pole of the data writing transistor T4 can be turned off when the gate of the data writing transistor T4 receives a second scan signal.
As shown in fig. 4, the set block 140 includes a set transistor T3. The gate of the set transistor T3 is formed as the control terminal of the set block 140, the first pole of the set transistor T3 is formed as the input terminal of the set block 140, and the second pole of the set transistor T3 is formed as the output terminal of the set block 140. When the gate of the set transistor T3 receives the first scan signal, the first and second poles of the set transistor T3 are turned on. When the gate of the set transistor T3 receives the second scan signal, the first and second poles of the set transistor T3 are turned off.
In the present invention, the type of each signal may be determined according to the type of each transistor. In the embodiment shown in fig. 2 and 4, the driving transistor T1 is a P-type transistor. In this embodiment, the first scan signal is a low level signal, the second scan signal is a high level signal, the first emission control signal is a low level signal, and the second emission control signal is a high level signal.
In the embodiment shown in fig. 4, all transistors are P-type transistors.
The operating principle of the pixel circuit shown in fig. 4 is further explained and explained below with reference to fig. 3 to 7.
As shown in fig. 4, the storage compensation module 110 of the pixel circuit includes a storage capacitor C and a compensation transistor T2. The data write module 120 includes a data write transistor T4. The light emission control module 130 includes a first light emission control transistor T6, a second light emission control transistor T7, and a third light emission control transistor T5. The set block 140 includes a set transistor T3.
All transistors in the pixel circuit are P-type transistors.
In the set phase t0, the data voltage Vdata is not supplied to the input terminal of the data write module 120, the first emission control signal is supplied to the control terminal of the emission control module 130, and the first scan signal is supplied to the control terminal of the storage compensation module. In the set stage, the compensation transistor T2, the set transistor T3, the data write transistor T4, the first light emission control transistor T6, the second light emission control transistor T7, and the third light emission control transistor T5 are all turned on, and the driving transistor T1 forms a diode connection. Shown in fig. 5 is an equivalent circuit of the set phase t 0. The set transistor T3, the data write transistor T4, the first light emission control transistor T6, the second light emission control transistor T7, and the third light emission control transistor T5 are all equivalent to resistors, and the resistance value is the internal resistance of each transistor. At this time, the second terminal of the storage capacitor C discharges to the anode of the light emitting diode OLED. The purpose of resetting the gate of the driving transistor and the storage capacitor C can be achieved as long as the voltage at the second end of the storage capacitor C is less than min (vdata) -max (vth).
In the data writing phase T1, the threshold voltage Vth of the driving transistor T1 and the data voltage Vdata need to be written into the storage capacitor C. Specifically, the second light emission control signal is provided to the control terminal of the light emission control module 130, the first scan signal is provided to the control terminal of the storage compensation module 110, and the data voltage is provided to the input terminal of the data write module 120. The data write module 120 writes the data voltage to the first pole of the driving transistor T1. Shown in fig. 6 is an equivalent circuit diagram of the pixel circuit at the data writing stage t 1. The compensation transistor T2, the second set transistor T3, and the data write transistor T4 are turned on, and the first light emission control transistor T6, the second light emission control transistor T7, and the third light emission control transistor T5 are turned off. At this time, the voltage of the first terminal of the storage capacitor C is Vref, and the voltage of the second terminal of the storage capacitor C is Vdata- | Vth |. Therefore, the voltage difference between the two ends of the storage capacitor C is Vdata- | Vth | -Vref.
In the light emitting period t2, the first light emitting control signal is provided to the control terminal of the light emitting control module 130, the second scan signal is provided to the control terminal of the storage compensation module 110, and the data voltage supply is stopped. Shown in fig. 7 is an equivalent circuit diagram of a lighting period T2 at which the compensation transistor T2, the set transistor T3, and the data write transistor T4 are turned off, and the third light emission control transistor T5, the first light emission control transistor T6, and the second light emission control transistor T7 are turned on. At this time, the first terminal of the storage capacitor C is clamped to the high-level signal terminal ELVdd, and the voltage at the second terminal of the storage capacitor C is V ═ ELVdd + Vdata- | Vth | -Vref. The ELVDD is a voltage provided by the high-level signal terminal ELVDD, Vdata is a data voltage, and Vref is a reference voltage.
The gate-source voltage difference Vgs of the driving transistor T1 is V-ELVDD Vdata-Vth-Vref.
The drive current is calculated according to the following formula (1):
the drive current can be derived as shown in equation (2):
ids is a driving current generated by the driving transistor;
cox is the intrinsic capacitance of the drive transistor;
μ is the mobility coefficient of the drive transistor;
vref is a reference voltage input by a reference voltage input end;
vdata is a data voltage.
The output current of the present pixel circuit is independent of the threshold voltage to the driving transistor T1 and independent of the voltage of the high-level signal terminal ELVdd (i.e., the pixel circuit is not affected by the resistance Drop (IR Drop) when operating), i.e., the pixel circuit can compensate for the driving transistor T1 and the voltage ELVdd provided at the high-level signal terminal.
As a second aspect of the present invention, a display panel is provided, where the display panel includes a plurality of Gate lines, a plurality of Data lines, and a plurality of light-emitting control lines, where the Gate lines and the Data lines divide the display panel into a plurality of pixel units, each pixel unit is provided with a pixel circuit, each row of pixel units corresponds to one Gate line Gate, each row of pixel units corresponds to one light-emitting control line EM, and a same column of pixel units corresponds to one Data line Data, where the pixel circuit is the pixel circuit provided in the present invention, a control end of the storage compensation module is electrically connected to a corresponding Gate line, a control end of the light-emitting control module is electrically connected to a corresponding light-emitting control line, and an input end of the Data writing module is electrically connected to a corresponding Data line.
The advantages of the pixel circuit provided by the present invention have been described in detail above, and therefore, the description thereof is omitted here for the sake of brevity.
As a third aspect of the present invention, there is provided a driving method of a display panel, wherein the display panel is the display panel provided by the present invention, the driving method includes a plurality of driving periods, each driving period includes:
in a setting phase, providing a first scanning signal to a grid line and providing a first light-emitting control signal to a light-emitting control signal line, wherein the setting phase can last for a first preset time period;
in a data writing phase, providing a first scanning signal to the grid line, providing a second light-emitting control signal to the light-emitting control signal line, and providing a data signal to the data line, wherein the data writing phase lasts for a second preset time which is more than the first preset time;
in a light emitting stage, a second scan signal is supplied to the gate line, and a first light emission control signal is supplied to the light emission control signal line.
Wherein the first scan signal is opposite in phase to the second scan signal, and the first light emission control signal is opposite in phase to the second light emission control signal.
Preferably, the first predetermined time lasts for 0.5 μ s to 1.5 μ s, so that it is possible to ensure both the normal service of the gate electrode of the driving transistor T1 and the normal light emission of the organic light emitting diode.
The operation principle of the pixel circuit in the display panel has been described in detail above, and is not described herein again.
It will be understood that the above embodiments are merely exemplary embodiments taken to illustrate the principles of the present invention, which is not limited thereto. It will be apparent to those skilled in the art that various modifications and improvements can be made without departing from the spirit and substance of the invention, and these modifications and improvements are also considered to be within the scope of the invention.
Claims (9)
1. A pixel circuit is characterized by comprising a driving transistor, a storage compensation module, a light emitting diode, a data writing module, a light emitting control module and a setting module,
a first pole of the driving transistor is electrically connected with a first end of the light emitting control module and an output end of the data writing module, a second pole of the driving transistor is electrically connected with a second end of the light emitting control module and a second end of the storage compensation module, and a grid electrode of the driving transistor is electrically connected with a first end of the storage compensation module;
when the control end of the light emitting control module receives a first light emitting control signal, the third end of the light emitting control module is conducted with the third end of the light emitting control module and the fifth end of the light emitting control module, and the second end of the light emitting control module is conducted with the fourth end of the light emitting control module;
the third end of the storage compensation module is electrically connected with the output end of the setting module, and when the control end of the storage compensation module receives a first scanning signal, the first end of the storage compensation module is conducted with the second end of the storage compensation module so as to store the threshold voltage of the driving transistor and the data voltage written by the data writing module;
the control end of the data writing module is electrically connected with the control end of the storage compensation module, and when the control end of the data writing module receives the first scanning signal, the input end of the data writing module is conducted with the output end of the data writing module;
the control end of the setting module is electrically connected with the control end of the storage compensation module, the input end of the setting module is electrically connected with the reference voltage signal end, and when the control end of the setting module receives a first scanning signal, the input end of the setting module is conducted with the output end of the setting module;
in a setting phase, providing a first scanning signal to a grid line and providing a first light-emitting control signal to a light-emitting control signal line, wherein the setting phase can last for a first preset time period;
and in a data writing phase, providing a first scanning signal to the grid line, providing a second light-emitting control signal to the light-emitting control signal line, and providing a data signal to the data line, wherein the data writing phase lasts for a second preset time which is more than the first preset time.
2. The pixel circuit of claim 1, wherein the storage compensation module comprises a compensation transistor and a storage capacitor,
the first end of the storage capacitor is formed as the third end of the storage compensation module, and the second end of the storage capacitor is formed as the first end of the storage compensation module;
the gate of the compensation transistor is formed as the control terminal of the storage compensation module, the first pole of the compensation transistor is electrically connected with the second terminal of the storage capacitor, the second pole of the compensation transistor is formed as the second terminal of the storage compensation module, the first pole of the compensation transistor and the second pole of the compensation transistor can be turned on when the gate of the compensation transistor receives a first scanning signal, the first pole of the compensation transistor and the second pole of the compensation transistor can be turned off when the gate of the compensation transistor receives a second scanning signal, and the first scanning signal and the second scanning signal have opposite phases.
3. The pixel circuit according to claim 1, wherein the light emission control module comprises a first light emission control transistor, a second light emission control transistor, and a third light emission control transistor, a gate of the first light emission control transistor, a gate of the second light emission control transistor, and a gate of the third light emission control transistor are connected and formed as a control terminal of the light emission control transistor,
a first pole of the first light emitting control transistor is formed as a third end of the light emitting control module, a second pole of the first light emitting control transistor is formed as a first end of the light emitting control module, the first pole of the first light emitting control transistor and the second pole of the first light emitting control transistor can be turned on when the gate of the first light emitting control transistor receives a first light emitting control signal, and the first pole of the first light emitting control transistor and the second pole of the first light emitting control transistor can be turned off when the gate of the first light emitting control transistor receives a second light emitting control signal, wherein the first light emitting control signal and the second light emitting control signal have opposite phases;
a first electrode of the second light emission control transistor is formed as a second end of the light emission control transistor, a second electrode of the second light emission control transistor is formed as a fourth end of the light emission control transistor, the first electrode of the second light emission control transistor and the second electrode of the second light emission control transistor can be turned on when the gate of the second light emission control transistor receives a first light emission control signal, and the first electrode of the second light emission control transistor and the second electrode of the second light emission control transistor can be turned off when the gate of the second light emission control transistor receives a second light emission control signal;
the first pole of the third light emission control transistor is electrically connected to the first pole of the first light emission control transistor, the second pole of the third light emission control transistor is formed as a fifth terminal of the light emission control module, the first pole of the third light emission control transistor and the second pole of the third light emission control transistor can be turned on when the gate of the third light emission control transistor receives the first light emission control signal, and the first pole of the third light emission control transistor and the second pole of the third light emission control transistor can be turned off when the gate of the third light emission control transistor receives the second light emission control signal.
4. The pixel circuit of claim 1, wherein the data write module comprises a data write transistor, a gate of the data writing transistor is formed as a control terminal of the data writing block, a first pole of the data writing transistor is formed as an input terminal of the data writing block, a second pole of the data writing transistor is formed as an output terminal of the data writing module, the first pole of the data writing transistor and the second pole of the data writing transistor are capable of being turned on when the gate of the data writing transistor receives a first scan signal, and the first pole of the data writing transistor and the second pole of the data writing transistor can be turned off when the gate of the data writing transistor receives a second scanning signal, and the phases of the first scanning signal and the second scanning signal are opposite.
5. The pixel circuit according to any one of claims 1 to 4, wherein the set block comprises a set transistor,
the gate of the set transistor is formed as the control terminal of the set module, the first pole of the set transistor is formed as the input terminal of the set module, the second pole of the set transistor is formed as the output terminal of the set module, the first pole of the set transistor and the second pole of the set transistor can be switched on when the gate of the set transistor receives a first scanning signal, the first pole of the set transistor and the second pole of the set transistor can be switched off when the gate of the set transistor receives a second scanning signal, and the phases of the first scanning signal and the second scanning signal are opposite.
6. The pixel circuit according to any one of claims 1 to 4, wherein the driving transistor is a P-type transistor, the first scan signal is a low level signal, and the first light emission control signal is a low level signal.
7. A display panel comprises a plurality of grid lines, a plurality of data lines and a plurality of light-emitting control lines, wherein the grid lines and the data lines divide the display panel into a plurality of pixel units, each pixel unit is internally provided with a pixel circuit, each row of pixel units corresponds to one grid line, each row of pixel units corresponds to one light-emitting control line, and the same column of pixel units corresponds to one data line.
8. A driving method of a display panel according to claim 7, wherein the display panel comprises a plurality of driving periods, each driving period comprising:
in a setting phase, providing a first scanning signal to a grid line and providing a first light-emitting control signal to a light-emitting control signal line, wherein the setting phase can last for a first preset time period;
in a data writing phase, providing a first scanning signal to the grid line, providing a second light-emitting control signal to the light-emitting control signal line, and providing a data signal to the data line, wherein the data writing phase lasts for a second preset time which is more than the first preset time;
in a light emitting stage, a second scan signal is supplied to the gate line, and a first light emission control signal is supplied to the light emission control signal line, wherein,
the first scan signal is opposite in phase to the second scan signal, and the first light emission control signal is opposite in phase to the second light emission control signal.
9. The driving method according to claim 8, wherein the first predetermined time is continued for 0.5 μ s to 1.5 μ s.
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| CN109887466B (en) * | 2019-04-19 | 2021-03-30 | 京东方科技集团股份有限公司 | Pixel driving circuit and method and display panel |
| CN110942743B (en) * | 2019-12-26 | 2021-04-13 | 云谷（固安）科技有限公司 | Driving method of pixel circuit, display panel and display device |
| CN117975871A (en) * | 2020-10-15 | 2024-05-03 | 厦门天马微电子有限公司 | Display panel, driving method thereof and display device |
| CN113270067B (en) * | 2021-06-28 | 2022-05-03 | 深圳市华星光电半导体显示技术有限公司 | Pixel circuit and display panel |
| CN114120874B (en) * | 2021-11-24 | 2024-06-04 | Tcl华星光电技术有限公司 | Light emitting device driving circuit, backlight module and display panel |
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