A kind of dead-zone compensation method of H bridge topology
Technical field
A kind of gird-connected inverter field of the present invention, and in particular to dead-zone compensation method of H bridge topology.
Background technique
It in current electrical power conversion and is driven by electricity in industry, H bridge topology gird-connected inverter is wide as classical topologies structure
General application.Wherein H bridge topology includes again classical H4 bridge, H5 bridge and more level H-bridges etc..Such as H5 bridge topology parallel network reverse
Device, as shown in Figure 1, main circuit is driven using Unipolar SPWM, in Fig. 1, VbusFor DC bus-bar voltage;T1To T5For H5 topology
Switching tube;VD1To VD5The respectively parasitic diode of switching tube;VabFor main circuit output voltage.In order to allow reactive component
Exchange, the drive waveforms of H5 bridge topology gird-connected inverter shown in FIG. 1 are as shown in Fig. 2, mainly follow following three principle:
(1), modulating wave positive half period, T1 Guan Henggao, T4 pipe is modulated in a manner of SPWM with T5 pipe and stringent synchronization;
(2), modulating wave negative half-cycle, T3 pipe perseverance is low, and T2 pipe is modulated in a manner of SPWM with T5 pipe and stringent synchronization;
(3), T1 and T2 pipe, T3 and T4 pipe strictly complementary.
To prevent the straight-through of two power switch tubes of same bridge arm (T1, T2 are a bridge arm, and T3, T4 are a bridge arm),
In pwm control signal, it is necessary to set the PWM switching dead of " break-before-make ".With reference to Fig. 1 and Fig. 2, inductive current i is enabledLFlow direction
Power grid is positive direction, when using Unipolar SPWM modulation system, as modulating wave positive half period (i.e. VabPositive half period) and iL>0
When, iLT1 and T4 (or T1 and VD3) are flowed through, is easy analysis, ignores the electric current settling time etc. of diode and switching tube, obtain
Output voltage waveforms, Fig. 3 are the waveforms for flowing through T3 and T4 at this time out.From the figure 3, it may be seen that error voltage Verr=Videal-Vreal.Fig. 3
In, T4_ideal is perfect condition pwm waveform when T4 pipe ignores dead zone;T4_real is that the practical PWM of T4 pipe controls wave
Shape;T3_real is the practical pwm waveform of T3 pipe;Vab_idealTo ignore ideal bridge arm output voltage when dead zone;Vab_real
For bridge arm actual output voltage;VbusFor DC bus-bar voltage;VerrFor error voltage;tdFor dead time;TsFor switch periods.
It can similarly obtain, as iL < 0, error voltage Verr=-(- Vreal)=Vreal-Videal.Therefore, using equivalent area
Method, error voltage average value in the periodAre as follows:
Wherein sign () is sign function;VbusFor DC bus-bar voltage;tdFor dead time;TsFor switch periods.
When invertor operation is when unity power factor, Fourier space pair is utilizedCarrying out Harmonic Decomposition can obtain:
This error voltage also creates odd harmonic in addition to producing fundamental wave error to output voltage, so controlling in PWM
When processed, dead zone function is added, although solving the problems, such as the straight-through damage of same bridge arm power switch tube, also brings output voltage into
Fundamental wave error generates electric current odd harmonic, affects circuit output quality.
Summary of the invention
In view of the above-mentioned problems, carrying out dead zone control the object of the present invention is to provide a kind of dead-zone compensation method of H bridge topology
The influence that the odd harmonic that dead zone function is brought into is reduced while processed improves output (electric current, voltage) quality.
In order to achieve the above objectives, the technical solution adopted by the present invention are as follows:
A kind of dead-zone compensation method of H bridge topology, includes the following steps:
A, all working mode of the analysis H bridge topological circuit under corresponding modulation system;
B, it calculates H bridge topological circuit and is in the mean error voltage under each operating mode;
C, judge that current H bridge topological circuit is locating for which kind of operating mode;
D, the current H bridge topology that corresponding step C judges is chosen in the mean error voltage being calculated according to step B
The mean error voltage of operating mode locating for circuit;
E, the mean error voltage that step D chooses PWM duty cycle compensation rate is converted to be added to current H bridge topological circuit
Former PWM duty cycle with reference to upper.
In one embodiment, the H bridge topological circuit is H4 bridge topology, H5 bridge topology or more level H-bridges topology.
In one embodiment, in step A, H bridge topological circuit is analyzed in Unipolar SPWM modulation system or bipolar SPWM
All working mode under modulation system.
In one embodiment, in step B, the work that is in respectively according to the H bridge topological circuit under each operating mode
State derives each working condition error voltage V under each operating modeerrAnd each working condition runing time Δ T, according to formula
(1) the mean error voltage under each operating mode is calculated
Wherein, N is the working condition sum under an operating mode, and x is the specific works state under the operating mode,
Verr_xFor the error voltage of the specific works state, Δ T_x is the specific works state runing time.
In one embodiment, in step C, according to current PWM modulation wave direction and the current current H of inductive current walking direction
Operating mode locating for bridge topological circuit.
In one embodiment, step C is specifically included:
Judge current PWM modulation wave direction according to the current loop control output in switch periods, current loop control output and
PWM modulation wave direction is consistent;
According to the Voltage loop control output current inductive current direction of reference current walking direction in switch periods, with reference to electricity
It is consistent with inductive current direction to flow direction.
In one embodiment, in step E, the PWM duty cycle compensation rate is calculated according to formula (2),
Wherein, DCompensationFor PWM duty cycle compensation rate, VbusFor DC bus-bar voltage.
In a specific embodiment, it in turn includes the following steps:
The all working mode of S1, analysis H bridge topological circuit under corresponding modulation system;
S2, the working condition under each operating mode is according to the H bridge topological circuit respectively, derives each Working mould
Each working condition error voltage and each working condition runing time under formula;
S3, being averaged for each operating mode is calculated according to each working condition error voltage and each working condition runing time
Error voltage;
S4, judge that current H bridge topological circuit is locating for which kind of operating mode;
S5, operating mode locating for corresponding current H bridge topological circuit is chosen in the mean error voltage of each operating mode
Mean error voltage;
S6, it the mean error voltage of selection is converted to PWM duty cycle compensation rate is added to the original of current H bridge topological circuit
PWM duty cycle is with reference to upper.
The present invention uses above scheme, has the advantages that compared with prior art
The dead-zone compensation method of H bridge topology provided by the invention increases hardware without additional, does not increase cost, not only not
The advantage of classical dead zone function is influenced, and also reduces the influence for the odd harmonic that dead zone function is brought into, improves H bridge topology
Output voltage, current quality.
Detailed description of the invention
It, below will be to attached drawing needed in embodiment description in order to illustrate more clearly of technical solution of the present invention
It is briefly described, it should be apparent that, drawings in the following description are only some embodiments of the invention, general for this field
For logical technical staff, without creative efforts, it is also possible to obtain other drawings based on these drawings.
Fig. 1 is the schematic diagram of H5 bridge topology gird-connected inverter;
Fig. 2 is the drive waveforms figure of H5 bridge topology gird-connected inverter;
Fig. 3 is the output voltage waveforms and error voltage waveform when considering dead zone;
Fig. 4 is a kind of flow chart of dead-zone compensation method according to the present invention;
Fig. 5 is dead area compensation control block diagram according to the present invention;
Fig. 6 is increase double-closed-loop control block diagram according to the present invention.
Specific embodiment
The preferred embodiments of the present invention will be described in detail with reference to the accompanying drawing, so that advantages and features of the invention energy
It is easier to be understood by the person skilled in the art.It should be noted that the explanation for these embodiments is used to help
Understand the present invention, but and does not constitute a limitation of the invention.In addition, involved in the various embodiments of the present invention described below
And to technical characteristic can be combined with each other as long as they do not conflict with each other.
The present embodiment provides a kind of dead-zone compensation method of H bridge topology, flow chart such as Fig. 4, specific implementation flow is as follows:
The all working mode of S1, analysis H bridge topological circuit under corresponding modulation system, the modulation system includes monopole
Property SPWM modulation system, bipolar SPWM modulation system etc., H bridge topological circuit is H4 bridge topology, H5 bridge topology or more level H-bridges
Topology;
S2, the working condition under each operating mode is according to the H bridge topological circuit respectively, derives each Working mould
Each working condition error voltage V under formulaerrAnd each working condition runing time Δ T;
S3, according to each working condition error voltage VerrAnd each working condition runing time Δ T calculates each operating mode
Mean error voltage
Wherein, N is the working condition sum under an operating mode, and x is the specific works state under the operating mode,
Verr_xFor the error voltage of the specific works state, Δ T_x is the specific works state runing time;
S4, according to locating for current PWM modulation wave direction and the current H bridge topological circuit of current inductive current walking direction why
Kind operating mode;
S5, operating mode locating for corresponding current H bridge topological circuit is chosen in the mean error voltage of each operating mode
Mean error voltage;
S6, it the mean error voltage of selection is converted to PWM duty cycle compensation rate is added to the original of current H bridge topological circuit
PWM duty cycle is with reference to upper (as shown in figure 5, wherein D*For the reference of former PWM duty cycle;D is the PWM duty of reality output after compensation
Than), the PWM duty cycle compensation rate is calculated according to formula (2),
Wherein, DCompensationFor PWM duty cycle compensation rate, VbusFor DC bus-bar voltage.
Step S4 specifically comprises the following steps:
S41, current PWM modulation wave direction, electric current loop control are judged according to when the current loop control output in time switch periods
System output is consistent with PWM modulation wave direction;
S42, the current inductive current side of reference current walking direction is exported according to when the Voltage loop control in time switch periods
To reference current direction is consistent with inductive current direction;
In conjunction with step S41 and S42's as a result, may determine that the operating mode that H bridge topological circuit is presently in.
Below to the dead-zone compensation method of H bridge topology of the invention by taking H5 bridge topology gird-connected inverter shown in FIG. 1 as an example
It is described in detail.H5 bridge topological circuit as shown in Figure 1, including DC bus-bar voltage Vbus1a;DC bus current ibus
1b;H5 bridge topological main circuit 1c;Main circuit exports electric current iL1d;Main circuit output voltage Vab1e;The wherein main electricity of H5 bridge topology
Road 1c is made of 5 power switch tube T1-T5, and VD1-VD5 is freewheeling diode in power switch tube body.
Fig. 6 shows the double-closed-loop control block diagram for increasing dead area compensation of the present invention, including DC bus-bar voltage reference
6a;DC bus-bar voltage Vbus6b;Voltage loop PI controller 6c;Electric current loop refers to Iref6d;Inductive current I 6e;Electric current loop PI
Controller 6f;Error voltage Verr6g;DC bus-bar voltage inverse 1/Vbus6h;Control output PWM duty cycle 2i.
It is as follows to the dead area compensation process of H5 bridge topology gird-connected inverter shown in FIG. 1:
1, operating mode of the analysis H5 bridge topology inverter under Unipolar SPWM modulation system, shares 4 kinds of operating modes,
It is respectively as follows:
(1) Mode1:PWM modulating wave positive half period and outputting inductance electric current is positive, it may be assumed that Uab(1e) >=0, iL(1d)≥0;
(2) Mode2:PWM modulating wave positive half period and outputting inductance electric current is negative, it may be assumed that Uab(1e) >=0, iL(1d)<0;
(3) Mode3:PWM modulating wave negative half-cycle and outputting inductance electric current is positive, it may be assumed that Uab(1e) < 0, iL(1d)≤0,
(4) Mode4:PWM modulating wave negative half-cycle and outputting inductance electric current is negative, it may be assumed that Uab(1e) < 0, iL(1d)>0。
2, each operating mode being according to H5 bridge circuit analyzes the working condition under each operating mode, H5 bridge topology
Dead time of each operating mode according to power switch tube, turn-on and turn-off time, each operating mode shares 8 work shapes
State derives the error voltage V that can obtain each working conditionerrWith each state runing time Δ T.By taking Mode1 as an example, operating mode
The error voltage V of Mode1errIt see the table below 1 with state runing time Δ T, the error voltage V in tableerrWith state runing time Δ T
Actual numerical value is replaced by character.
Working condition table under table 1Mode1
Working condition |
Verr |
ΔT |
1 |
Vbus-Vab_real1 |
ΔT1 |
2 |
Vbus-Vab_real2 |
ΔT2 |
3 |
Vbus-Vab_real3 |
ΔT3 |
4 |
Vbus-Vab_real4 |
ΔT4 |
5 |
-Vab_real5 |
ΔT5 |
6 |
-Vab_real6 |
ΔT6 |
7 |
-Vab_real7 |
ΔT7 |
8 |
-Vab_real8 |
ΔT8 |
The working condition table under other three operating modes can similarly be obtained.
3, mean error voltage under each operating mode is calculated according to the following formula,
Obtain the mean error voltage under four operating modes
4, judge current PWM modulation wave direction and electric current loop with reference to I according to electric current loop PI controller 6c outputref6d sentences
Inducing current direction is powered off, comprehensive descision goes out the operating mode being presently in.
5, the operating mode judged according to step 4, corresponding mean error voltage obtained in selecting step 3
6, by the mean error voltage of selectionIt is transmitted to DC bus-bar voltage inverse 1/Vbus6h obtains needing to compensate
PWM duty cycle Duty, the controller that is added to export on PWM duty cycle Duty, obtain final control output PWM duty cycle 2i.
Using the two-stage photovoltaic combining inverter based on H5 bridge topology as example, comparison increases dead area compensation of the present invention (optimization
Increase the output electric energy harmonic wave THDi in the case of two kinds of dead area compensation (before optimization) afterwards) and not, major parameter is as follows:
1, input power 3150w inputs factor=0.75 PV voltage MPPT point 300V, FF;
2, power grid: voltage 230V;
3, using constant pressure input pattern, PV Voltage Reference 300 is inputted, reduces the influence of MPPT control.
A power section is tested respectively, and whether there is or not idle conditions, as a result see the table below 2, use this hair as can be seen from the results
After bright dead-zone compensation method carries out dead area compensation, electric energy harmonic wave THDi is the half before optimization, substantially improves power quality.
2 test result of table
The above embodiments merely illustrate the technical concept and features of the present invention, is a kind of preferred embodiment, and purpose exists
It cans understand the content of the present invention and implement it accordingly in person skilled in the art, protection of the invention can not be limited with this
Range.Equivalent transformation or modification made by all Spirit Essences according to the present invention, should all cover protection scope of the present invention it
It is interior.