CN108427579B - Method for loading codes from SOC chip to multiple external serial flash memories - Google Patents
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- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
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Abstract
The invention provides a method for loading codes from an SOC chip to a plurality of external serial flash memories, which uses a data structure to describe the differentiation parameters among the models of the external serial flash memory chips, wherein the content of the data structure comprises the ID of the chip, the number of signal lines for data communication of the chip, the operating command of the chip and the addressable range of the chip. The method of the invention abstracts the differentiated attributes of a plurality of external serial flash memories into a set, can well support the serial flash memory chips with different models by configuring the set, and can solve the problem that the external serial flash memory chips with different models are difficult to support after a boot chip (bootrom) is solidified to the chip when executable codes are required to be loaded from the external serial flash memory chips with various models of different manufacturers.
Description
Technical Field
The invention belongs to the field of chips, and particularly relates to a method for loading codes from an SOC chip to various external serial flash memories.
Background
In an embedded system, a serial flash memory is often used as a code memory, and the serial flash memories in the market are various, and various serial flash memories may be connected as a final design after a chip leaves a factory. The serial flash memory chips may have different operation commands for reading and writing, the number of signal lines for data communication, the addressable address range, and the size of sectors to different extents according to different manufacturers and models. When executable codes need to be loaded into external serial flash memory chips of various models of different manufacturers, the problem that the external serial flash memory chips of various models which are externally connected are difficult to support after a boot chip (bootrom) is solidified to the chip exists.
Disclosure of Invention
In order to solve the technical problems in the prior art, the invention provides a method for loading codes from an SOC chip to a plurality of external serial flash memories, wherein a data structure is used for describing differentiation parameters among models of the external serial flash memory chips, and the content of the data structure comprises an ID of the chip, the number of signal lines for data communication of the chip, an operation command of the chip and an addressable range of the chip.
Furthermore, the method is provided with an external serial flash memory chip model list supported by default, all external serial flash memory chip model differentiation parameter sets corresponding to the model list form a differentiation parameter list, each external serial flash memory chip model has a group of differentiation parameters belonging to the external serial flash memory chip model, the ID number is used as an index, and an expansion parameter list is stored in the OTP for later support of the newly added serial flash memory chip.
Further, the differentiation parameters of the external serial flash memory chip supported by default are stored in the ROM.
Further, the reading operation of the external serial flash memory chip specifically comprises the following steps:
firstly, judging whether an external serial flash memory chip is initialized currently; if the initialization is finished, jumping to the step (six); if not, entering the step (II);
secondly, sending an ID reading command to an external serial flash memory chip to acquire a chip ID, reading corresponding chip parameters from a parameter list according to the chip ID, and configuring the chip parameters into a driven differentiated parameter data structure;
thirdly, judging whether 4-byte addressing is used or not according to the acquired corresponding chip parameters; if the method is used, jumping to the step (four); if not, jumping to the step (six);
fourthly, judging whether default 4-byte addressing is performed or not according to the acquired corresponding chip parameters; if yes, jumping to the step (six); if not, jumping to the step (five);
acquiring a 4-byte addressing enabling command from the parameter data structure body, and enabling a 4-byte addressing mode of the external serial flash memory chip;
and (VI) judging whether to use 4 data lines for communication according to the acquired corresponding chip parameters. If the method is used, jumping to the step (seven); if not, jumping to the step (eight);
seventhly, acquiring a 4-data-line communication enabling command from the parameter data structure body, and enabling a 4-data-line communication mode of the external serial flash memory chip;
(eighth) acquiring a read operation command from the parameter data structure body, and executing a read operation;
judging whether to use 4 data lines for communication according to the acquired corresponding chip parameters; if the method is used, jumping to the step (ten); if not, the operation is finished;
and (ten) acquiring a 4 data line communication disabling command from the parameter data structure body, disabling the 4 data line communication mode of the external serial flash memory chip, and ending.
Further, the writing operation on the external serial flash memory chip specifically includes the following steps:
firstly, judging whether an external serial flash memory chip is initialized currently; if the initialization is finished, jumping to the step (six); if not, jumping to the step (II);
secondly, sending an ID reading command to an external serial flash memory chip to acquire a chip ID, reading corresponding chip parameters from a parameter list according to the chip ID, and configuring the chip parameters into a driven differentiated parameter structure;
thirdly, judging whether 4-byte addressing is used or not according to the acquired corresponding chip parameters; if the method is used, jumping to the step (four); if not, jumping to the step (six);
fourthly, judging whether default 4-byte addressing is performed or not according to the acquired corresponding chip parameters; if yes, jumping to the step (six); if not, jumping to the step (five);
acquiring a 4-byte addressing enabling command from the parameter structure body, and enabling a 4-byte addressing mode of the external serial flash memory chip;
judging whether the sectors of the incoming erasing addresses are aligned or not, wherein the size of the sectors can be obtained from the parameter structure body; if the alignment is carried out, jumping to the step (seven); if not, printing an error report and ending;
acquiring an erasing operation command from the parameter structure body, and executing the erasing operation;
and (eighthly), judging whether to use 4 data lines for communication according to the acquired corresponding chip parameters. If the method is used, jumping to the step (nine); if not, jumping to the step (ten);
(nine) acquiring a 4 data line communication enabling command from the parameter structure body, and enabling a 4 data line communication mode of the external serial flash memory chip;
(ten) acquiring a write operation command from the parameter structure body and executing write operation;
judging whether to use 4 data lines for communication according to the acquired corresponding chip parameters; if the method is used, jumping to the step (twelve); if not, the operation is finished;
and (twelfth) acquiring a 4 data line communication disabling command from the parameter structure body, disabling the 4 data line communication mode of the external serial flash memory chip, and ending.
The method of the invention abstracts the differentiated attributes of a plurality of external serial flash memories into a set, can well support the serial flash memory chips with different models by configuring the set, and can solve the problem that the external serial flash memory chips with different models are difficult to support after a boot chip (bootrom) is solidified to the chip when executable codes are required to be loaded from the external serial flash memory chips with various models of different manufacturers.
Drawings
FIG. 1 is a flow chart of a read operation for an external serial flash memory chip;
FIG. 2 is a flow chart of a write operation to an external serial flash memory chip.
Detailed Description
The invention will be further explained with reference to the drawings.
The invention abstracts the operation process of the external serial flash memory chip, and uses a data structure to describe the differentiation parameters among the models of the external serial flash memory chip, wherein the content of the included concrete parameters is detailed in table 1.
TABLE 1 differentiated parameter data Structure Table
The invention has a default supported external serial flash memory chip model list, and a parameter list exists in the corresponding model list. Each external serial flash memory chip model has a group of parameters belonging to the external serial flash memory chip model, and all the external serial flash memory chip model parameter groups form a parameter list, wherein the ID number is used as an index. Meanwhile, an expansion parameter list is stored in the OTP for later support of a newly added serial flash memory chip. When the module is initialized, the ID number of the current external serial flash memory chip is acquired, and then the parameter group of the corresponding model is matched in the parameter list according to the ID number, so that the relevant parameters are acquired. After the parameter group of the current external serial flash memory chip is obtained, the parameter group is configured into an abstract frame of an operation process, and then the current external serial flash memory chip is supported.
As shown in fig. 1, a flowchart of a read operation on an external serial flash memory chip specifically includes the following steps:
firstly, whether the external serial flash memory chip is initialized currently is judged. If initialized, go to step (six). If not, go to step (two).
And (II) sending an ID reading command to the external serial flash memory chip to acquire a chip ID, reading corresponding chip parameters from the parameter list according to the chip ID, and configuring the chip parameters into a driving differentiation parameter data structure.
And thirdly, judging whether to use 4-byte addressing according to the acquired corresponding chip parameters. If used, jump to step (four). If not, jump to step (six).
And (IV) judging whether the default 4-byte addressing is performed or not according to the acquired corresponding chip parameters. If yes, jumping to the step (six). If not, jumping to the step (five).
And (V) acquiring a 4-byte addressing enabling command from the parameter data structure body, and enabling the external serial flash memory chip to have a 4-byte addressing mode.
And (VI) judging whether to use 4 data lines for communication according to the acquired corresponding chip parameters. If so, jump to step (seven). If not, jump to step (eight).
And (seventhly) acquiring a 4-data-line communication enabling command from the parameter data structure body, and enabling the external serial flash memory chip 4-data-line communication mode.
And (eighth) acquiring a read operation command from the parameter data structure body and executing the read operation.
And (ninthly), judging whether to use 4 data lines for communication according to the acquired corresponding chip parameters. If so, jump to step (ten). If not, the process is finished.
And (ten) acquiring a 4 data line communication disabling command from the parameter data structure body, disabling the 4 data line communication mode of the external serial flash memory chip, and ending.
Fig. 2 is a flowchart of a write operation to an external serial flash memory chip, which specifically includes the following steps:
firstly, whether the external serial flash memory chip is initialized currently is judged. If initialized, go to step (six). And if not, jumping to the step (two).
And (II) sending an ID reading command to the external serial flash memory chip to acquire a chip ID, reading corresponding chip parameters from the parameter list according to the chip ID, and configuring the chip parameters into a driven differentiated parameter structure.
And thirdly, judging whether to use 4-byte addressing according to the acquired corresponding chip parameters. If used, jump to step (four). If not, jump to step (six).
And (IV) judging whether the default 4-byte addressing is performed or not according to the acquired corresponding chip parameters. If yes, jumping to the step (six). If not, jumping to the step (five).
And (V) acquiring a 4-byte addressing enabling command from the parameter structure body, and enabling the external serial flash memory chip to have a 4-byte addressing mode.
And (VI) judging whether the sectors of the incoming erasing addresses are aligned or not, wherein the size of the sectors can be obtained from the parameter structure body. If so, jump to step (seven). If not, printing an error report and ending.
And (seventhly) acquiring an erasing operation command from the parameter structure body and executing the erasing operation.
And (eighthly), judging whether to use 4 data lines for communication according to the acquired corresponding chip parameters. If so, jump to step (nine). If not, jump to step (ten).
(nine) acquiring a 4 data line communication enabling command from the parameter structure body, and enabling the external serial flash memory chip 4 data line communication mode.
And (ten) acquiring a write operation command from the parameter structure body and executing the write operation.
And (eleventh) judging whether to use 4 data line communication according to the acquired corresponding chip parameters. If so, go to step (twelve). If not, the process is finished.
And (twelfth) acquiring a 4 data line communication disabling command from the parameter structure body, disabling the 4 data line communication mode of the external serial flash memory chip, and ending.
In the SPI flash drive of the multifunction printer chip, various types of SPI flash chips need to be supported. By the method, the differentiated attributes are abstracted into a set, and the set can be configured to well support the serial flash memory chips of different models.
Generally, different types of SPI flash chips often have different operation commands for reading and writing, the number of signal lines for data communication, addressable address ranges, and sector sizes to different extents according to different manufacturers and models. The method abstracts the common characteristics of the operation method of the SPI flash chip and abstracts and describes the differential parameters between models of the SPI flash chip by using a data structure. By storing the data structure in the OTP, after the multifunctional printer chip leaves a factory, the added external SPI flash chip can be supported by modifying the differentiated data structure in the OTP.
Claims (4)
1. A method for loading codes from a plurality of external serial flash memories by an SOC chip is characterized in that: describing differentiation parameters among models of the external serial flash memory chip by using a data structure, wherein the content of the data structure comprises an ID of the chip, the number of signal lines for data communication of the chip, an operation command of the chip and an addressable range of the chip;
the reading operation of the external serial flash memory chip specifically comprises the following steps:
firstly, judging whether an external serial flash memory chip is initialized currently; if the initialization is finished, jumping to the step (six); if not, entering the step (II);
secondly, sending an ID reading command to an external serial flash memory chip to acquire a chip ID, reading corresponding chip parameters from a parameter list according to the chip ID, and configuring the chip parameters into a driven differentiated parameter data structure;
thirdly, judging whether 4-byte addressing is used or not according to the acquired corresponding chip parameters; if the method is used, jumping to the step (four); if not, jumping to the step (six);
fourthly, judging whether default 4-byte addressing is performed or not according to the acquired corresponding chip parameters; if yes, jumping to the step (six); if not, jumping to the step (five);
acquiring a 4-byte addressing enabling command from the parameter data structure body, and enabling a 4-byte addressing mode of the external serial flash memory chip;
judging whether to use 4 data lines for communication according to the acquired corresponding chip parameters;
if the method is used, jumping to the step (seven); if not, jumping to the step (eight);
seventhly, acquiring a 4-data-line communication enabling command from the parameter data structure body, and enabling a 4-data-line communication mode of the external serial flash memory chip;
(eighth) acquiring a read operation command from the parameter data structure body, and executing a read operation;
judging whether to use 4 data lines for communication according to the acquired corresponding chip parameters; if the method is used, jumping to the step (ten); if not, the operation is finished;
and (ten) acquiring a 4 data line communication disabling command from the parameter data structure body, disabling the 4 data line communication mode of the external serial flash memory chip, and ending.
2. The method for loading code from a plurality of external serial flash memories for an SOC chip of claim 1 wherein: the method comprises the steps that a default supported external serial flash memory chip model list is provided, all external serial flash memory chip model difference parameter sets corresponding to the model list form a difference parameter list, each external serial flash memory chip model has a group of difference parameters belonging to the external serial flash memory chip model, an ID number is used as an index, an extended parameter list is stored in an OTP register and used for supporting a newly added serial flash memory chip in the later period.
3. The method for loading code from a plurality of external serial flash memories for an SOC chip of claim 1 wherein: the differentiation parameters of the external serial flash memory chip supported by default are stored in the ROM.
4. The method for loading code from a plurality of external serial flash memories for an SOC chip of claim 1 wherein: the writing operation of the external serial flash memory chip specifically comprises the following steps:
firstly, judging whether an external serial flash memory chip is initialized currently; if the initialization is finished, jumping to the step (six); if not, jumping to the step (II);
secondly, sending an ID reading command to an external serial flash memory chip to acquire a chip ID, reading corresponding chip parameters from a parameter list according to the chip ID, and configuring the chip parameters into a driven differentiated parameter structure;
thirdly, judging whether 4-byte addressing is used or not according to the acquired corresponding chip parameters; if the method is used, jumping to the step (four); if not, jumping to the step (six);
fourthly, judging whether default 4-byte addressing is performed or not according to the acquired corresponding chip parameters; if yes, jumping to the step (six); if not, jumping to the step (five);
acquiring a 4-byte addressing enabling command from the parameter structure body, and enabling a 4-byte addressing mode of the external serial flash memory chip;
judging whether the sectors of the incoming erasing addresses are aligned or not, wherein the size of the sectors can be obtained from the parameter structure body; if the alignment is carried out, jumping to the step (seven); if not, printing an error report and ending;
acquiring an erasing operation command from the parameter structure body, and executing the erasing operation;
(VIII) judging whether to use 4 data lines for communication according to the obtained corresponding chip parameters;
if the method is used, jumping to the step (nine); if not, jumping to the step (ten);
(nine) acquiring a 4 data line communication enabling command from the parameter structure body, and enabling a 4 data line communication mode of the external serial flash memory chip;
(ten) acquiring a write operation command from the parameter structure body and executing write operation;
judging whether to use 4 data lines for communication according to the acquired corresponding chip parameters; if the method is used, jumping to the step (twelve); if not, the operation is finished;
and (twelfth) acquiring a 4 data line communication disabling command from the parameter structure body, disabling the 4 data line communication mode of the external serial flash memory chip, and ending.
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| CN101867737A (en) * | 2010-04-06 | 2010-10-20 | 福建新大陆通信科技股份有限公司 | Software processing method capable of being compatible with various models of FLASH based on set-top box |
| CN102622243A (en) * | 2012-01-19 | 2012-08-01 | 苏州希图视鼎微电子有限公司 | Method for executing solidified codes supporting various NAND flash memories |
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| US7130958B2 (en) * | 2003-12-02 | 2006-10-31 | Super Talent Electronics, Inc. | Serial interface to flash-memory chip using PCI-express-like packets and packed data for partial-page writes |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN101867737A (en) * | 2010-04-06 | 2010-10-20 | 福建新大陆通信科技股份有限公司 | Software processing method capable of being compatible with various models of FLASH based on set-top box |
| CN102622243A (en) * | 2012-01-19 | 2012-08-01 | 苏州希图视鼎微电子有限公司 | Method for executing solidified codes supporting various NAND flash memories |
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