CN108231950A - Semiconductor homo-substrate and preparation method thereof, the preparation method of homogeneity epitaxial layer - Google Patents
Semiconductor homo-substrate and preparation method thereof, the preparation method of homogeneity epitaxial layer Download PDFInfo
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- CN108231950A CN108231950A CN201611199810.XA CN201611199810A CN108231950A CN 108231950 A CN108231950 A CN 108231950A CN 201611199810 A CN201611199810 A CN 201611199810A CN 108231950 A CN108231950 A CN 108231950A
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- 239000000758 substrate Substances 0.000 title claims abstract description 174
- 239000004065 semiconductor Substances 0.000 title claims abstract description 131
- 238000002360 preparation method Methods 0.000 title claims abstract description 55
- 230000000737 periodic effect Effects 0.000 claims abstract description 203
- 239000013078 crystal Substances 0.000 claims abstract description 108
- 239000000463 material Substances 0.000 claims abstract description 69
- 230000004888 barrier function Effects 0.000 claims abstract description 65
- 230000012010 growth Effects 0.000 claims abstract description 47
- 238000000034 method Methods 0.000 claims abstract description 47
- 238000005516 engineering process Methods 0.000 claims abstract description 22
- 238000012546 transfer Methods 0.000 claims abstract description 17
- 230000015572 biosynthetic process Effects 0.000 claims abstract description 12
- 238000001657 homoepitaxy Methods 0.000 claims abstract description 8
- 239000000126 substance Substances 0.000 claims description 37
- 239000000155 melt Substances 0.000 claims description 36
- 238000000407 epitaxy Methods 0.000 claims description 17
- 239000002904 solvent Substances 0.000 claims description 16
- 238000009792 diffusion process Methods 0.000 claims description 11
- 239000007788 liquid Substances 0.000 claims description 11
- 239000003960 organic solvent Substances 0.000 claims description 11
- 238000011049 filling Methods 0.000 claims description 10
- 230000008018 melting Effects 0.000 claims description 8
- 238000002844 melting Methods 0.000 claims description 8
- 230000008859 change Effects 0.000 claims description 7
- 239000007787 solid Substances 0.000 claims description 5
- 230000001788 irregular Effects 0.000 claims description 4
- 239000000203 mixture Substances 0.000 claims description 4
- 230000002209 hydrophobic effect Effects 0.000 claims description 3
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims description 2
- 239000004020 conductor Substances 0.000 claims description 2
- 229910052760 oxygen Inorganic materials 0.000 claims description 2
- 239000001301 oxygen Substances 0.000 claims description 2
- 230000008569 process Effects 0.000 abstract description 7
- 239000010410 layer Substances 0.000 description 131
- 239000010408 film Substances 0.000 description 44
- 238000001723 curing Methods 0.000 description 30
- 235000012431 wafers Nutrition 0.000 description 28
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 15
- 239000012188 paraffin wax Substances 0.000 description 12
- 230000002441 reversible effect Effects 0.000 description 12
- 238000013461 design Methods 0.000 description 9
- 229910052732 germanium Inorganic materials 0.000 description 9
- 238000005520 cutting process Methods 0.000 description 8
- 230000000694 effects Effects 0.000 description 8
- 229910052710 silicon Inorganic materials 0.000 description 8
- 239000010409 thin film Substances 0.000 description 8
- 238000000231 atomic layer deposition Methods 0.000 description 7
- 238000005530 etching Methods 0.000 description 7
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N silicon dioxide Inorganic materials O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 7
- 239000012808 vapor phase Substances 0.000 description 7
- CSCPPACGZOOCGX-UHFFFAOYSA-N Acetone Chemical compound CC(C)=O CSCPPACGZOOCGX-UHFFFAOYSA-N 0.000 description 6
- 238000003486 chemical etching Methods 0.000 description 6
- 238000006243 chemical reaction Methods 0.000 description 6
- 229910052681 coesite Inorganic materials 0.000 description 6
- 229910052906 cristobalite Inorganic materials 0.000 description 6
- 238000011161 development Methods 0.000 description 6
- 238000010586 diagram Methods 0.000 description 6
- 238000013467 fragmentation Methods 0.000 description 6
- 238000006062 fragmentation reaction Methods 0.000 description 6
- 238000004519 manufacturing process Methods 0.000 description 6
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 description 6
- 229910010271 silicon carbide Inorganic materials 0.000 description 6
- 239000000377 silicon dioxide Substances 0.000 description 6
- 229910052682 stishovite Inorganic materials 0.000 description 6
- 229910052905 tridymite Inorganic materials 0.000 description 6
- 238000001039 wet etching Methods 0.000 description 6
- 238000009826 distribution Methods 0.000 description 5
- 239000012071 phase Substances 0.000 description 5
- 238000012545 processing Methods 0.000 description 5
- WYURNTSHIVDZCO-UHFFFAOYSA-N Tetrahydrofuran Chemical compound C1CCOC1 WYURNTSHIVDZCO-UHFFFAOYSA-N 0.000 description 4
- 238000001312 dry etching Methods 0.000 description 4
- 230000004048 modification Effects 0.000 description 4
- 238000012986 modification Methods 0.000 description 4
- 239000002994 raw material Substances 0.000 description 4
- 239000000376 reactant Substances 0.000 description 4
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 description 3
- YXFVVABEGXRONW-UHFFFAOYSA-N Toluene Chemical compound CC1=CC=CC=C1 YXFVVABEGXRONW-UHFFFAOYSA-N 0.000 description 3
- 230000000903 blocking effect Effects 0.000 description 3
- 238000004140 cleaning Methods 0.000 description 3
- 239000000470 constituent Substances 0.000 description 3
- 230000008602 contraction Effects 0.000 description 3
- 230000005611 electricity Effects 0.000 description 3
- 230000001939 inductive effect Effects 0.000 description 3
- 229910052594 sapphire Inorganic materials 0.000 description 3
- 239000010980 sapphire Substances 0.000 description 3
- 239000002699 waste material Substances 0.000 description 3
- QGZKDVFQNNGYKY-UHFFFAOYSA-N Ammonia Chemical compound N QGZKDVFQNNGYKY-UHFFFAOYSA-N 0.000 description 2
- 229910004205 SiNX Inorganic materials 0.000 description 2
- 229910045601 alloy Inorganic materials 0.000 description 2
- 239000000956 alloy Substances 0.000 description 2
- 238000005229 chemical vapour deposition Methods 0.000 description 2
- 238000010494 dissociation reaction Methods 0.000 description 2
- 230000005593 dissociations Effects 0.000 description 2
- 238000009510 drug design Methods 0.000 description 2
- 230000008030 elimination Effects 0.000 description 2
- 238000003379 elimination reaction Methods 0.000 description 2
- 239000007789 gas Substances 0.000 description 2
- 238000010438 heat treatment Methods 0.000 description 2
- 229910052738 indium Inorganic materials 0.000 description 2
- 238000002488 metal-organic chemical vapour deposition Methods 0.000 description 2
- 229910003465 moissanite Inorganic materials 0.000 description 2
- 230000000717 retained effect Effects 0.000 description 2
- 230000006641 stabilisation Effects 0.000 description 2
- 238000011105 stabilization Methods 0.000 description 2
- 239000004575 stone Substances 0.000 description 2
- YLQBMQCUIZJEEH-UHFFFAOYSA-N tetrahydrofuran Natural products C=1C=COC=1 YLQBMQCUIZJEEH-UHFFFAOYSA-N 0.000 description 2
- XCZXGTMEAKBVPV-UHFFFAOYSA-N trimethylgallium Chemical compound C[Ga](C)C XCZXGTMEAKBVPV-UHFFFAOYSA-N 0.000 description 2
- 238000001947 vapour-phase growth Methods 0.000 description 2
- 229910005535 GaOx Inorganic materials 0.000 description 1
- 229910002616 GeOx Inorganic materials 0.000 description 1
- 239000004831 Hot glue Substances 0.000 description 1
- 229910003822 SiHCl3 Inorganic materials 0.000 description 1
- QAOWNCQODCNURD-UHFFFAOYSA-N Sulfuric acid Chemical compound OS(O)(=O)=O QAOWNCQODCNURD-UHFFFAOYSA-N 0.000 description 1
- 238000010521 absorption reaction Methods 0.000 description 1
- 230000004075 alteration Effects 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- 229910021529 ammonia Inorganic materials 0.000 description 1
- LDDQLRUQCUTJBB-UHFFFAOYSA-N ammonium fluoride Chemical compound [NH4+].[F-] LDDQLRUQCUTJBB-UHFFFAOYSA-N 0.000 description 1
- RBFQJDQYXXHULB-UHFFFAOYSA-N arsane Chemical compound [AsH3] RBFQJDQYXXHULB-UHFFFAOYSA-N 0.000 description 1
- 238000005253 cladding Methods 0.000 description 1
- 230000007812 deficiency Effects 0.000 description 1
- 238000004090 dissolution Methods 0.000 description 1
- 230000007717 exclusion Effects 0.000 description 1
- 238000001534 heteroepitaxy Methods 0.000 description 1
- 239000011229 interlayer Substances 0.000 description 1
- 150000002500 ions Chemical class 0.000 description 1
- 238000003475 lamination Methods 0.000 description 1
- 238000001459 lithography Methods 0.000 description 1
- 238000004518 low pressure chemical vapour deposition Methods 0.000 description 1
- 229910021421 monocrystalline silicon Inorganic materials 0.000 description 1
- 230000005693 optoelectronics Effects 0.000 description 1
- 230000001590 oxidative effect Effects 0.000 description 1
- 238000001259 photo etching Methods 0.000 description 1
- 230000001681 protective effect Effects 0.000 description 1
- 229910052814 silicon oxide Inorganic materials 0.000 description 1
- 238000001228 spectrum Methods 0.000 description 1
- 230000002269 spontaneous effect Effects 0.000 description 1
- 230000008961 swelling Effects 0.000 description 1
- 230000007704 transition Effects 0.000 description 1
- 239000001993 wax Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
- H01L31/184—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof the active layers comprising only AIIIBV compounds, e.g. GaAs, InP
- H01L31/1856—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof the active layers comprising only AIIIBV compounds, e.g. GaAs, InP comprising nitride compounds, e.g. GaN
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02367—Substrates
- H01L21/0237—Materials
- H01L21/02387—Group 13/15 materials
- H01L21/02389—Nitrides
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02367—Substrates
- H01L21/02428—Structure
- H01L21/0243—Surface structure
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02436—Intermediate layers between substrates and deposited layers
- H01L21/02439—Materials
- H01L21/02488—Insulating materials
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/0248—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies
- H01L31/0256—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by the material
- H01L31/0264—Inorganic materials
- H01L31/0304—Inorganic materials including, apart from doping materials or other impurities, only AIIIBV compounds
- H01L31/03044—Inorganic materials including, apart from doping materials or other impurities, only AIIIBV compounds comprising a nitride compounds, e.g. GaN
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/0248—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies
- H01L31/0352—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by their shape or by the shapes, relative sizes or disposition of the semiconductor regions
- H01L31/035272—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by their shape or by the shapes, relative sizes or disposition of the semiconductor regions characterised by at least one potential jump barrier or surface barrier
- H01L31/035281—Shape of the body
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- H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
- H01L31/1892—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof methods involving the use of temporary, removable substrates
- H01L31/1896—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof methods involving the use of temporary, removable substrates for thin-film semiconductors
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
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- Liquid Deposition Of Substances Of Which Semiconductor Devices Are Composed (AREA)
Abstract
The present invention provides a kind of semiconductor homo-substrate and preparation method thereof, the preparation method of homogeneity epitaxial layer, wherein, the preparation method of the semiconductor homo-substrate includes at least following steps:One female substrate is provided;In the periodic structure that female substrate surface formation is at least made of several periodic structure units;The extension barrier layer of selective epitaxial growth is used to implement in female substrate and Periodic structure surface formation;External convex type seed crystal is correspondingly formed in the top selective removal extension barrier layer of each periodic structure unit, so as to form the seed crystal array being at least made of external convex type seed crystal several described, finally obtains the semiconductor homo-substrate.Isoepitaxial growth, homogeneity epitaxial layer that directly obtain peelable transfer, that thickness is controllable are carried out using the reusable semiconductor homo-substrate of the present invention.The technology can be lifted to avoid traditional single-crystal boule and slicing processes, and homoepitaxy chip is made so as to fulfill low cost, high material use efficiency.
Description
Technical field
The present invention relates to technical field of semiconductor material preparation, more particularly to a kind of semiconductor homo-substrate and its preparation
Method, the preparation method of homogeneity epitaxial layer.
Background technology
Semiconductor technology is the foundation stone of Modern high-tech industry, and up to the present, semi-conducting material substantially experienced three
Developing stage, the first generation is using Si, Ge as representative, and the second generation is using GaAs representative (including the alloys such as its In, P), and the third generation is with GaN
(including the alloys such as its In, Al), ZnO, SiC are representative.In current semiconductor technology, monocrystal material is to realize high-performance half
The prerequisite condition of conductor device.
At present, single-crystal semiconductor material mainly by single crystal rod wire cutting obtain chip (such as:Si,Ge,GaAs,SiC
Deng) or heterogeneous single crystalline substrate extension acquisition monocrystal thin films (such as:GaN series arrange).However, traditional linear cutter can be made
Into a large amount of waste of material, for example, obtaining the chip of 170 μ m-thicks using 100 μm of thick cutting lines, more than 50% material can be caused
Material loss, and due to high breakage rate, traditional line cutting technology can not also obtain LED reverse mounting type (several microns to tens microns thickness,
Most semiconductor devices functions are realized enough).And for GaN, due to its high-melting-point and high dissociation pressure, bulk growth pole
It is difficult, commercial generally use sapphire or SiC substrate heteroepitaxial growth monocrystal thin films, but sapphire is brilliant with GaN
Lattice mismatch 13.9%, thermal mismatching 30%, this high thermal mismatching and lattice mismatch can generate high dislocation density, shadow in epitaxial film
Ring crystal quality;On the other hand, it although SiC and GaN lattice mismatches and thermal mismatching very little, SiC and GaN wellabilities are poor, needs
Buffer layer is added, buffer layer usually has high bit dislocation density, similary but also extension GaN film has high bit dislocation density.
In device design aspect, the strong absorption of sapphire low thermal conductivity rate and silicon carbide substrates to light is gone back very big
Hinder the development of great power LED.In addition, for the iii-v multijunction solar cell based on GaAs, usually with Ge or
Person GaAs single-crystal wafers carry out the interface unit of continuous epitaxial growth difference with gap width for substrate, in order to obtain high crystal matter
Amount, it is necessary to assure Lattice Matching between adjacent bonds layer material;And in order to obtain best photovoltaic conversion efficiency, and require each knot layer with
Gap matches, i.e. the distribution of with gaps matches with solar spectrum, can realize opto-electronic conversion to greatest extent, but usually cannot be achieved at the same time
Lattice Matching and the matching of with gaps need to be inserted into lattice graded bedding elimination lattice mismatch between different interface materials, simultaneously also
Adding in extension barrier layer prevents the diffusion of components of different knot interlayers, leads to the making of iii-v multijunction solar cell in this way
Technique is extremely complex, cumbersome, time-consuming, expensive.
In brief, also there are following several big difficult points for current semiconductor technology:There are lot of materials for wafer dicing methods
Waste;GaN base semiconductor lacks homo-substrate, and there are a large amount of rooms for promotion for film quality and device performance;GaAs base extensions are folded
Layer device is because of Lattice Matching and with gap matched designs, process costs costliness;It is small that wafer thickness may be selected degree of freedom, is unfavorable for light
The rational design of matter, the development of flexible device and associate conductive, heat conduction and optics etc..
Therefore, how to improve above-mentioned semiconductor technology problem, to prepare transferable, the controllable single-crystal wafer of thickness
Or film, it is a problem to be solved.
Invention content
In view of the foregoing deficiencies of prior art, the purpose of the present invention is to provide a kind of semiconductor homo-substrate and its
Preparation method, the preparation method of homogeneity epitaxial layer, for solving, there are lot of materials wastes for wafer dicing methods in the prior art;
GaN base semiconductor lacks homo-substrate, and there are a large amount of rooms for promotion for film quality and device performance;GaAs base extension lamination devices
Because of Lattice Matching and with gap matched designs, process costs are expensive;It is small that wafer thickness may be selected degree of freedom, is unfavorable for lightweight, flexibility
The problem of rational design of the development and associate conductive of device, heat conduction and optics etc. etc..
In order to achieve the above objects and other related objects, the present invention provides a kind of preparation method of semiconductor homo-substrate,
Wherein, the preparation method of the semiconductor homo-substrate includes at least following steps:
One female substrate is provided;
In the periodic structure that female substrate surface formation is at least made of several periodic structure units;
The extension barrier layer of selective epitaxial growth is used to implement in female substrate and Periodic structure surface formation;
External convex type seed crystal is correspondingly formed at the top of each periodic structure unit, so as to be formed at least by several institutes
The seed crystal array of external convex type seed crystal composition is stated, finally obtains the semiconductor homo-substrate.
Preferably, the periodic structure being at least made of in female substrate surface formation several periodic structure units, tool
Body method is:
The mask layer with predetermined period structure graph is formed in female substrate surface;
Figure based on the mask layer in forming periodic structure on female substrate, wherein, the periodic structure is at least
The identical periodic structure unit of several shapes including array arrangement;
Remove the mask layer.
Preferably, be correspondingly formed external convex type seed crystal at the top of each periodic structure unit, so as to formed at least by
The seed crystal array that several described external convex type seed crystals are formed, specific method are:
In filling melt on the extension barrier layer and between each periodic structure unit of the periodic structure, and carry out
Curing;
Remove the melt curing material at the top of each periodic structure unit of the periodic structure and the blocking of corresponding extension
Layer, with the top of each periodic structure unit of the exposure periodic structure;
Remaining melt curing material is removed, so that the top that each periodic structure unit is exposed is outer as one
Prominent type seed crystal, while make each periodic structure unit by the part that extension barrier layer coats as the external convex type seed crystal
Support portion so as to form the seed crystal array being at least made of several external convex type seed crystals, finally obtains the semiconductor homogeneity lining
Bottom.
Preferably, it is molten in being filled on the extension barrier layer and between each periodic structure unit of the periodic structure
Body, and cured, specific method is:
The substrat structure behind the extension barrier layer will be formed to be immersed in a melt, then take out slant setting, and protect
Environment temperature is held higher than the melt melting point substance, is made on the extension barrier layer and each periodic structure of the periodic structure
Gap between unit is filled up by the melt, and extra melt is made to trickle automatically and leaves substrat structure surface;
The substrat structure that will be filled with the melt is horizontal positioned, and the environment temperature is still kept to be higher than the melt substance
Fusing point is stood so that the melt is uniformly filled between each periodic structure unit of the periodic structure;
Substrat structure after standing is cooled to room temperature, so that the melt cures.
Preferably, melt curing material at the top of each periodic structure unit of the periodic structure and corresponding outer is removed
Prolong barrier layer, with the top of each periodic structure unit of the exposure periodic structure, specific method is:
The substrat structure after the melt will be cured to be placed in low-solubility solvent, make the melt curing material micro-
It is molten, the melt curing material at the top of each periodic structure unit of the periodic structure is removed, to expose the periodic structure
Each periodic structure unit at the top of extension barrier layer;
The extension barrier layer at the top of each periodic structure unit of the periodic structure is removed, is tied with exposing the period
The top of each periodic structure unit of structure.
Preferably, the low-solubility solvent is controllable to dissolve each period for removing the periodic structure at a slow speed
The organic solvent of melt curing material at the top of structural unit.
Preferably, when removing remaining melt curing material, it is remaining that removal is completely dissolved using highly dissoluble solvent
Melt curing material, the highly dissoluble solvent are the rapidly dissolvable organic solvent for removing remaining melt curing material completely.
Preferably, the melt is to be less than or equal to 300 DEG C using melting temperature and can be dissolved in the hydrophobic of organic solvent
Organic solid matter, the liquid obtained after being melted.
Preferably, the low-solubility solvent is controllably to dissolve at a slow speed each period for removing the periodic structure
The organic solvent of melt curing material at the top of structural unit.
Preferably, between female substrate and Periodic structure surface and the extension barrier layer, one is also formed for hindering
Block element is to the diffusion trapping layer of semiconductor diffusion inside;At the top of each periodic structure unit for removing the periodic structure
Melt curing material and during extension barrier layer, the diffusion trapping layer of corresponding position is also removed, with the exposure periodic structure
The top of each periodic structure unit.
Preferably, the periodic structure unit is column, strip, band-like, wavy, taper or irregular shape.
Preferably, female substrate is single-crystal wafer or the aimed semiconductor epitaxy single-crystal being grown on heterogeneous single-chip
Film.
In order to achieve the above objects and other related objects, the present invention also provides a kind of semiconductor homo-substrate, wherein, it is described
Semiconductor homo-substrate includes at least:
Female substrate;
It is formed in the periodic structure being at least made of several periodic structure units of female substrate surface;
It is formed in female substrate and Periodic structure surface is used to implement the extension barrier layer of selective epitaxial growth;
It is correspondingly formed in the external convex type seed crystal at the top of each periodic structure unit, so as to be formed at least by several
The seed crystal array that a external convex type seed crystal is formed.
Preferably, the periodic structure unit is column, strip, band-like, wavy, taper or irregular shape.
Preferably, female substrate is single-crystal wafer or the aimed semiconductor epitaxy single-crystal being grown on heterogeneous single-chip
Film.
In order to achieve the above objects and other related objects, the present invention also provides a kind of preparation method of homogeneity epitaxial layer,
In, the preparation method of the homogeneity epitaxial layer includes at least following steps:
Using the preparation method of semiconductor homo-substrate as described above, semiconductor homo-substrate is prepared;
In forming homogeneity epitaxial layer in the semiconductor homo-substrate, the homogeneity epitaxial layer is epitaxy single-crystal chip or film;
The homogeneity epitaxial layer is shifted in stripping from the semiconductor homo-substrate;
Wherein, stripping shift the semiconductor homo-substrate after the homogeneity epitaxial layer be suitable for being re-used in be formed it is described same
In the step of matter epitaxial layer.
Preferably, in forming homogeneity epitaxial layer in the semiconductor homo-substrate, specific method is:
In carrying out selective homoepitaxy growth in the semiconductor homo-substrate, so that each discrete in the seed crystal array
The merging of growing up of external convex type seed crystal form non-porous continuous epitaxy single-crystal chip or film, so as to obtain and the external convex type seed crystal
The identical homogeneity epitaxial layer of chemical constituent;Wherein, pass through the periodic structure between the homogeneity epitaxial layer and female substrate
The part that is coated by extension barrier layer of each periodic structure unit connect.
Preferably, the semiconductor homo-substrate is after repeatedly using, from the semiconductor homo-substrate
Before the homogeneity epitaxial layer is shifted in stripping, to being coated in the semiconductor homo-substrate outside each periodic structure unit
Extension barrier layer thickened, to restore the reusability of the semiconductor homo-substrate.
As described above, the semiconductor homo-substrate technical method of the present invention, has the advantages that:
The semiconductor homo-substrate of the present invention is thick using the direct epitaxial growth single-crystal wafer of vapor-phase reactant or film
Degree is only simply controlled by growth time, and spillage of material caused by avoiding conventional wafer cutting technique makes full use of material resources;
Also, quick, easily machinery or the chemical etching stripping transfer of chip or film after growth can be implemented.In addition, with equal
The periodic structure unit of even distribution can provide stable mechanical support, just for the LED reverse mounting type or film of follow-up vapor phase growth
Female substrate, which is relied on, in LED reverse mounting type or film carries out various device fabrications without fragmentation.In addition, tradition can be undergone
Cleaning process and be hardly damaged, and can reuse.
The preparation method of the semiconductor homo-substrate of the present invention, can advantageously using LED reverse mounting type or film realize it is flexible,
The processing of lightweight device, and further save material resources;Also, fundamentally solve GaN base semiconductor technology due to a lack of
The lattice mismatch and thermal mismatch problem that body monocrystalline is encountered obtain high-crystal quality GaN wafer or film, device can be carried out
The more reasonably design of electricity, optics etc.;Further, it is possible to advantageously realize that the GaAs bases unijunction of different with gaps width is flexible
Thin battery, and then mechanically stacked composition multijunction solar cell can be carried out, conventional epitaxial is avoided to stack the complicated technology generated, and
And multijunction cell can also be formed with Ge, Si, gaN series row flexible thin, the design for multijunction solar cell provides more
With gap layout freedoms, promote photovoltaic conversion efficiency, and reduce multijunction solar cell cost.
The preparation method of the homogeneity epitaxial layer of the present invention, on the basis of the preparation method of the semiconductor homo-substrate of the present invention
On, direct epitaxial growth single-crystal wafer or film, thickness are only simply controlled by growth time, avoid conventional wafer cutting technique
Caused by spillage of material, make full use of material resources;Also, can directly by chip or film by it is quick, easily machinery or
The stripping transfer of person's chemical etching.In addition, reusable semiconductor homo-substrate, saves material resources.In addition, obtained thin crystalline substance
Piece either film by with equally distributed periodic structure unit provide stable mechanical support convenient for LED reverse mounting type or film according to
It holds in the palm and carries out various device fabrications without fragmentation in female substrate.
Description of the drawings
Fig. 1 is shown as the flow diagram of the preparation method of the semiconductor homo-substrate of first embodiment of the invention.
Fig. 2~Figure 15 is shown as the schematic diagram of the preparation method of the semiconductor homo-substrate of first embodiment of the invention.
Figure 15 is also illustrated as the semiconductor homo-substrate schematic diagram of second embodiment of the invention.
Figure 16 is shown as the flow diagram of the preparation method of the homogeneity epitaxial layer of third embodiment of the invention.
Figure 17~Figure 19 is shown as the schematic diagram of the preparation method of the homogeneity epitaxial layer of third embodiment of the invention.
Component label instructions
101 female substrates
102 mask layers
103 periodic structure units
104 extension barrier layers
105 melts/melt substance/melt curing material
106 external convex type seed crystals
107 epitaxially grown layers
S1~S7 steps
Specific embodiment
Illustrate embodiments of the present invention below by way of specific specific example, those skilled in the art can be by this specification
Disclosed content understands other advantages and effect of the present invention easily.The present invention can also pass through in addition different specific realities
The mode of applying is embodied or practiced, the various details in this specification can also be based on different viewpoints with application, without departing from
Various modifications or alterations are carried out under the spirit of the present invention.
~Figure 18 is please referred to Fig.1, the first embodiment of the present invention is related to a kind of preparation methods of semiconductor homo-substrate.
It should be noted that the diagram provided in present embodiment only illustrates the basic conception of the present invention in a schematic way, then in schema
Component count, shape and size when only display is with related component in the present invention rather than according to actual implementation are drawn, practical real
The kenel of each component, quantity and ratio can be a kind of random change, and its assembly layout kenel may also be increasingly complex when applying.
As shown in Figure 1, the preparation method of the semiconductor homo-substrate of present embodiment includes at least following steps:
Step S1 provides a female substrate 101, as shown in Figure 2.
In step sl, female substrate 101 is single-crystal wafer or the aimed semiconductor extension being grown on heterogeneous single-chip
Monocrystal thin films.Also, female substrate 101 in present embodiment has certain universality, and most of semi-conducting material may be used,
Such as Si, Ge, GaAs base, GaN base semi-conducting material, and limited without crystal orientation, it is brilliant suitable for the monocrystalline of arbitrary crystal orientation
Piece or semiconductor epitaxial monocrystal thin films.
Step S2 forms the periodic structure being at least made of several periodic structure units 103 in female 101 surface of substrate,
As shown in Fig. 3~Fig. 6.
In step s 2, specific method is:
Step S21 forms the mask layer 102 with predetermined period structure graph, such as Fig. 3 and Fig. 4 in female 101 surface of substrate
It is shown.Wherein, Fig. 3 is the vertical view of Fig. 4, since mask layer 102 is used to make the periodic structure in subsequent technique, it is therefore desirable to
Periodic structure figure is first formed in mask layer 102;In the present embodiment, it according to actually required periodic structure pattern, adopts
Preset periodic structure figure in mask layer 102 is formed with conventional ultra-violet exposure photoetching technology.Certainly, in other embodiment
In, the figure in other techniques formation mask layer 102 can also be used.
Step S22, the figure based on mask layer 102 in forming periodic structure on female substrate 101, wherein, periodic structure is extremely
The identical periodic structure unit 103 of several shapes including array arrangement less, as shown in Figure 5.Wherein, due to mask layer 102
In comprising predetermined period structure graph, in the present embodiment, using inductive couple plasma dry etching, by mask layer 102
In figure turn to be engraved on female substrate 101, tied so as to form period identical with predetermined period structure graph on female substrate 101
Structure pattern.Certainly, in other embodiments, periodic structure pattern can also be formed on female substrate 101 using other techniques.
Step S23 removes mask layer 102, as shown in Figure 6.Wherein, in the present embodiment, it is removed using acetone solution
Mask layer 102.Certainly, in other embodiments, other organic solvents dissolving removal mask layer 102 can also be used.
In addition, periodic structure unit 103 is for column, strip, band-like, wavy, taper or other regular shapes and not
Regular shape.In the present embodiment, as an example, periodic structure unit 103 is column.
Step S3 is used to implement the extension blocking of selective epitaxial growth in female substrate 101 and Periodic structure surface formation
Layer 104, as shown in Figure 7.
As an example, extension barrier layer is SiO2Layer.
As an example, using plasma enhanced atomic (Plasma-enhanced atomic layer
Deposition, PE-ALD) method formation SiO2Layer, using the atom level uniformity of ALD growths in female 101 surface of substrate and week
Each 103 surface of periodic structure unit (including upper surface and sidewall surfaces) of phase structure forms SiO in homogeneous thickness2Layer, profit
Female substrate 101 is avoided to be destroyed under high temperature environment by oxidizing atmosphere with the low-temperature epitaxy characteristic (being less than 300 DEG C) of PE-ALD.
Step S4 is correspondingly formed external convex type seed crystal at the top of each periodic structure unit, so as to be formed at least by several
The seed crystal array that a external convex type seed crystal is formed, finally obtains semiconductor homo-substrate, as shown in Fig. 8~Figure 15.
In step s 4, specific method is:
Step S41, in filling melt on extension barrier layer 104 and between each periodic structure unit 103 of periodic structure
105, and cured, as shown in Fig. 8~Figure 12.Wherein, including at least following steps:
Substrat structure behind formation extension barrier layer 104 is immersed in a melt 105, then takes out and incline by step S411
It tiltedly places, and keeps environment temperature higher than 105 fusing point of melt substance, make on extension barrier layer 104 and each week of periodic structure
Gap between phase structural unit 103 is filled up by melt 105, and extra melt 105 is made to trickle automatically and leaves substrat structure table
Face, as shown in Fig. 8~Figure 10.Specifically, the substrat structure behind formation extension barrier layer 104 is immersed in a melt 105,
Wherein, melt 105 is the hydrophobic organic solid object for being less than or equal to 300 DEG C using melting temperature and being dissolved in organic solvent
Matter, the liquid obtained after being melted, such as:Paraffin, hot melt adhesive etc., melt 105 are the melt liquid of such substance;Then
Substrat structure is taken out slant setting, a tilt stand may be used, the substrat structure of taking-up is placed on tilt stand, and
Environment temperature is kept higher than 105 fusing point of melt substance, 103 gaps of periodic structure unit is made to be filled up and extra by melt 105
Automatically substrat structure surface is left in trickling to melt 105.Furthermore it is also possible to the angle by adjusting tilt stand, to adjust from molten
The tilted-putted angle of substrat structure after being taken out in body 105, so as to control extra melt 105, substrate knot is left in trickling automatically
The speed on structure surface.
It is to be understood that in the environment of higher than 105 melting temperature of melt substance, the substrate knot with periodic structure
Structure is immersed in melt 105, the gap that melt 105 can be between spontaneous exclusion air fill cycle structural unit 103, the implementation of filling
There is no substrate dimension limitation, it is only necessary to which 105 area of melt is more than 101 area size of female substrate, is served as a contrast suitable for the mother of any size
Bottom 101;Meanwhile under the temperature environment higher than 105 fusing point of melt substance, melt 105 has sufficient mobility, when inclination is put
Put substrat structure (when periodic structure unit 103 is strip or is band-like, substrat structure inclined direction is vertical with item, band direction)
When, the meeting of melt 105 higher than 103 top of periodic structure unit is trickled automatically leaves substrat structure surface, and periodic structure unit
Melt 105 between 103 is retained due to the barrier effect of periodic structure and the viscosity of melt substance 105.
Step S412, the substrat structure that will be filled with melt 105 is horizontal positioned, and environment temperature is still kept to be higher than melt substance
Fusing point is stood so that melt 105 is uniformly filled between each periodic structure unit 103 of periodic structure, as shown in figure 11.Tool
It says to body, the substrat structure for filling up melt 105 is removed from tilt stand, the horizontal position being placed under identical environment,
And stand a period of time, so as to ensure melt 105 can be uniformly filled in periodic structure each periodic structure unit 103 it
Between.
Substrat structure after standing is cooled to room temperature by step S413, so that melt 105 cures, as shown in figure 12.
As an example, using paraffin as melt substance 105, paraffin melting point is about 57 DEG C, opens heating constant-temperature system, makes
Environment temperature is maintained at 60 DEG C.
As an example, the time that the substrat structure formed behind extension barrier layer 104 is immersed in melt 105 is 10min.
As an example, the substrat structure taken out from melt 105 places 60min with 60 ° of angle tilts.
As an example, the substrat structure that will be filled with melt 105 is horizontal positioned, in 60 DEG C of left at ambient temperature 60min, make
Paraffin melt 105 is uniform in the 103 gap fillings of periodic structure unit.
As an example, closing heating constant-temperature system, the substrat structure after standing 60min is made to naturally cool to room temperature, paraffin
Melt 105 cools and solidifies and a certain amount of volume contraction occurs, and makes 105 tip portion of periodic structure unit that protruding state be presented,
As shown in figure 12.
It should be noted that due to the mobility of melt 105, the filling of melt substance 105 has from planarization, does not serve as a contrast
The limitation of bottom size, suitable for female substrate of various sizes, as conditional electronic industry is 4 inches all, 6 inches, 8 inch standards crystalline substance
Female substrate of piece area.
In addition, the selection for melt 105, it is desirable that selected melt 105 infiltrates, and melt with extension barrier layer 104
Volume contraction is smaller after 105 curings, and melt curing material toughness is relatively good or than relatively soft, so as to will not be because of from liquid
Melt curing material 105 is caused to crack or detached with extension barrier layer 104 to the volume change that solid physical phase transition generates,
Thereby, it is ensured that melt curing material 105 and 104 tight bond of extension barrier layer, can provide for the extension barrier layer 104 of its cladding
Sufficient anti-wet etching protective effect.
In addition, the filling thickness of melt 105 is by the angle of inclination of substrat structure, residing environment temperature, tilted-putted
Time codetermines.In general, the viscosity of melt 105 is smaller, bigger, the residing environment temperature in the angle of inclination of substrat structure
Higher, the tilted-putted time is longer, and the filling thickness of melt 105 is with regard to smaller;Vice versa.Also, due to higher than fusing point
In the environment of temperature, the melt substance 105 of all positions has mobility all in liquid in substrat structure;In melt 105
On flow direction, 105 thickness of melt filled between periodic structure unit 103 is there are micro difference, higher than melt melting temperature
Environment temperature under, since melt 105 is from planarization, i.e. automatic uniform, standing to appropriate time substrat structure can disappear
Except this difference in thickness.By taking paraffin melt liquid as an example, fusing point is 57 DEG C, 60 DEG C of the environment temperature selected as of placement, substrate
10min in structure submergence paraffin molten, you can be sufficient filling with the gap between periodic structure unit 103, then inclined with 60 ° of angles
Tiltedly place 60min, you can the fully extra vasoliniment of trickling removal substrate surface;Finally, by substrat structure horizontal rest ring
Border temperature is 60 DEG C, places 60min, you can makes melt 105 from melt 105 that is smooth, being filled between elimination periodic structure unit 103
The micro difference of thickness.
In addition, melt 105 cools and solidifies the uniformity for maintaining the filling of liquid melts substance, simultaneously as melt substance
From liquid to solid object phase change, a small amount of volume contraction occurs for melt substance, makes each periodic structure after the curing of melt 105
The state of protrusion is presented in the top of supply line of unit 103, convenient for subsequent 103 top melt curing material 105 of periodic structure unit
Removal.
Step S42 removes the melt curing material at the top of each periodic structure unit of periodic structure and corresponding extension
Barrier layer, with the top of each periodic structure unit of exposure cycles structure, as shown in Figure 13 and Figure 14.Wherein, it includes at least
Following steps:
Substrat structure after already solidified melt 105 is placed in low-solubility solvent by step S421, makes melt curing material
105 slightly solubles remove the melt curing material at 103 top of each periodic structure unit of periodic structure, to expose periodic structure
The top of each periodic structure unit 103 extension barrier layer, as shown in figure 13.Wherein, low-solubility solvent is controllable molten
The solution rate of body curing material 105 is cured with the melt for dissolving 103 top of each periodic structure unit of periodic structure at a slow speed
The organic solvent of substance, such as:The sl. sol. acetone to paraffin.
It is noted that due to the viscosity of melt 105, it is molten in addition to being filled between each periodic structure unit 103
Outside body substance 105, each 103 top of periodic structure unit can also retain certain thickness melt substance film.It is melted using slightly soluble
The low-solubility solvent of body substance can realize that relatively accurately control removal is molten by controlling the amount of dissolution time or solvent
The amount of body substance so as to which the melt substance 105 for only making 103 top of periodic structure unit is removed, makes periodic structure unit top
Extension barrier layer 104 appear, and the extension barrier layer 104 of other parts is still coated by melt substance 105.
As an example, using acetone slightly soluble paraffin, the paraffin thin layer at 103 top of periodic structure unit unless each is removed in dissolving,
Only make the SiO at 103 top of periodic structure unit2Layer appears, the SiO of other parts2Layer is still coated by paraffin.
Step S422 removes the extension barrier layer 104 at 103 top of each periodic structure unit of periodic structure, with exposure
Go out the top of each periodic structure unit 103 of periodic structure, as shown in figure 14.
In the present embodiment, using the extension barrier layer on 103 top of wet etching selective removal periodic structure unit
104, the aimed semiconductor material for only making 103 top of periodic structure unit is exposed.It should be noted that for etching extension blocking
The corrosive liquid of layer 104 is not chemically reacted with melt substance 105, does not also make melt substance 105 that swelling physical change occur, from
And the extension barrier layer 104 that melt curing material 105 is enable to be coated for it provides sufficient anti-etching protection, stops extension
The etching removal of layer 104 occurs over just the top of supply line of periodic structure unit 103, and extension barrier layer 104 is along periodic structure list
The axial etching depth of member 103 is controlled by etch period.Certainly, in other embodiments, can also be gone using other techniques
Except the extension barrier layer 104 on 103 top of periodic structure unit.
As an example, using BOE etching liquids (HF:NH4F=1:6) 103 top of selective etch removal periodic structure unit
SiO2Layer, etch period 3min.
In addition, in other embodiments, for step S3, stop in female substrate 101 and Periodic structure surface with extension
Between layer 104, one can also be formed for preventing diffusion trapping layer of the oxygen element to semiconductor diffusion inside;For step S42,
Melt curing material 105 and corresponding extension barrier layer 104 at 103 top of each periodic structure unit of removal periodic structure
When, also remove corresponding position diffusion trapping layer, with the top of each periodic structure unit of exposure cycles structure.As showing
Example, diffusion trapping layer are SiNx, equally using plasma enhanced atomic method in female substrate 101 and Periodic structure surface
It is formed.
Step S43 removes remaining melt curing material 105, so that the top that each periodic structure unit 103 is exposed
As an external convex type seed crystal 106, while the part conduct that each periodic structure unit 103 is made to be coated by extension barrier layer 104
The support portion of external convex type seed crystal 106, so as to form the seed crystal array being at least made of several external convex type seed crystals 106, such as Figure 15
It is shown.Wherein, when removing remaining melt curing material, remaining melt solidfied material is removed using the dissolving of highly dissoluble solvent
Matter;Highly dissoluble solvent is the rapidly dissolvable organic solvent for removing remaining melt curing material 105 completely, such as:To stone
Using tetrahydrofuran, toluene etc. for wax, neither generate chemical reaction with extension barrier layer 104, also not with aimed semiconductor
Material generates chemical reaction, is only used for removing the melt curing material 105 in 103 gaps of periodic structure unit, and then realize
Set external convex type seed crystal array makes.
As an example, the paraffin between periodic structure unit 103 unless each is removed using tetrahydrofuran dissolving.
By above-mentioned steps S1~step S4, the final complete preparation for realizing semiconductor homo-substrate.
It should be noted that since inductive couple plasma dry etching technology has been widely used for Si, Ge, GaAs
The lithography of the semi-conducting materials such as base, GaN base, and SiO2Being that these semiconductor crystals are common again realizes selective epitaxial life
Long extension barrier material, meanwhile, ALD growths SiO2Or SiNxMethod is also commonly used in type semi-conducting material, this embodiment party
The preparation method of the semiconductor homo-substrate of formula have certain universality, suitable for all three generations's semi-conducting materials (Si, Ge,
GaAs bases, GaN base).It, can be to the crystalline substance of arbitrary crystal orientation and due to the highly collimated property of inductive couple plasma dry etching
Piece or epitaxy single-crystal film carry out collimation etching, therefore without crystalline substance in the preparation method of the semiconductor homo-substrate of present embodiment
Body orientation limitation.And when carrying out the preparation of periodic structure using the method for wet etching, although cost can be reduced, need
In view of the limitation of different crystal orientations, and GaN material is not suitable for carrying out wet etching processing.
In addition, the size by controlling periodic structure unit 103 in semiconductor homo-substrate, makes periodic structure unit 103
Height is suitable with its end face smallest dimension size or smaller, make periodic structure that there is enough mechanical strengths in this way, thus
Obtained semiconductor homo-substrate can undergo conventional wafer cleaning process and be hardly damaged.
In addition, due to melt 105 fill from planarization and the limitation without substrate dimension and pass through slightly soluble solvent levels
Controllably 105 film of melt curing material on 103 top of removal periodic structure unit, through the above technical solutions, being easily achieved
The semiconductor homo-substrate of Current electronic industrial standard chip area make (no matter 4 inch wafers, 6 inch wafers or 8 English
Very little chip), and it is simple process, stabilization, reliable, it is highly controllable, it is reproducible, while scale is suitble to make again, it is very suitable
Close industrially scalable application.
The step of various methods divide above, be intended merely to describe it is clear, when realization can be merged into a step or
Certain steps are split, are decomposed into multiple steps, as long as comprising identical logical relation, all in the protection domain of this patent
It is interior;To inessential modification is either added in algorithm in flow or introduces inessential design, but do not change its algorithm
Core design with flow is all in the protection domain of the patent.
5 are please referred to Fig.1, second embodiment of the invention is related to a kind of semiconductor homo-substrate, includes at least:
Female substrate 101;
It is formed in the periodic structure being at least made of several periodic structure units 103 on female 101 surface of substrate;
It is formed in the extension barrier layer 104 for being used to implement selective epitaxial growth of female substrate 101 and Periodic structure surface;
Be correspondingly formed in the external convex type seed crystal 106 at the top of each periodic structure unit 103, if so as to formed at least by
The seed crystal array that dry external convex type seed crystal 106 is formed.
As shown in figure 15, external convex type seed crystal 106, periodic structure unit 103 and female substrate 101 are structure as a whole.Each
The exposed top of periodic structure unit 103 is external convex type seed crystal 106, and the upper surface of external convex type seed crystal 106 and sidewall surfaces are equal
Not selected property epitaxial growth mask layer 104 covers.
In addition, periodic structure unit 103 is for column, strip, band-like, wavy, taper or Else Rule shape and not
Regular shape.Female substrate 101 is single-crystal wafer or the aimed semiconductor epitaxy single-crystal film being grown on heterogeneous single-chip.
The semiconductor homo-substrate of present embodiment can carry out selective homogeneity vapor phase epitaxial growth directly over.
When implementing vapor phase epitaxial growth thereon, due to the barrier effect on extension barrier layer 104, crystal epitaxy occurs over just week
The top of phase structural unit 103, i.e. external effect seed crystal 106.Because all external effect seed crystals 106 are all from same female substrate 101
Single-chip or hetero-epitaxy monocrystal thin films have identical crystal orientation, with the life of each external effect seed crystal 106
It grows up, all external effect seed crystals 106, which can grow up, merges into a single monocrystal thin films epitaxial layer 107, when passing through growth
Between control can obtain single-crystal wafer or with predetermined thickness monocrystal thin films epitaxial layer 107.
The semiconductor homo-substrate of present embodiment repeats utilization, and almost all three generations's semi-conducting materials (are included
Si, Ge, GaAs base, GaN base etc.), can by isoepitaxial growth from vapor-phase reactant directly obtain single-crystal wafer or
The controllable transferable monocrystal thin films of thickness, this will push conventional wafer technology to inexpensive, high raw material utilization efficiency, LED reverse mounting type
Technique direction develops, and realizes GaN single crystal wafer technologies;And then push flexibility, lightweight, efficient, low cost mono-crystalline silicon solar electricity
The development of pool technology, pushes the development of the GaN high performance lED technologies based on homo-substrate, push comprising Si, Ge, GaAs base,
The development of the mechanical laminated multijunction solar cell technology of GaN base.
It is not difficult to find that the semiconductor homogeneity that the semiconductor homo-substrate of present embodiment passes through first embodiment of the invention
The preparation method of substrate obtains.The relevant technical details mentioned in first embodiment are still effective in the present embodiment,
In order to reduce repetition, which is not described herein again.Correspondingly, the relevant technical details mentioned in present embodiment are also applicable in first
In embodiment.
6~Figure 19 is please referred to Fig.1, third embodiment of the invention is related to a kind of preparation method of homogeneity epitaxial layer.This reality
The mode of applying needs to be implemented, therefore the first embodiment party on the basis of step S1~step S4 of first embodiment of the invention
The relevant technical details mentioned in formula are still effective in the present embodiment, and in order to reduce repetition, which is not described herein again.
As shown in figure 16, the preparation method of the homogeneity epitaxial layer of present embodiment, including at least following steps:
Using step S1~step S4 of first embodiment of the invention, semiconductor homo-substrate is prepared.
Step S5, in semiconductor homo-substrate formed homogeneity epitaxial layer 107, as shown in Figure 16~Figure 18, wherein, homogeneity
Epitaxial layer 107 is epitaxy single-crystal chip or film.
In step s 5, specific method is:In carrying out selective homoepitaxy growth in semiconductor homo-substrate, so that seed
The merging of growing up of each discrete external convex type seed crystal 106 forms non-porous continuous epitaxy single-crystal chip or film, such as Figure 17 in brilliant array
It is shown, so as to obtain the homogeneity epitaxial layer 107 identical with 106 chemical constituent of external convex type seed crystal, as shown in figure 18.Wherein, homogeneity
It is coated between epitaxial layer 107 and female substrate 101 by each periodic structure unit 103 of periodic structure by extension barrier layer 104
Part connection.
It should be noted that when selective homoepitaxy growth is carried out in semiconductor homo-substrate, need by reasonable
Epitaxial growth method and condition are adjusted, makes the selective growth on each external convex type seed crystal 106 of homogeneity epitaxial layer 107.
As an example, using MOCVD Metalorganic Chemical Vapor Depositions, raw material trimethyl gallium TMGa, arsine AH are used3
Epitaxial growth GaAs.
As an example, using low-pressure chemical vapor deposition method, raw material GeH is used4Epitaxial growth Ge.
As an example, using MOCVD Metalorganic Chemical Vapor Depositions, raw material trimethyl gallium TMGa, ammonia NH are used3
Epitaxial growth GaN.
As an example, using aumospheric pressure cvd method, SiHCl3Gas is source epitaxial growth Si.
In addition, it is noted that with the progress of growth, the external convex type seed crystal 106 of various discrete is gradually grown up, then
It gradually merges, forms epitaxy single-crystal chip or film, the epitaxy single-crystal for obtaining predetermined thickness is controlled by growth time
Chip or film are obtained outside the semiconductor epitaxial single-crystal wafer identical with 106 chemical constituent of external convex type seed crystal or film homogeneity
Prolong layer 107.When implementing selective vapor epitaxial growth, 103 top of periodic structure unit is raw because of the transverse direction of external convex type seed crystal 106
It grows and merges, be retained the gap between each periodic structure unit 103, so that by implementing homoepitaxy life
It is only connected between the long epitaxy single-crystal chip obtained or film and female substrate 101 by each periodic structure unit 103, otherly
Side is gap, and so as to form uniform sequential empty structure, this empty structure may be used as some subsequent processing technologys
Gas passage or chemical solution channel, convenient for before homogeneity epitaxial layer 107 is transferred to the lower surface of homogeneity epitaxial layer 107 into
Row chemical etching (wet method either reactive ion dry etching) realizes stripping transfer or the processing of other surfaces (such as surface suede
Face, PE-ALD plated films etc.).Because of the size uniform of each periodic structure unit 103, the spatial distribution on female substrate 101
Uniformity can be that homogeneity epitaxial layer 107 provides a kind of metastable mechanical support in this way, convenient for homogeneity epitaxial layer
107, which rely on female substrate 101, carries out various device fabrications and is less prone to fragmentation, so as to greatly improve flexible device making into
Product rate.
Also, pass through the size and spatial distribution of controlling cycle structural unit 103 and controlling cycle structure end face institute
Female 101 surface area ratio of substrate is accounted for, makes this ratio as small as possible, meets homogeneity epitaxial layer 107 and periodic structure unit 103
Contact position easily occur crystal dissociation, with realize the mechanical stripping of homogeneity epitaxial layer 107 shift.
Step S6, the stripping transfer homogeneity epitaxial layer 107 from semiconductor homo-substrate, as shown in figure 19, so as to fulfill same
The transfer of matter epitaxial layer 107.
In step s 6, specific method is:Removed by vacuum suction machinery or wet chemical etch stripping side
Method detaches homogeneity epitaxial layer 107 and semiconductor homo-substrate in the position of external convex type seed crystal 106, realizes homogeneity epitaxial layer 107
Transfer.
As an example, to GaN wafer, because of wet etching difficulty, it is only capable of removing by vacuum suction machinery.
As an example, for Si chips, Ge chips, lye etching stripping can be used, it can also vacuum suction machinery stripping
As an example, for GaAs chips, the stripping of vacuum suction machinery can be used, wet etching stripping, example can also be used
Such as use H2SO4+H2O2+H2O is etched.
In the present embodiment, the semiconductor homo-substrate after stripping transfer homogeneity epitaxial layer 107 is suitable for being re-used in
It is formed in the step S5 of the homogeneity epitaxial layer.It is to be understood that when the homogeneity epitaxial layer for implementing isoepitaxial growth acquisition
After 107 stripping transfer, periodic structure unit 103 is still located on female substrate 101, the extension barrier layer on form and its periphery
104 all holdings are complete, only in the top bare semiconductor material of periodic structure unit 103, i.e. 103 top of periodic structure unit still
106 quality of external convex type seed crystal is so kept, therefore after the stripping transfer of homogeneity epitaxial layer 107 of isoepitaxial growth acquisition, it is remaining
Structuring semiconductor homo-substrate can be reused directly.
In addition, in the present embodiment, semiconductor homo-substrate serves as a contrast after repeatedly using from semiconductor homogeneity
On bottom before stripping transfer homogeneity epitaxial layer 107, to being coated in semiconductor homo-substrate outside each periodic structure unit 103
Extension barrier layer 104 is thickened, to restore the reusability of semiconductor homo-substrate.Consider in semiconductor homo-substrate reality
When applying homogeneity vapor phase epitaxial growth, vapor-phase reactant extension barrier layer 104 may be generated it is a certain amount of corrode be thinned (such as
SiO2Layer surface generates evaporable GaOx,GeOx,SiOx), after semiconductor homo-substrate undergoes the reuse of certain number,
From semiconductor homo-substrate stripping transfer homogeneity epitaxial layer 107 before, using PE-ALD methods to extension barrier layer 104 into
Row thickens, and can further ensure the repeatable usability of semiconductor homo-substrate.
Substrate after above-mentioned steps S1~step S6 and stripping returns to S5 and reuses, and final complete realization is same
The growth of matter epitaxial layer and stripping transfer.
Therefore the preparation method of the homogeneity epitaxial layer of present embodiment, in partly leading for first embodiment of the invention
On the basis of the preparation method of body homo-substrate, direct epitaxial growth single-crystal wafer or film, thickness only pass through growth time letter
Single control, spillage of material caused by avoiding conventional wafer cutting technique, makes full use of material resources;It also, can be directly by chip
Or film passes through quick, easily machinery or chemical etching stripping transfer.In addition, reusable semiconductor homo-substrate,
Save material resources.In addition, obtained LED reverse mounting type or film with equally distributed periodic structure unit by providing stabilization
Mechanical support relies on female substrate convenient for LED reverse mounting type or film and carries out various device fabrications without fragmentation.
In conclusion semiconductor homo-substrate of the present invention and preparation method thereof, has the advantages that:
The semiconductor homo-substrate of the present invention is thick using the direct epitaxial growth single-crystal wafer of vapor-phase reactant or film
Degree is only simply controlled by growth time, and spillage of material caused by avoiding conventional wafer cutting technique makes full use of material resources;
Also, quick, easily machinery or the chemical etching stripping transfer of chip or film after growth can be implemented.In addition, with equal
The periodic structure unit of even distribution can provide stable mechanical support, just for the LED reverse mounting type or film of follow-up vapor phase growth
Female substrate, which is relied on, in LED reverse mounting type or film carries out various device fabrications without fragmentation.In addition, tradition can be undergone
Cleaning process and be hardly damaged, and can reuse.
The method of the semiconductor homo-substrate technology of the present invention, can advantageously using LED reverse mounting type or film realize it is flexible,
The processing of lightweight device, and further save material resources;Also, fundamentally solve GaN base semiconductor technology due to a lack of
The lattice mismatch and thermal mismatch problem that body monocrystalline is encountered obtain high-crystal quality GaN wafer or film, device can be carried out
The more reasonably design of electricity, optics etc.;Further, it is possible to advantageously realize that the GaAs bases unijunction of different with gaps width is flexible
Thin battery, and then mechanically stacked composition multijunction solar cell can be carried out, conventional epitaxial is avoided to stack the complicated technology generated, and
And multijunction cell can also be formed with Ge, Si, gaN series row flexible thin, the design for multijunction solar cell provides more
With gap layout freedoms, promote photovoltaic conversion efficiency, and reduce multijunction solar cell cost.
The preparation method of the homogeneity epitaxial layer of the present invention, on the basis of the preparation method of the semiconductor homo-substrate of the present invention
On, direct epitaxial growth single-crystal wafer or film, thickness are only simply controlled by growth time, avoid conventional wafer cutting technique
Caused by spillage of material, make full use of material resources;Also, can directly by chip or film by it is quick, easily machinery or
The stripping transfer of person's chemical etching.In addition, reusable semiconductor homo-substrate, saves material resources.In addition, obtained thin crystalline substance
Piece either film by with equally distributed periodic structure unit provide stable mechanical support convenient for LED reverse mounting type or film according to
It holds in the palm and carries out various device fabrications without fragmentation in female substrate.
So the present invention effectively overcomes various shortcoming of the prior art and has high industrial utilization.
The above-described embodiments merely illustrate the principles and effects of the present invention, and is not intended to limit the present invention.It is any ripe
The personage for knowing this technology all can carry out modifications and changes under the spirit and scope without prejudice to the present invention to above-described embodiment.Cause
This, those of ordinary skill in the art is complete without departing from disclosed spirit and institute under technological thought such as
Into all equivalent modifications or change, should by the present invention claim be covered.
Claims (17)
1. a kind of preparation method of semiconductor homo-substrate, which is characterized in that the preparation method of the semiconductor homo-substrate is extremely
Include the following steps less:
One female substrate is provided;
In the periodic structure that female substrate surface formation is at least made of several periodic structure units;
The extension barrier layer of selective homoepitaxy growth is used to implement in female substrate and Periodic structure surface formation;
External convex type seed crystal is correspondingly formed at the top of each periodic structure unit, so as to be formed at least by outer several described
The seed crystal array that prominent type seed crystal is formed, finally obtains the semiconductor homo-substrate.
2. the preparation method of semiconductor homo-substrate according to claim 1, which is characterized in that in female substrate surface
The periodic structure being at least made of several periodic structure units is formed, specific method is:
The mask layer with predetermined period structure graph is formed in female substrate surface;
Figure based on the mask layer in forming periodic structure on female substrate, wherein, the periodic structure includes at least
The identical periodic structure unit of several shapes of array arrangement;
Remove the mask layer.
3. the preparation method of semiconductor homo-substrate according to claim 1, which is characterized in that tied in each period
External convex type seed crystal is correspondingly formed at the top of structure unit, so as to form the seed crystal battle array being at least made of external convex type seed crystal several described
Row, finally obtain the semiconductor homo-substrate, specific method is:
In filling melt, and consolidated on the extension barrier layer and between each periodic structure unit of the periodic structure
Change;
The melt curing material at the top of each periodic structure unit of the periodic structure and corresponding extension barrier layer are removed, with
The top of each periodic structure unit of the exposure periodic structure;
Remaining melt curing material is removed, so that the top that each periodic structure unit is exposed is as an external convex type
Seed crystal, while make each periodic structure unit by support of the part that extension barrier layer coats as the external convex type seed crystal
Portion so as to form the seed crystal array being at least made of several external convex type seed crystals, finally obtains the semiconductor homo-substrate.
4. the preparation method of semiconductor homo-substrate according to claim 3, which is characterized in that in the extension barrier layer
Melt is filled, and cured between each periodic structure unit of upper and described periodic structure, specific method is:
The substrat structure behind the extension barrier layer will be formed to be immersed in a melt, then take out slant setting, and retaining ring
Border temperature is higher than the melt melting point substance, makes on the extension barrier layer and each periodic structure unit of the periodic structure
Between gap filled up by the melt, and make extra melt automatically trickling leave substrat structure surface;
The substrat structure that will be filled with the melt is horizontal positioned, and the environment temperature is still kept to be melted higher than the melt substance
Point is stood so that the melt is uniformly filled between each periodic structure unit of the periodic structure;
Substrat structure after standing is cooled to room temperature, so that the melt cures.
5. the preparation method of semiconductor homo-substrate according to claim 3, which is characterized in that remove the periodic structure
Each periodic structure unit at the top of melt curing material and corresponding extension barrier layer, with each of the exposure periodic structure
The top of a periodic structure unit, specific method are:
The substrat structure after the melt will be cured to be placed in low-solubility solvent, make the melt curing material slightly soluble, go
Except the melt curing material at the top of each periodic structure unit of the periodic structure, to expose each of the periodic structure
Extension barrier layer at the top of periodic structure unit;
The extension barrier layer at the top of each periodic structure unit of the periodic structure is removed, to expose the periodic structure
The top of each periodic structure unit.
6. the preparation method of semiconductor homo-substrate technology according to claim 5, which is characterized in that the low dissolving
Property solvent to be controllable to dissolve the melt solidfied material at the top of each periodic structure unit for removing the periodic structure at a slow speed
The organic solvent of matter.
7. the preparation method of semiconductor homo-substrate according to claim 3, which is characterized in that removing remaining melt
During curing material, remaining melt curing material is removed using the dissolving of highly dissoluble solvent, the highly dissoluble solvent is can be fast
Instant solution removes the organic solvent of remaining melt curing material completely.
8. according to the preparation method of claim 3 any one of them semiconductor homo-substrate, which is characterized in that the melt is
It is less than or equal to 300 DEG C using melting temperature and the hydrophobic organic solid matter of organic solvent can be dissolved in, after being melted
The liquid arrived.
9. the preparation method of semiconductor homo-substrate according to claim 1, which is characterized in that in female substrate and week
Between phase body structure surface and the extension barrier layer, one is also formed for diffusion of the oxygen element to semiconductor diffusion inside to be prevented to hinder
Only layer;When melt curing material at the top of each periodic structure unit for removing the periodic structure and extension barrier layer, also
The diffusion trapping layer of corresponding position is removed, with the top of each periodic structure unit of the exposure periodic structure.
10. the preparation method of semiconductor homo-substrate according to claim 1, which is characterized in that the periodic structure list
Member is column, strip, band-like, wavy, taper or irregular shape.
11. the preparation method of semiconductor homo-substrate according to claim 1, which is characterized in that mother's substrate is single
Jingjing piece or the aimed semiconductor epitaxy single-crystal film being grown on heterogeneous single-chip.
12. a kind of semiconductor homo-substrate, which is characterized in that the semiconductor homo-substrate includes at least:
Female substrate;
It is formed in the periodic structure being at least made of several periodic structure units of female substrate surface;
It is formed in the extension barrier layer for being used to implement selective homoepitaxy growth of female substrate and Periodic structure surface;
It is correspondingly formed in the external convex type seed crystal at the top of each periodic structure unit, so as to be formed at least by several institutes
State the seed crystal array of external convex type seed crystal composition.
13. semiconductor homo-substrate according to claim 12, which is characterized in that the periodic structure unit for column,
Strip, band-like, wavy, taper or irregular shape.
14. semiconductor homo-substrate according to claim 12, which is characterized in that mother's substrate for single-crystal wafer or
The aimed semiconductor epitaxy single-crystal film being grown on heterogeneous single-chip.
15. a kind of preparation method of homogeneity epitaxial layer, which is characterized in that the preparation method of the homogeneity epitaxial layer includes at least such as
Lower step:
Using the preparation method of such as claim 1~11 any one of them semiconductor homo-substrate, semiconductor homogeneity lining is prepared
Bottom;
In forming homogeneity epitaxial layer in the semiconductor homo-substrate, the homogeneity epitaxial layer is epitaxy single-crystal chip or film;
The homogeneity epitaxial layer is shifted in stripping from the semiconductor homo-substrate;
Wherein, the semiconductor homo-substrate after the stripping transfer homogeneity epitaxial layer is suitable for being re-used in be formed outside the homogeneity
In the step of prolonging layer.
16. the preparation method of homogeneity epitaxial layer according to claim 15, which is characterized in that served as a contrast in the semiconductor homogeneity
Homogeneity epitaxial layer is formed on bottom, specific method is:
In carrying out selective homoepitaxy growth in the semiconductor homo-substrate, so that each discrete outer in the seed crystal array
The merging of growing up of prominent type seed crystal forms non-porous continuous epitaxy single-crystal chip or film, so as to obtain and external convex type seed crystal chemistry
The identical homogeneity epitaxial layer of component;Wherein, pass through each of the periodic structure between the homogeneity epitaxial layer and female substrate
The part that a periodic structure unit is coated by extension barrier layer connects.
17. the preparation method of homogeneity epitaxial layer according to claim 15, which is characterized in that the semiconductor homo-substrate
After repeatedly using, before the homogeneity epitaxial layer is shifted in stripping from the semiconductor homo-substrate, to described
The extension barrier layer being coated in semiconductor homo-substrate outside each periodic structure unit is thickened, to restore described half
The repeatable usability of conductor homo-substrate.
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