CN108231025B - Source electrode driving circuit and liquid crystal display device - Google Patents
Source electrode driving circuit and liquid crystal display device Download PDFInfo
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- CN108231025B CN108231025B CN201810013480.3A CN201810013480A CN108231025B CN 108231025 B CN108231025 B CN 108231025B CN 201810013480 A CN201810013480 A CN 201810013480A CN 108231025 B CN108231025 B CN 108231025B
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
- G09G3/3611—Control of matrices with row and column drivers
- G09G3/3685—Details of drivers for data electrodes
- G09G3/3688—Details of drivers for data electrodes suitable for active matrices only
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Abstract
At present, liquid crystal display devices are already applied to various fields of daily life, industry and the like, but in some industrial fields, environment can cause great influence on image data signal transmission of the display devices, and temperature, humidity and the like are common; however, in addition to the above environmental factors, there is an important factor that the normal transmission of image data of the display is affected when the display device is in the process of severe vibration, especially when the relevant display data part is abnormal, so as to affect the display.
Description
Technical Field
The invention relates to the field of liquid crystal displays, in particular in special industrial fields, such as high-temperature, severe-shock application environments.
Background
With the development of liquid crystal displays and industrial intelligence, advanced liquid crystal information management systems are gradually adopted to replace traditional instrument panels in many industrial fields; the liquid crystal display device is particularly applied to the forklift, the forklift is a special vehicle which is widely applied in modern industry, most of the existing forklifts are provided with a data display screen for displaying various data in the operation process of the forklift, but the use environment of the forklift is complex, particularly strong vibration, so that the liquid crystal display device which is practical in the complex environment and a driving method are needed.
The driving method of the display device is adjusted by monitoring the external environment in real time, so that the display effect of the display is ensured, and the power consumption can be reduced.
Disclosure of Invention
As described above, the present invention provides a display device capable of displaying related data more stably and reducing display power consumption, and the power consumption of the display data is enhanced by adding a power circuit to a source driving circuit of a liquid crystal display, so as to increase the speed of charging pixels.
The invention especially relates to a source electrode driving circuit, which comprises a plurality of source electrode drivers, a memory, a power circuit and a multiplexing switch; the source driver is connected with the memory and is connected with the display panel through the power circuit;
the power circuit is used for enhancing the power of the data signal;
when the scanning circuit is in a normal scanning period, the data signal output end of the source electrode driver directly drives the liquid crystal panel through one channel of the multiplexing switch;
when the liquid crystal display panel is in a special scanning period, the data signal output end of the source electrode driver drives the liquid crystal display panel through the other channel of the multiplexing switch and the power circuit;
the special scanning period comprises a display blanking period and a display scanning period, wherein the display blanking period is between the display scanning periods; where the scan period of the display scan period is 1/2 of the normal scan period.
The power circuit comprises a first resistor, wherein a first end of the first resistor is connected with a signal input end, a second end of the first resistor is connected with the grid electrode of a first transistor Q1, a first end of a first transistor Q1 is connected with a power supply VCC, and a second end of the first resistor is connected with a second pole of a ninth transistor Q9; the input end of the diode D1 is connected with the second end of the first resistor R1, and the output end of the diode D1 is connected with the grid of the second transistor Q2; the grid electrode of the second transistor Q2 is connected with the second end of the diode D1, the first end is connected with a power supply VCC, and the second end is connected with the grid electrode of the fourteenth transistor;
a first end of a third transistor Q3 is connected with an output end of a diode D1, a second end of the third transistor Q3 is connected with a low level VSS, a grid electrode of the third transistor Q3 is connected with a fourth transistor Q4, and a first end of a fourth transistor Q4 is connected with a second end of a resistor R1;
the grid electrode of the fourth transistor Q4 is connected with the grid electrode of the third transistor Q3, the first end of the fourth transistor Q4 is connected with the second end of the resistor, and the second end of the fourth transistor Q4 is connected with the low level VSS;
a first end of the fifth transistor Q5 is connected with the power VCC, a grid electrode of the fifth transistor Q5 is connected with a grid electrode of the sixth transistor Q6, and a second end of the fifth transistor Q5 is connected with a first end of the seventh transistor;
a first end of the fifth transistor Q5 is connected with the power VCC, a grid electrode of the fifth transistor Q5 is connected with a grid electrode of the sixth transistor Q6, and a second end of the fifth transistor Q5 is connected with a first end of the seventh transistor Q7;
a first end of the sixth transistor Q6 is connected with the power VCC, a grid electrode of the sixth transistor Q6 is connected with a grid electrode of the fifth transistor Q5, and a second end of the sixth transistor Q6 is connected with a first end of the eighth transistor Q8;
the gate of the seventh transistor Q7 is connected to the gate of the eighth transistor Q8, the first terminal of the seventh transistor Q7 is connected to the second terminal of the fifth transistor Q5, the second terminal of the seventh transistor Q7 is connected to the gate of the Q5 of the fifth transistor, to the first terminal of the ninth transistor Q9,
a first terminal of the eighth transistor Q8 is connected to the second terminal of the sixth transistor Q6, and a second terminal of the eighth transistor Q13 is connected to the gate of the thirteenth transistor Q13; a first end of the ninth transistor is connected with the second end of the Q7, a grid electrode of the ninth transistor is connected with a grid electrode of the tenth transistor, and a second end of the ninth transistor is connected with a first end of the eleventh transistor;
a first terminal of the tenth transistor Q10 is connected to the second terminal of the eighth transistor, a gate thereof is connected to the ninth transistor, and a second terminal thereof is connected to the twelfth transistor Q12;
a first terminal of the eleventh transistor Q11 is connected to the second terminal of the ninth transistor, a second terminal thereof is connected to the low level VSS, and a gate thereof is connected to the gate of the twelfth transistor Q12;
a gate of the twelfth transistor Q12 is connected to a gate of the eleventh transistor Q11, a first terminal thereof is connected to the second terminal of the tenth transistor Q10, and a second terminal thereof is connected to the low level VSS;
a gate of the thirteenth transistor Q13 is connected to the second terminal of the eighth transistor, a first terminal of the thirteenth transistor Q13 is connected to the power source VCC, and a second terminal of the thirteenth transistor Q14 is connected to the first terminal of the fourteenth transistor Q14;
a gate of the fourteenth transistor Q14 is connected to the second terminal of the second transistor Q2, a first terminal of the fourteenth transistor Q3578 is connected to the second terminal of the thirteenth transistor Q13, and a second terminal of the fourteenth transistor Q14 is connected to the low level VSS;
the capacitor C1 has a first terminal connected to the gate of the thirteenth transistor Q13, and a second terminal connected to the second terminal of the thirteenth transistor Q13 and the output terminal.
The power circuit can effectively increase the power of the input end signal by adjusting the power voltage, and improves the loaded capacity.
Of course, the specific structural components of the power circuit in the drawings of the specification, the transistors of which belong to Thin Film Transistors (TFTs), which belong to the well-known technology in the field of liquid crystal display, should be recognized by those skilled in the art.
The application particularly relates to a liquid crystal display device which comprises a source electrode driving circuit, a grid electrode driving circuit, a time schedule controller, a sensor and a microprocessor; the source driving circuit includes: the source drivers comprise a plurality of source drivers, a memory, a power circuit and a multiplexing switch K; the source electrode driver is connected with the memory and the display panel through the multiplexing switch and the power circuit;
the power circuit is used for enhancing the power of the data signal;
the memory is used for storing the current display data signal;
when the scanning circuit is in a normal scanning period, the data signal output end of the source electrode driver directly drives the liquid crystal panel through one channel of the multiplexing switch;
when the liquid crystal display panel is in a special scanning period, the data signal output end of the source electrode driver drives the liquid crystal display panel through the other channel of the multiplexing switch and the power circuit;
the special scanning period comprises a display blanking period and a display scanning period, wherein the display blanking period is between the display scanning periods; 1/2 in which the scan period of the display scan period is that of the normal scan period;
the microprocessor is connected with the control end of the multiplexing switch K and the sensor; the sensor is a temperature sensor or an acceleration sensor;
the normal scan cycle is: the microprocessor reads that the temperature of the temperature sensor is minus 10-35 ℃ or the acceleration of the acceleration sensor in the Z direction is less than or equal to 20 g;
the special scanning period is as follows: the microprocessor reads that the temperature of the temperature sensor is more than 35 ℃ or the acceleration of the acceleration sensor in the Z direction is more than 20 g.
The display blanking period does not drive the display panel with data, and specifically, the display blanking period can be to turn off a source driving circuit or a gate driving circuit or to float data lines and scanning lines; it may be one scan cycle or 1.5, 2, 3 times one scan cycle;
the liquid crystal display device is further applied to a forklift intelligent display system.
Drawings
The objects and advantages of the present invention will be understood by the following detailed description of the preferred embodiments of the invention, taken in conjunction with the accompanying drawings.
Fig. 1, wherein fig. 1 illustrates a display device of the present application.
Fig. 2, wherein fig. 2 illustrates a detailed circuit diagram of the power circuit of the present application.
FIG. 3 is a timing diagram of scanning of the display device of the present application, wherein FIG. 3 is a timing diagram of scanning.
Fig. 4 shows an example of the actual use of the device on a forklift truck.
Fig. 5, wherein the pixel of fig. 5 is charged with a reduced charge time after power is boosted by the power circuit.
Detailed Description
The present invention is explained based on the drawings.
The display device comprises a time schedule controller, a grid controller and a display panel, wherein a source electrode driving circuit comprises a plurality of source electrode drivers; the invention adds a memory connected with a plurality of source drivers, a multiplexing switch K connected with a plurality of source driver data lines and a power circuit connected with the multiplexing switch K on the basis of the prior display device, and finally, the memory is connected with a display panel through the power circuit.
The processor is further connected with a sensor, the multiplexing switch is controlled according to signals of the sensor, wherein the sensor can be a temperature sensor or an acceleration sensor, and the acceleration sensor is used for measuring the vibration degree of the display device in the use environment; the temperature sensor detects the temperature, whether the multiplexing switch is turned off or on is determined according to the temperature and the vibration degree, and the data signal transmission capability is enhanced through the power circuit, so that the rising time of the pixel voltage is further reduced, and the stability and the safety of data transmission are improved.
The transmission effectiveness of signals can be seriously influenced in a vibration process or severe environments with overhigh temperature and the like, and the stability of the signals can be maintained only by adopting a short time to transmit the signals; at the moment, a power circuit is added for proper enhancement or gray scale voltage is enhanced according to a certain proportion, so that the image scanning time is reduced, the effectiveness of image display is ensured, and the influence brought by severe environment is overcome.
As shown in fig. 2, the specific power circuit adjusts the enhanced amplitude of the output power by adjusting the magnitude of the power source VCC, the resistor R1 can improve the load carrying capability of the circuit, in addition, the diode D1 prevents the current from reversing, and finally, the voltage output is performed through the output capacitor C1, so as to achieve the effect of enhancing the gray scale voltage output of the pixel.
Through the source electrode driving circuit, the display device can enable the power circuit to enhance the power of the data signal when needed (for example, the data transmission time needs to be reduced), so as to achieve the purpose of shortening the charging time of the pixel gray scale voltage.
Claims (2)
1. A source electrode driving circuit comprises a plurality of source electrode drivers, a memorizer, a power circuit and a multiplexing switch; the source driver is connected with the memory and is connected with the display panel through the multiplexing switch and the power circuit;
the power circuit is used for enhancing the power of the data signal;
when the scanning circuit is in a normal scanning period, the data signal output end of the source electrode driver directly drives the liquid crystal panel through one channel of the multiplexing switch;
when the liquid crystal display panel is in a special scanning period, the data signal output end of the source electrode driver drives the liquid crystal display panel through the other channel of the multiplexing switch and the power circuit;
the special scanning period comprises a display blanking period and a display scanning period, wherein the display blanking period is between the display scanning periods; 1/2 in which the scan period of the display scan period is that of the normal scan period;
the power circuit comprises a first resistor, wherein a first end of the first resistor is connected with a signal input end, a second end of the first resistor is connected with the grid electrode of a first transistor Q1, a first end of a first transistor Q1 is connected with a power supply VCC, and a second end of the first resistor is connected with a second pole of a ninth transistor Q9; the input end of the diode D1 is connected with the second end of the first resistor R1, and the output end of the diode D1 is connected with the grid of the second transistor Q2; the grid electrode of the second transistor Q2 is connected with the second end of the diode D1, the first end is connected with a power supply VCC, and the second end is connected with the grid electrode of the fourteenth transistor;
a first end of a third transistor Q3 is connected with an output end of a diode D1, a second end of the third transistor Q3 is connected with a low level VSS, a grid electrode of the third transistor Q3 is connected with a fourth transistor Q4, and a first end of a fourth transistor Q4 is connected with a second end of a resistor R1;
the grid electrode of the fourth transistor Q4 is connected with the grid electrode of the third transistor Q3, the first end of the fourth transistor Q4 is connected with the second end of the resistor, and the second end of the fourth transistor Q4 is connected with the low level VSS;
a first end of the fifth transistor Q5 is connected with the power VCC, a grid electrode of the fifth transistor Q5 is connected with a grid electrode of the sixth transistor Q6, and a second end of the fifth transistor Q5 is connected with a first end of the seventh transistor;
a first end of the fifth transistor Q5 is connected with the power VCC, a grid electrode of the fifth transistor Q5 is connected with a grid electrode of the sixth transistor Q6, and a second end of the fifth transistor Q5 is connected with a first end of the seventh transistor Q7;
a first end of the sixth transistor Q6 is connected with the power VCC, a grid electrode of the sixth transistor Q6 is connected with a grid electrode of the fifth transistor Q5, and a second end of the sixth transistor Q6 is connected with a first end of the eighth transistor Q8;
the gate of the seventh transistor Q7 is connected to the gate of the eighth transistor Q8, the first terminal of the seventh transistor Q7 is connected to the second terminal of the fifth transistor Q5, the second terminal of the seventh transistor Q7 is connected to the gate of the Q5 of the fifth transistor, to the first terminal of the ninth transistor Q9,
a first terminal of the eighth transistor Q8 is connected to the second terminal of the sixth transistor Q6, and a second terminal of the eighth transistor Q13 is connected to the gate of the thirteenth transistor Q13;
a first end of the ninth transistor is connected with the second end of the Q7, a grid electrode of the ninth transistor is connected with a grid electrode of the tenth transistor, and a second end of the ninth transistor is connected with a first end of the eleventh transistor;
a first terminal of the tenth transistor Q10 is connected to the second terminal of the eighth transistor, a gate thereof is connected to the ninth transistor, and a second terminal thereof is connected to the twelfth transistor Q12;
a first terminal of the eleventh transistor Q11 is connected to the second terminal of the ninth transistor, a second terminal thereof is connected to the low level VSS, and a gate thereof is connected to the gate of the twelfth transistor Q12;
a gate of the twelfth transistor Q12 is connected to a gate of the eleventh transistor Q11, a first terminal thereof is connected to the second terminal of the tenth transistor Q10, and a second terminal thereof is connected to the low level VSS;
a gate of the thirteenth transistor Q13 is connected to the second terminal of the eighth transistor, a first terminal of the thirteenth transistor Q13 is connected to the power source VCC, and a second terminal of the thirteenth transistor Q14 is connected to the first terminal of the fourteenth transistor Q14;
a gate of the fourteenth transistor Q14 is connected to the second terminal of the second transistor Q2, a first terminal of the fourteenth transistor Q3578 is connected to the second terminal of the thirteenth transistor Q13, and a second terminal of the fourteenth transistor Q14 is connected to the low level VSS;
the capacitor C1 has a first terminal connected to the gate of the thirteenth transistor Q13, and a second terminal connected to the second terminal of the thirteenth transistor Q13 and the output terminal.
2. A liquid crystal display device having the source driver circuit as claimed in claim 1.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201810013480.3A CN108231025B (en) | 2018-01-07 | 2018-01-07 | Source electrode driving circuit and liquid crystal display device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201810013480.3A CN108231025B (en) | 2018-01-07 | 2018-01-07 | Source electrode driving circuit and liquid crystal display device |
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| Publication Number | Publication Date |
|---|---|
| CN108231025A CN108231025A (en) | 2018-06-29 |
| CN108231025B true CN108231025B (en) | 2020-09-08 |
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| CN201810013480.3A Expired - Fee Related CN108231025B (en) | 2018-01-07 | 2018-01-07 | Source electrode driving circuit and liquid crystal display device |
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Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1664659A (en) * | 2004-03-05 | 2005-09-07 | Nec液晶技术株式会社 | Liquid crystal display device and method for driving the same |
| CN101419789A (en) * | 2008-12-04 | 2009-04-29 | 上海广电光电子有限公司 | Restoration device for liquid crystal device and driving method thereof |
| CN101587697A (en) * | 2008-05-21 | 2009-11-25 | 株式会社瑞萨科技 | Liquid crystal driving device |
| CN202084186U (en) * | 2011-06-09 | 2011-12-21 | 王丹净 | Bus distance display system |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN202075969U (en) * | 2011-06-15 | 2011-12-14 | 青岛海信电器股份有限公司 | Source driver and LCD employing same |
| CN102280086A (en) * | 2011-08-22 | 2011-12-14 | 青岛四方车辆研究所有限公司 | Railway vehicle display |
| CN107146586A (en) * | 2017-06-20 | 2017-09-08 | 惠科股份有限公司 | The driving method of display panel, drive circuit, display device and display panel, drive circuit |
-
2018
- 2018-01-07 CN CN201810013480.3A patent/CN108231025B/en not_active Expired - Fee Related
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1664659A (en) * | 2004-03-05 | 2005-09-07 | Nec液晶技术株式会社 | Liquid crystal display device and method for driving the same |
| CN101587697A (en) * | 2008-05-21 | 2009-11-25 | 株式会社瑞萨科技 | Liquid crystal driving device |
| CN101419789A (en) * | 2008-12-04 | 2009-04-29 | 上海广电光电子有限公司 | Restoration device for liquid crystal device and driving method thereof |
| CN202084186U (en) * | 2011-06-09 | 2011-12-21 | 王丹净 | Bus distance display system |
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| CN108231025A (en) | 2018-06-29 |
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