CN108182886B - Array substrate, display panel and display device - Google Patents
Array substrate, display panel and display device Download PDFInfo
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- CN108182886B CN108182886B CN201810002170.1A CN201810002170A CN108182886B CN 108182886 B CN108182886 B CN 108182886B CN 201810002170 A CN201810002170 A CN 201810002170A CN 108182886 B CN108182886 B CN 108182886B
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09F—DISPLAYING; ADVERTISING; SIGNS; LABELS OR NAME-PLATES; SEALS
- G09F9/00—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements
- G09F9/30—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements
- G09F9/33—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements being semiconductor devices, e.g. diodes
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09F—DISPLAYING; ADVERTISING; SIGNS; LABELS OR NAME-PLATES; SEALS
- G09F9/00—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements
Abstract
The invention discloses an array substrate, a display panel and a display device, which belong to the technical field of display and comprise: a hollow area, a display area surrounding the hollow area, and a non-display area surrounding the display area; the display area comprises a plurality of first signal lines extending along a first direction; the plurality of first signal lines comprise at least one first sub-line, and the at least one first sub-line is positioned on the first side of the hollowed-out area; the non-display area comprises a first connecting line, one end of the first connecting line is electrically connected with the first sub-line, the other end of the first connecting line is electrically connected with the control circuit, the control circuit is located on the second side of the hollowed-out area, and the first side of the hollowed-out area and the second side of the hollowed-out area are arranged oppositely along the first direction. Compared with the prior art, the array substrate is beneficial to the narrow border and no border of the inner border of the array substrate.
Description
Technical Field
The invention relates to the technical field of display, in particular to an array substrate, a display panel and a display device.
Background
With the development of display technology, the conventional rectangular display panel has failed to meet the diversified demands of consumers.
Referring to fig. 1, fig. 1 is a schematic structural diagram of a special-shaped display panel provided in the prior art. The display panel 01 shown in fig. 1 is a special-shaped display panel, the display panel 01 includes a hollow area 011, and the hollow area 011 penetrates through the display panel 01 along a thickness direction of the display panel.
The display panel includes a display area 02, a first non-display area 03, and a second non-display area 04, and the display area 02, the first non-display area 03, and the second non-display area 04 are all annular. The first non-display area 03 is disposed around the hollow area 011, the display area 02 is disposed around the first non-display area 03, and the second non-display area 04 is disposed around the display area 02. In general, the first non-display area 03 is referred to as an inner frame area, and the second non-display area 04 is referred to as an outer frame area.
The display area 02 includes a plurality of signal lines 06, and the signal lines 06 are electrically connected to the chip 05. When a portion of the signal line 061 extends through the hollow area 011, it needs to extend from the first non-display area 03, which results in a wider inner frame and cannot satisfy the use requirement of the consumer.
Disclosure of Invention
In view of the foregoing, the invention provides an array substrate, a display panel and a display device.
The invention provides an array substrate, comprising: a hollow area, a display area surrounding the hollow area, and a non-display area surrounding the display area; the display area comprises a plurality of first signal lines extending along a first direction; the plurality of first signal lines comprise at least one first sub-line, and the at least one first sub-line is positioned on the first side of the hollowed-out area; the non-display area comprises a first connecting line, one end of the first connecting line is electrically connected with the first sub-line, the other end of the first connecting line is electrically connected with the control circuit, the control circuit is located on the second side of the hollowed-out area, and the first side of the hollowed-out area and the second side of the hollowed-out area are arranged oppositely along the first direction.
The invention provides a display panel, which comprises an array substrate provided by the invention.
The invention provides a display device which comprises a display panel provided by the invention.
Compared with the prior art, the array substrate, the display panel and the display device provided by the invention at least realize the following beneficial effects:
the array substrate, the display panel and the display device provided by the invention comprise: a hollow area, a display area surrounding the hollow area, and a non-display area surrounding the display area; the display area comprises at least one first sub-line positioned on the first side of the hollowed-out area; and a first connecting line is arranged in the non-display area, one end of the first connecting line is electrically connected with the first sub-line, and the other end of the first connecting line is electrically connected with the control circuit. Compared with the prior art, the first connecting line of the first sub-line is arranged on the outer frame, so that the narrow frame of the inner frame is facilitated, and the inner frame is even not required to be arranged, and the use requirements of consumers are met.
Other features of the present invention and advantages thereof will become apparent from the following detailed description of exemplary embodiments thereof, which proceeds with reference to the accompanying drawings.
Drawings
The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments of the invention and together with the description, serve to explain the principles of the invention.
Fig. 1 is a schematic structural diagram of a special-shaped display panel provided in the prior art;
fig. 2 is a schematic structural diagram of an array substrate according to an embodiment of the present invention;
fig. 3 is a schematic structural diagram of another array substrate according to an embodiment of the present invention;
fig. 4 is a schematic structural diagram of another array substrate according to an embodiment of the present invention;
fig. 5 is a schematic structural diagram of another array substrate according to an embodiment of the present invention;
fig. 6 is a schematic structural diagram of another array substrate according to an embodiment of the present invention;
fig. 7 is a schematic structural diagram of another array substrate according to an embodiment of the present invention;
FIG. 8 is a schematic view of a partial cross-sectional structure of the array substrate provided in FIG. 7;
fig. 9 is a schematic structural diagram of another array substrate according to an embodiment of the present invention;
FIG. 10 is a schematic view of a partial cross-sectional structure of the array substrate provided in FIG. 9;
fig. 11 is a schematic structural diagram of a display panel according to an embodiment of the present invention;
fig. 12 is a schematic structural diagram of a display device according to an embodiment of the present invention.
Detailed Description
Various exemplary embodiments of the present invention will now be described in detail with reference to the accompanying drawings. It should be noted that: the relative arrangement of the components and steps, the numerical expressions and numerical values set forth in these embodiments do not limit the scope of the present invention unless specifically stated otherwise.
The following description of at least one exemplary embodiment is merely illustrative in nature and is in no way intended to limit the invention, its application, or uses.
Techniques, methods, and apparatus known to those of ordinary skill in the relevant art may not be discussed in detail but are intended to be part of the specification where appropriate.
In all examples shown and discussed herein, any particular value should be construed as merely illustrative, and not limiting. Thus, other examples of the exemplary embodiments may have different values.
It should be noted that: like reference numbers and letters refer to like items in the following figures, and thus, once an item is defined in one figure, further discussion thereof is not required in subsequent figures.
Referring to fig. 2, the present embodiment provides an array substrate, including: a hollow-out area LL, a display area AA surrounding the hollow-out area LL, and a non-display area BB surrounding the display area AA; the display area AA includes a plurality of first signal lines 10 extending in a first direction x; the plurality of first signal lines 10 include at least one first sub-line 101, and the at least one first sub-line 101 is located on the first side S1 of the hollow area LL; the non-display area BB includes a first connection line 1011, one end of the first connection line 1011 is electrically connected to the first sub-line 101, the other end is electrically connected to the control circuit 20, the control circuit 20 is located on the second side S2 of the hollow area LL, and the first side S1 of the hollow area LL and the second side S2 of the hollow area LL are disposed opposite to each other along the first direction x.
In the array substrate provided in this embodiment, the hollow-out area LL penetrates through the array substrate along a thickness direction of the array substrate. The display area AA may be annular, disposed around the hollow area LL. The non-display area BB may be annular, disposed around the display area AA. The non-display area BB may be referred to as an outer frame of the array substrate.
The display area AA includes a plurality of first signal lines 10 extending in the first direction x, and the first signal lines 10 are used to transmit electrical signals. The present embodiment does not specifically limit the function of the electrical signal transmitted by the first signal line 10.
The plurality of first signal lines 10 includes at least one first sub-line 101, and the at least one first sub-line 101 is located at the first side S1 of the hollow area LL.
The first sub-wire 101 is electrically connected to the control circuit 20, and the control circuit 20 supplies an electric signal to the first sub-wire 101. The control circuit 20 is disposed at the second side S2 of the hollow area LL, and the first side S1 of the hollow area LL is disposed opposite to the second side S2 of the hollow area LL along the first direction x.
In the array substrate provided in this embodiment, the first connection line 1011 is disposed in the non-display area BB, the first sub-line 101 is electrically connected to the control circuit 20 through the first connection line 1011, and specifically, one end of the first connection line 1011 is electrically connected to the first sub-line 101, and the other end is electrically connected to the control circuit 20. Compared with the prior art, the first sub-line 101 can be electrically connected with the control circuit 20 without routing from the inner frame, so that the narrowing of the inner frame can be facilitated, and the inner frame can even be omitted.
The array substrate provided by the embodiment includes: a hollow area, a display area surrounding the hollow area, and a non-display area surrounding the display area; the display area comprises at least one first sub-line positioned on the first side of the hollowed-out area; and a first connecting line is arranged in the non-display area, one end of the first connecting line is electrically connected with the first sub-line, and the other end of the first connecting line is electrically connected with the control circuit. Compared with the prior art, the first connecting line of the first sub-line is arranged on the outer frame, so that the narrow frame of the inner frame is facilitated, and the inner frame is even not required to be arranged, and the use requirements of consumers are met.
In the array substrate shown in fig. 2, only the hollow area LL is circular and the display area AA is circular. It is understood that the hollow LL and the display area AA may have any shape.
Optionally, the shape of the hollow-out area LL may further include any one of an ellipse, a rectangle, and a diamond.
Optionally, the outer edge of the non-display area BB includes at least one arc-shaped area. With continued reference to fig. 2, the outer edge of the non-display area BB includes an arc-shaped area H1, and the shape of the non-display area BB can be set according to the shape of the display area AA. For example, when the display area AA is circular, the outer edge of the non-display area BB may be adaptively provided with an arc-shaped area H1, which may meet different requirements for use.
It can be understood that the shapes of the hollow-out area LL and the display area AA may be specifically set according to the actual use requirement of the display panel, and this embodiment does not specifically limit this.
In some optional embodiments, the array substrate provided in any embodiment of the present invention may include a gate line, a data line, or a touch signal line; the first signal line includes one or more of a gate line, a data line and a touch signal line. With continued reference to fig. 2, the first signal line 10 may be a gate line for transmitting a gate signal. Alternatively, the first signal line 10 is a data line for transmitting a data signal. Alternatively, the first signal line 10 is a touch signal line, and the touch signal line is used for transmitting a touch signal. Alternatively, the first signal line 10 may be any two of a gate line, a data line, and a touch signal line. Alternatively, the first signal line 10 may include a gate line, a data line, and a touch signal line.
It can be understood that, if the signal line of each function in the array substrate includes at least one first sub-line, the at least one first sub-line is located on the first side S1 of the hollow area LL, and the at least one first sub-line needs to be electrically connected to the control circuit on the second side S2 of the hollow area LL, the technical solution of the embodiment of the present invention may be used, where the first connection line 1011 is disposed in the non-display area BB, and one end of the first connection line 1011 is electrically connected to the first sub-line 101, and the other end is electrically connected to the control circuit 20. The first signal line may further include signal lines with other functions, which are not described in detail herein.
In some alternative embodiments, please refer to fig. 3, and fig. 3 follows the reference numerals of fig. 2, and the description of the same parts is omitted. On the basis of the array substrate provided by any embodiment of the present invention, the plurality of first signal lines 10 further includes at least one second sub-line 102; the second sub-line 102 is located at the second side S2 of the hollow LL; the non-display area BB further includes a second connection line 1021, one end of the second connection line 1021 is electrically connected to the second sub-line 102, and the other end of the second connection line 1021 is electrically connected to the control circuit 20, and the control circuit is located on a side of the second sub-line 102 away from the hollow area LL. In the array substrate provided by this embodiment, the second side S2 of the hollow area LL further includes a second sub-line 102, and the first sub-line 101 and the second sub-line 102 are respectively disposed on two opposite sides of the hollow area LL. It can be understood that, as the hollow-out area LL is arranged in the array substrate, there is at least one first signal line 10, which is partitioned into two routing parts by the hollow-out area LL, and optionally, the two routing parts may be a first sub-line 101 and a second sub-line 102, respectively. In this embodiment, a second connection line 1021 is provided, and the second sub-wire 102 is electrically connected to the control circuit 20 through the second connection line 1021.
Optionally, an extension line of the first sub-line 101 intersects with the hollow-out area LL; optionally, an extension line of the second sub-line 102 intersects with the hollow LL. It can be understood that, as the hollow-out area LL is arranged in the array substrate, it can be seen from the form that at least one first signal line 10 exists and is separated by the hollow-out area LL into two routing parts, optionally, the two routing parts can be a first sub-line 101 and a second sub-line 102 respectively, and an extension line of the first sub-line 101 and an extension line of the second sub-line 102 intersect with the hollow-out area LL.
Optionally, the number of the first sub-lines 101 is equal to the number of the second sub-lines 102. It can be understood that, since the hollow-out area LL is arranged in the array substrate, it can be seen from the form that at least one first signal line 10 exists and is partitioned into the first sub-line 101 and the second sub-line 102 by the hollow-out area LL, the number of the first sub-lines 101 is equal to that of the second sub-lines 102, and compared with an array substrate without the hollow-out area LL, the adjustment of the arrangement structure of the array substrate is reduced as much as possible, so that the influence on the arrangement structure of a part of the first signal lines 10 due to the arrangement of the hollow-out area LL is reduced.
The first sub-wire is electrically connected to the control circuit 20 through a first connection wire 1011, and the second sub-wire 102 is electrically connected to the control circuit through a second connection wire 1021. The first connecting line 1011 and the second connecting line 1021 are both arranged in the non-display area BB, so that an inner frame is not required to be arranged, the narrow frame of the inner frame is facilitated, and the inner frame is not required to be arranged, so that the use requirement of a consumer is met.
In some alternative embodiments, please refer to fig. 4, and fig. 4 follows the reference numerals of fig. 2, and the description of the same parts is omitted. On the basis of the array substrate provided by any embodiment of the invention, the non-display area BB comprises a first non-display area BB1 and a second non-display area BB 2; the first non-display area BB1 is located on the third side S3 of the hollow area LL, and the second non-display area BB2 is located on the fourth side S4 of the hollow area LL, wherein the third side S3 of the hollow area LL and the fourth side S4 of the hollow area LL are disposed opposite to each other along the second direction y, and the second direction y intersects with the first direction x. Optionally, the second direction y and the first direction x are perpendicular to each other.
Along the second direction y, the same point on the first sub-line 101 is at a distance d1 from the first non-display area BB1 and at a distance d2 from the second non-display area BB 2.
Wherein the first connecting line 1011 electrically connected to the first sub-line 101 of d1 < d2 is located in the first non-display area BB 1. For example, for the first sub-line 101a, d1 < d2, the first connecting line 1011 electrically connected to the first sub-line 101a is located in the first non-display area BB1, which is beneficial to reduce the length of the first connecting line 1011 and reduce the wiring space of the first connecting line 1011 on the array substrate.
The first connecting line 1011 electrically connected to the first sub-line 101 of d1 > d2 is located in the second non-display area BB 2. For example, for the first sub-line 101b, d1 > d2, the first connecting line 1011 electrically connected to the first sub-line 101b is located in the second non-display area BB2, which is beneficial to reduce the length of the first connecting line 1011 and reduce the wiring space of the first connecting line 1011 on the array substrate.
The first connection line 1011 electrically connected to the first sub-line 101 of d1 ═ d2 is located in the first non-display region BB1 or the second non-display region BB 2. In other words, when the first sub-line 101 is equidistant from the first non-display area BB1 and the second non-display area BB2 in the second direction y, the first connecting line 1011 electrically connected to the first sub-line 101 may be disposed in either the first non-display area BB1 or the second non-display area BB 2.
In some alternative embodiments, please refer to fig. 5, and fig. 5 follows the reference numerals of fig. 3, and the description of the same parts is omitted. In this embodiment, at least one first connection line 1011 and one second connection line 1021 are electrically connected in the non-display area BB. In this embodiment, the first connection line 1011a and the second connection line 1021a are electrically connected in the non-display area BB.
In fig. 5, the trace lines are at the intersections, and if there is no dot, insulation is indicated, and if there is a dot, electrical connection is indicated.
In the array substrate provided by this embodiment, at least one first connection line 1011 and one second connection line 1021 are electrically connected in the non-display area BB, and one signal output terminal of the control circuit 20 can provide an electrical signal for one first connection line 1011 and one second connection line 1021. It is not necessary to provide signal output terminals for the first connection line 1011 and the second connection line 1021, so that the number of signal output terminals of the control circuit 20 can be reduced, and the structure of the control circuit 20 can be simplified.
In some alternative embodiments, please refer to fig. 6, and fig. 6 follows the reference numerals of fig. 3, and the description of the same parts is omitted. In this embodiment, the first sub-line 101 and the second sub-line 102 located on the same straight line L1 along the first direction x are the first signal line group 200; in the same first signal line group 200, the first connection line 1011 electrically connected to the first sub-line 101 and the second connection line 1021 electrically connected to the second sub-line 102 are electrically connected to each other. It should be noted that the straight line L1 is not actually present in the array substrate, but is a straight line illustrated in the schematic diagram of fig. 6 for clearly explaining the technical solution of the present embodiment. The array substrate provided by this embodiment can reduce the number of signal output terminals of the control circuit 20, and simplify the structure of the control circuit 20. In addition, it can be understood that, since the hollow-out area LL is arranged in the array substrate, there is at least one first signal line 10, which is partitioned into a first sub-line 101 and a second sub-line 102 by the hollow-out area LL; it is considered that the first sub-line 101 and the second sub-line 102 in the same first signal line group 200 are electrically connected to each other and substantially function as one first signal line. For example, when the first signal line 10 is a data line, the first connection line 1011 electrically connected to the first sub-line 101 and the second connection line 1021 electrically connected to the second sub-line 102 in the same first signal line group 200 are electrically connected to each other, so that pixels (not shown) in the same column along the first direction x can be functionally equivalent to electrically connected to the same first signal line; alternatively, for example, when the first signal line 10 is a gate line, the first connection line 1011 electrically connected to the first sub-line 101 and the second connection line 1021 electrically connected to the second sub-line 102 in the same first signal line group 200 are electrically connected to each other, so that pixels (not shown) in the same row along the first direction x can be functionally equivalent to those electrically connected to the same first signal line and receiving the same gate signal. Compared with the array substrate without the hollow area LL, the arrangement structure of the array substrate is adjusted to the greatest extent, and therefore the influence on the signals of part of the first signal lines 10 caused by the hollow area LL is reduced.
Optionally, in the array substrate provided in this embodiment, the first sub-lines 101 and the second sub-lines 102 may be arranged in a one-to-one correspondence manner, that is, each first sub-line 101 and each second sub-line 102 arranged along the first direction x may correspond to one first signal line group 200. It can be understood that, as the hollow-out area LL is arranged in the array substrate, there is at least one first signal line 10, which is partitioned by the hollow-out area LL into the first sub-line 101 and the second sub-line 102 that are correspondingly arranged, and the first sub-line 101 and the second sub-line 102 that are correspondingly arranged are a first signal line group 200. In order to enable the first sub-wire 101 and the second sub-wire 102 in the first signal wire group 200 to maintain the same electrical signal, in the present embodiment, in the same first signal wire group 200, the first connection wire 1011 electrically connected to the first sub-wire 101 is electrically connected to the second connection wire 1021 electrically connected to the second sub-wire 102, so as to reduce the influence on the signal of a part of the first signal wires 10 caused by the hollow LL, and simultaneously, to maintain or reduce the number of signal output terminals of the control circuit 20.
In some alternative embodiments, please refer to fig. 7 and 8, and fig. 7 follows the reference numerals of fig. 6, and the description of the same parts is omitted. In this embodiment, at least one first connection line 1011 and one second connection line 1021 are electrically connected in the non-display area BB through the bridge 30; the bridge portion 30 is disposed in different layers from the first connection line 1011 and the second connection line 1021. In this embodiment, the bridge portion 30 is provided, and the first connection line 1011 and the second connection line 1021 are electrically connected to the bridge portion 30, so that one first connection line 1011 and one second connection line 1021 can be electrically connected in the non-display area BB, and the number of signal output terminals of the control circuit 20 is reduced; compared with the case that the first connecting wire 1011 and the second connecting wire 1021 are in direct contact to realize electrical connection, the reliability of the electrical connection structure of the first connecting wire 1011 and the second connecting wire 1021 can be improved.
In addition, due to the complex routing structure of the array substrate and the arrangement of the bridge portion, the first connecting line 1011 and the second connecting line 1021 can be prevented from being intersected with the rest of the routing lines to cause short circuit.
In some alternative embodiments, please refer to fig. 9 and fig. 10, and fig. 9 follows the reference numerals of fig. 7, and the description of the same parts is omitted. In this embodiment, the first signal lines 10 are data lines, the display area AA further includes a plurality of gate lines 40 extending along the second direction y, and the gate lines 40 cross the first signal lines 10 in an insulated manner to define a plurality of pixels P; the bridge portion 30 is disposed at the same level as the gate line 40. In the array substrate provided in this embodiment, the first signal lines 10 are data lines for transmitting data signals to the pixels P, and the gate lines 40 are gate signals to the pixels P. The bridge portion 30 and the gate line 40 are disposed in the same layer. In the process of manufacturing the array substrate, the gate line 40 and the bridge portion 30 may be formed simultaneously by an etching process using a mask in the process of manufacturing the gate line 40, so that the bridge portion 30 may be manufactured without an additional manufacturing process, thereby improving the manufacturing efficiency of the array substrate.
Optionally, with continued reference to fig. 9, on the basis of the array substrate provided in any embodiment of the present invention, the non-display area BB further includes a gate driving circuit 50, and the gate driving circuit 50 provides a gate driving signal for the array substrate; the first connecting line 1011 is located on a side of the gate driving circuit 50 away from the display area AA. Optionally, the gate driving circuit 50 is electrically connected to the gate line 40. The present embodiment is not particularly limited to the specific structure of the gate driving circuit 50. In this embodiment, the first connecting line 1011 can avoid the gate driving circuit 50 in the non-display area BB, so as to avoid a short circuit or an increase in load caused by the intersection with the gate driving circuit 50. Specifically, the first connection line 1011 is located on a side of the gate driving circuit 50 away from the display area AA. Optionally, the gate driving circuit 50 is disposed at the same side of the hollow LL, and a portion of the gate line 40 and the gate driving circuit 50 are located at the same side of the hollow LL; meanwhile, at least one gate line 40 and at least one gate driving circuit 50 are located at two opposite sides of the hollow LL, and at this time, the gate line 40 and the gate driving circuit 50 may be electrically connected through the gate connection line 401 in the non-display region. It is understood that, in the array substrate provided by the embodiment of the present invention, when the first signal line is a gate line, the control circuit may be the gate driving circuit 50, and the first connection line may be the gate connection line 401. In fig. 9, a gate connection line 401 is illustrated by a dotted line for clarity of illustrating the technical solution of the present embodiment.
It should be noted that, in the present embodiment, only the gate driving circuit 50 is disposed on the same side of the hollow LL as an example for description, it is understood that there are various specific disposing positions of the gate driving circuit 50, and the present embodiment does not specifically limit this.
The invention provides a display panel, which comprises the array substrate provided by any one of the above embodiments of the invention. Referring to fig. 11, fig. 11 is a schematic structural diagram of a display panel according to an embodiment of the present invention. In fig. 11, only the type of the display panel is illustrated as an organic light emitting display panel, and the display panel includes a substrate 00, a thin film transistor ST and an organic light emitting diode OLED disposed on the substrate 00. An Organic Light-emitting diode (OLED) is also called an Organic electroluminescent display or an Organic Light-emitting semiconductor. The OLED display technology has the advantages of self-luminescence, wide viewing angle, almost infinite contrast, low power consumption, extremely high reaction speed and the like. It can be understood that the hollow LL may penetrate through the display panel along the thickness direction of the display panel, and since the hollow LL is only partially hollow, fig. 11 is a cross-sectional view of the display panel, the surrounding of the hollow LL still has a structure, which is only indicated by a solid line.
The display panel provided in the embodiment of the present invention may also be other types of display panels such as a liquid crystal display panel, an electronic paper display panel, a quantum dot display panel, and the like, which is not particularly limited in this embodiment. The display panel provided in the embodiment of the present invention has the beneficial effects of the array substrate provided in the embodiment of the present invention, and specific descriptions of the array substrate in the above embodiments may be specifically referred to, and no further description is given in this embodiment.
The invention provides a display device comprising the display panel provided by any one of the above embodiments of the invention. Referring to fig. 12, fig. 12 is a schematic structural diagram of a display device according to an embodiment of the present invention. Fig. 12 provides a display device 1000 including the display panel 1001 according to any of the above embodiments of the present invention. The embodiment of fig. 12 is only an example of a mobile phone, and the display device 1000 is described, it is to be understood that the display device provided in the embodiment of the present invention may be other display devices having a display function, such as a computer, a television, and a vehicle-mounted display device, and the present invention is not limited thereto. The display device provided in the embodiment of the present invention has the beneficial effects of the display panel provided in the embodiment of the present invention, and specific reference may be made to the specific description of the display panel in each of the above embodiments, which is not repeated herein.
According to the embodiment, the array substrate, the display panel and the display device provided by the invention at least realize the following beneficial effects:
the array substrate, the display panel and the display device provided by the invention comprise: a hollow area, a display area surrounding the hollow area, and a non-display area surrounding the display area; the display area comprises at least one first sub-line positioned on the first side of the hollowed-out area; and a first connecting line is arranged in the non-display area, one end of the first connecting line is electrically connected with the first sub-line, and the other end of the first connecting line is electrically connected with the control circuit. Compared with the prior art, the first connecting line of the first sub-line is arranged on the outer frame, so that the narrow frame of the inner frame is facilitated, and the inner frame is even not required to be arranged, and the use requirements of consumers are met.
Although some specific embodiments of the present invention have been described in detail by way of examples, it should be understood by those skilled in the art that the above examples are for illustrative purposes only and are not intended to limit the scope of the present invention. It will be appreciated by those skilled in the art that modifications may be made to the above embodiments without departing from the scope and spirit of the invention. The scope of the invention is defined by the appended claims.
Claims (14)
1. An array substrate, comprising:
a hollow area, a display area surrounding the hollow area, and a non-display area surrounding the display area;
the display area comprises a plurality of first signal lines extending along a first direction; the plurality of first signal lines comprise at least one first sub-line, the at least one first sub-line is positioned on the first side of the hollowed-out area, and the extension line of the first sub-line is intersected with the hollowed-out area;
the non-display area comprises a first connecting line, one end of the first connecting line is electrically connected with the first sub-line, the other end of the first connecting line is electrically connected with a control circuit, the control circuit is located on the second side of the hollowed-out area, and the first side of the hollowed-out area and the second side of the hollowed-out area are arranged oppositely along the first direction.
2. The array substrate of claim 1,
the first signal line includes one or more of a gate line, a data line, and a touch signal line.
3. The array substrate of claim 1,
the plurality of first signal lines further comprise at least one second sub-line; the second sub-line is positioned on the second side of the hollowed-out area;
the non-display area further comprises a second connecting line, one end of the second connecting line is electrically connected with the second sub-line, the other end of the second connecting line is electrically connected with the control circuit, and the control circuit is located on one side, far away from the hollowed-out area, of the second sub-line.
4. The array substrate of claim 1,
the non-display area comprises a first non-display area and a second non-display area; the first non-display area is positioned at a third side of the hollowed-out area, and the second non-display area is positioned at a fourth side of the hollowed-out area, wherein the third side of the hollowed-out area and the fourth side of the hollowed-out area are oppositely arranged along a second direction, and the second direction is intersected with the first direction;
in the second direction, the same point on the first sub-line is at a distance d1 from the first non-display area and at a distance d2 from the second non-display area; wherein the content of the first and second substances,
the first connection line electrically connected to the first sub-line of d1 < d2 is located at the first non-display area; the first connection line electrically connected to the first sub-line of d1 > d2 is located at the second non-display area; the first connection line electrically connected to the first sub-line of d 1-d 2 is located in the first non-display area or the second non-display area.
5. The array substrate of claim 3,
at least one of the first connection lines is electrically connected to one of the second connection lines in the non-display region.
6. The array substrate of claim 5,
the first sub-line and the second sub-line which are positioned on the same straight line along the first direction are a first signal line group;
in the same first signal line group, the first connection line electrically connected to the first sub-line and the second connection line electrically connected to the second sub-line are electrically connected to each other.
7. The array substrate of claim 3, wherein the number of the first sub-lines is equal to the number of the second sub-lines.
8. The array substrate of claim 5,
at least one first connecting line and one second connecting line are electrically connected in the non-display area through a bridge part;
the bridge part is arranged in different layers with the first connecting line and the second connecting line respectively.
9. The array substrate of claim 8,
the first signal lines are data lines, the display area further comprises a plurality of gate lines extending along a second direction, and the gate lines and the first signal lines are insulated and crossed to define a plurality of pixels;
the bridge part and the gate line are arranged on the same layer.
10. The array substrate of claim 1,
the non-display area further comprises a grid driving circuit, and the grid driving circuit provides a grid driving signal for the array substrate;
the first connecting line is positioned on one side of the grid driving circuit far away from the display area.
11. The array substrate of claim 1,
the shape of the hollow-out area comprises any one of a circle, an ellipse, a rectangle and a rhombus.
12. The array substrate of claim 1,
the outer edge of the non-display area at least comprises an arc-shaped area.
13. A display panel comprising the array substrate according to any one of claims 1 to 12.
14. A display device characterized by comprising the display panel according to claim 13.
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| Application Number | Priority Date | Filing Date | Title |
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| CN201810002170.1A CN108182886B (en) | 2018-01-02 | 2018-01-02 | Array substrate, display panel and display device |
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| Application Number | Priority Date | Filing Date | Title |
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| CN201810002170.1A CN108182886B (en) | 2018-01-02 | 2018-01-02 | Array substrate, display panel and display device |
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| CN108182886A CN108182886A (en) | 2018-06-19 |
| CN108182886B true CN108182886B (en) | 2020-10-16 |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN108831365B (en) * | 2018-06-21 | 2021-07-09 | 厦门天马微电子有限公司 | Display panel and display device |
| CN108806503B (en) * | 2018-06-29 | 2020-07-03 | 厦门天马微电子有限公司 | Display panel and display device |
| CN108878455B (en) * | 2018-06-29 | 2021-01-01 | 厦门天马微电子有限公司 | Array substrate, display panel and display device |
| CN109064904B (en) * | 2018-09-21 | 2021-01-05 | 武汉天马微电子有限公司 | Display panel and display device |
| CN109031832B (en) * | 2018-09-29 | 2021-04-30 | 厦门天马微电子有限公司 | Array substrate, display panel and display device |
| CN109087590B (en) * | 2018-10-24 | 2020-10-02 | 武汉天马微电子有限公司 | Display panel and display device |
| CN109326225B (en) * | 2018-12-06 | 2021-03-26 | 武汉天马微电子有限公司 | Display panel, manufacturing method of display panel and display device |
| CN112419901A (en) * | 2019-01-14 | 2021-02-26 | 京东方科技集团股份有限公司 | Display substrate and display panel |
| CN109901748B (en) * | 2019-02-28 | 2022-05-03 | 厦门天马微电子有限公司 | Display panel and display device |
| TWI690914B (en) * | 2019-05-17 | 2020-04-11 | 友達光電股份有限公司 | Pixel array substrate |
| CN110634920A (en) * | 2019-08-28 | 2019-12-31 | 合肥维信诺科技有限公司 | Display panel and display device |
| CN113380830B (en) * | 2020-02-25 | 2022-07-12 | 昆山国显光电有限公司 | Array substrate, display panel and display device |
| CN111710240A (en) * | 2020-06-24 | 2020-09-25 | 昆山国显光电有限公司 | Pixel circuit structure and display panel |
| CN114342368A (en) | 2020-08-07 | 2022-04-12 | 京东方科技集团股份有限公司 | Display substrate and display device |
| CN112201195A (en) * | 2020-10-23 | 2021-01-08 | 厦门天马微电子有限公司 | Special-shaped display panel and display device |
| CN113015321A (en) * | 2021-03-22 | 2021-06-22 | 合肥维信诺科技有限公司 | Display panel and display device |
| US20230132617A1 (en) * | 2021-07-26 | 2023-05-04 | Chengdu Boe Optoelectronics Technology Co., Ltd. | Display substrate and display apparatus |
| CN114200727A (en) * | 2021-12-20 | 2022-03-18 | 昆山龙腾光电股份有限公司 | Substrate convenient for hole opening design and display device |
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| TW200743854A (en) * | 2006-05-22 | 2007-12-01 | Au Optronics Corp | Backlight module and liquid crystal display including thereof |
| US7830591B2 (en) * | 2006-11-20 | 2010-11-09 | Seiko Epson Corporation | Active-matrix circuit board and display |
| KR101056323B1 (en) * | 2009-09-15 | 2011-08-11 | 삼성모바일디스플레이주식회사 | Flat Panel Display |
| WO2015075972A1 (en) * | 2013-11-21 | 2015-05-28 | シャープ株式会社 | Display device |
| TWI555000B (en) * | 2015-02-05 | 2016-10-21 | 友達光電股份有限公司 | Display panel |
| CN105137684B (en) * | 2015-09-06 | 2019-02-26 | 京东方科技集团股份有限公司 | A kind of array substrate, display device and wearable device |
| CN205264316U (en) * | 2015-12-30 | 2016-05-25 | 京东方科技集团股份有限公司 | Array substrate and display device |
| CN105739154B (en) * | 2016-04-29 | 2019-09-27 | 上海天马有机发光显示技术有限公司 | A kind of display panel and electronic equipment |
| CN206460234U (en) * | 2016-12-06 | 2017-09-01 | 上海天马有机发光显示技术有限公司 | Display panel and the display device comprising it |
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