CN108155970A - A kind of jamproof HSSI High-Speed Serial Interface and its implementation - Google Patents

A kind of jamproof HSSI High-Speed Serial Interface and its implementation Download PDF

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Publication number
CN108155970A
CN108155970A CN201711390319.XA CN201711390319A CN108155970A CN 108155970 A CN108155970 A CN 108155970A CN 201711390319 A CN201711390319 A CN 201711390319A CN 108155970 A CN108155970 A CN 108155970A
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China
Prior art keywords
data
byte
parallel
unit
output
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Pending
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CN201711390319.XA
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Chinese (zh)
Inventor
邹家轩
谢雨蒙
于宗光
王栋
徐睿
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CETC 58 Research Institute
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CETC 58 Research Institute
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Priority to CN201711390319.XA priority Critical patent/CN108155970A/en
Publication of CN108155970A publication Critical patent/CN108155970A/en
Pending legal-status Critical Current

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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00Arrangements for detecting or preventing errors in the information received
    • H04L1/004Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056Systems characterized by the type of code used
    • H04L1/0057Block codes
    • H04L1/0058Block-coded modulation
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00Arrangements for detecting or preventing errors in the information received
    • H04L1/004Arrangements for detecting or preventing errors in the information received by using forward error control
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00Arrangements for detecting or preventing errors in the information received
    • H04L1/004Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056Systems characterized by the type of code used
    • H04L1/0071Use of interleaving

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  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Error Detection And Correction (AREA)

Abstract

The invention discloses a kind of jamproof HSSI High-Speed Serial Interface and its implementation, which first passes through RS codings including input data, using intertexture, after encoded by 8B/10B, sent by parallel-serial conversion;Output data first passes through serioparallel exchange, is decoded using 8B/10B, after by deinterleaving, by RS decoded backs into initial data.RS codings have good error correcting capability to burst error in the present invention, the bursty errors that rectangular interleaver will cause digital data transmission, can be discrete using interweaving encoding technology and this bursty errors be corrected, improve transmission characteristic, effectively improve the antijamming capability of HSSI High-Speed Serial Interface.

Description

A kind of jamproof HSSI High-Speed Serial Interface and its implementation
Technical field
The invention belongs to IC design fields, and in particular to a kind of jamproof HSSI High-Speed Serial Interface and its realization side Method.
Background technology
The demand growth of HSSI High-Speed Serial Interface, the speed of HSSI High-Speed Serial Interface are gradually increased in integrated circuit.More High message transmission rate, higher signal frequency cause the transmission of HSSI High-Speed Serial Interface to be more vulnerable to interfere.
Tradition improves HSSI High-Speed Serial Interface anti-disturbance method and mainly starts with from solution signal attenuation angle, has increase to send The anti-fading channel ability of end signal also has the attenuation that signal is received in reception end compensating.
However above-mentioned measure can only compensate timeinvariance loss, can not compensate and occur in transmission because of extraneous bursty interference Caused by short-term error of transmission.
Invention content
In order to solve the above technical problem, the present invention provides a kind of jamproof HSSI High-Speed Serial Interface and its realization sides Method.
In order to achieve the above object, technical scheme is as follows:
The present invention provides a kind of jamproof HSSI High-Speed Serial Interface, and including transmitting terminal and receiving terminal, transmitting terminal includes:
RS encoders, for the data inputted to be carried out RS codings, input data is to enter RS encoders as unit of byte, into After the data accumulation to RS code widths for entering encoder, encoded according to RS coding rules, it is defeated as unit of byte after coding Go out;
Rectangular interleaver disperses for the data after RS is encoded, and interleaver is arranged the data of input by row as unit of byte Row, after interleaver arrangement is full, by row output as unit of byte;
8B/10B encoders, for by 1 byte data inputted, by 8B/10B rule encodings into 10bits data, parallel output;
Parallel-serial conversion driver for the parallel data that will be received, exports in a serial fashion;
Receiving terminal includes:
Serioparallel exchange receiver exports the serial data received under clock effect in a parallel fashion;
10 bit parallel datas received are converted to 8 bit original numbers by 8B/10B decoders by 8B/10B encoding and decoding rules According to;
Deinterleaver by the input data as unit of byte, is arranged in the form of row, after interleaver arrangement is full, using byte as Unit is exported by row;
RS decoders, for the data inputted to be carried out RS decodings, input data is to enter RS decoders as unit of byte, into After the data accumulation to RS decoding width for entering decoder, it is decoded according to the RS rules of transmitter, using byte as list after decoding Position output, reverts to initial data.
The present invention also provides a kind of implementation methods of jamproof HSSI High-Speed Serial Interface, include the following steps:
Forwarding step, input parallel data are carried out RS codings as unit of byte, enter byte unit matrix interleaver battle array, handed over It knits device battle array and is output to 8B/10B encoders, encoder output parallel data to parallel-to-serial converter, the serial letter of parallel-to-serial converter output Number send;
Receiving step, reception serial signal enter deserializer by receiver and are converted to parallel data, and parallel data enters 8B/10B decoders revert to byte unit data, and 8B/10B decoders output data to deinterleaver battle array, and deinterleaver battle array is defeated Go out data and carry out RS decoder decodings.
RS codings have good error correcting capability to burst error in the present invention, and rectangular interleaver will cause digital data transmission Bursty errors, can be discrete using interweaving encoding technology and correct this bursty errors, improve transmission characteristic, effectively improve The antijamming capability of HSSI High-Speed Serial Interface.
Description of the drawings
Fig. 1 is the structure diagram of one embodiment of the present invention.
Specific embodiment
The preferred embodiment that the invention will now be described in detail with reference to the accompanying drawings.
In order to reach the purpose of the present invention, as shown in Figure 1, being provided in the one of which embodiment of the present invention a kind of anti- The HSSI High-Speed Serial Interface of interference, including transmitting terminal and receiving terminal, transmitting terminal includes:
RS encoders, for the data inputted to be carried out RS codings, input data is to enter RS encoders as unit of byte, into After the data accumulation to RS code widths for entering encoder, encoded according to RS coding rules, it is defeated as unit of byte after coding Go out;
Rectangular interleaver disperses for the data after RS is encoded, and interleaver is arranged the data of input by row as unit of byte Row, after interleaver arrangement is full, by row output as unit of byte;
8B/10B encoders, for by 1 byte data inputted, by 8B/10B rule encodings into 10bits data, parallel output;
Parallel-serial conversion driver for the parallel data that will be received, exports in a serial fashion;
Receiving terminal includes:
Serioparallel exchange receiver exports the serial data received under clock effect in a parallel fashion;
10 bit parallel datas received are converted to 8 bit original numbers by 8B/10B decoders by 8B/10B encoding and decoding rules According to;
Deinterleaver by the input data as unit of byte, is arranged in the form of row, after interleaver arrangement is full, using byte as Unit is exported by row;
RS decoders, for the data inputted to be carried out RS decodings, input data is to enter RS decoders as unit of byte, into After the data accumulation to RS decoding width for entering decoder, it is decoded according to the RS rules of transmitter, using byte as list after decoding Position output, reverts to initial data.
The present invention also provides a kind of implementation methods of jamproof HSSI High-Speed Serial Interface, include the following steps:
Forwarding step, input parallel data are carried out RS codings as unit of byte, enter bit base matrix interleaver battle array, handed over It knits device battle array and is output to 8B/10B encoders, encoder output parallel data to parallel-to-serial converter, the serial letter of parallel-to-serial converter output Number send;
Receiving step, reception serial signal enter deserializer by receiver and are converted to parallel data, and parallel data enters 8B/10B decoders revert to byte unit data, and 8B/10B decoders output data to deinterleaver battle array, and deinterleaver battle array is defeated Go out data and carry out RS decoder decodings.
RS codings have good error correcting capability to burst error in the present invention, and rectangular interleaver will cause digital data transmission Bursty errors, can be discrete using interweaving encoding technology and correct this bursty errors, improve transmission characteristic, effectively improve The antijamming capability of HSSI High-Speed Serial Interface.
What has been described above is only a preferred embodiment of the present invention, it is noted that for those of ordinary skill in the art For, without departing from the concept of the premise of the invention, various modifications and improvements can be made, these belong to the present invention Protection domain.

Claims (2)

1. a kind of jamproof HSSI High-Speed Serial Interface, including transmitting terminal and receiving terminal, which is characterized in that the transmitting terminal includes:
RS encoders, for the data inputted to be carried out RS codings, input data is to enter RS encoders as unit of byte, into After the data accumulation to RS code widths for entering encoder, encoded according to RS coding rules, it is defeated as unit of byte after coding Go out;
Rectangular interleaver disperses for the data after RS is encoded, and interleaver is arranged the data of input by row as unit of byte Row, after interleaver arrangement is full, by row output as unit of byte;
8B/10B encoders, for by 1 byte data inputted, by 8B/10B rule encodings into 10bits data, parallel output;
Parallel-serial conversion driver for the parallel data that will be received, exports in a serial fashion;
The receiving terminal includes:
Serioparallel exchange receiver exports the serial data received under clock effect in a parallel fashion;
10 bit parallel datas received are converted to 8 bit original numbers by 8B/10B decoders by 8B/10B encoding and decoding rules According to(1 byte);
Deinterleaver by the input data as unit of byte, is arranged in the form of row, after interleaver arrangement is full, using byte as Unit is exported by row;
RS decoders, for the data inputted to be carried out RS decodings, input data is to enter RS decoders as unit of byte, into After the data accumulation to RS decoding width for entering decoder, it is decoded according to the RS rules of transmitter, using byte as list after decoding Position output, reverts to initial data.
2. a kind of implementation method of jamproof HSSI High-Speed Serial Interface as described in claim 1, which is characterized in that including following Step:
Forwarding step, input parallel data are carried out RS codings as unit of byte, enter byte unit matrix interleaver battle array, handed over It knits device battle array and is output to 8B/10B encoders, encoder output parallel data to parallel-to-serial converter, the serial letter of parallel-to-serial converter output Number send;
Receiving step, reception serial signal enter deserializer by receiver and are converted to parallel data, and parallel data enters 8B/10B decoders revert to byte unit data, and 8B/10B decoders output data to deinterleaver battle array, and deinterleaver battle array is defeated Go out data and carry out RS decoder decodings.
CN201711390319.XA 2017-12-21 2017-12-21 A kind of jamproof HSSI High-Speed Serial Interface and its implementation Pending CN108155970A (en)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109597705A (en) * 2018-12-05 2019-04-09 中国人民解放军国防科技大学 High-speed serial interface data encoding and decoding method resistant to single event upset and single event transient
CN111726166A (en) * 2020-07-03 2020-09-29 北京航天发射技术研究所 EPA star networking optical communication network switch and forwarding method

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN100353690C (en) * 2002-03-28 2007-12-05 日本电气株式会社 Multiplex system using common network group to transmit multiple 8B/10B bit stream
CN101662636A (en) * 2009-09-10 2010-03-03 中国科学院声学研究所 Safe high-speed differential serial interface
CN201788691U (en) * 2010-05-11 2011-04-06 深圳市国微电子股份有限公司 Storage circuit, storage module and device with storage function
CN102158305B (en) * 2010-12-14 2012-07-04 北京航空航天大学 Mass data transmission supported high-speed photoelectric conversion data transmission method
CN102695041A (en) * 2012-04-27 2012-09-26 中国科学院空间科学与应用研究中心 Unmanned plane load device with real-time wireless high resolution image transmission function
CN104639909A (en) * 2015-02-06 2015-05-20 达声蔚 Method and device for transmitting video

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN100353690C (en) * 2002-03-28 2007-12-05 日本电气株式会社 Multiplex system using common network group to transmit multiple 8B/10B bit stream
CN101662636A (en) * 2009-09-10 2010-03-03 中国科学院声学研究所 Safe high-speed differential serial interface
CN201788691U (en) * 2010-05-11 2011-04-06 深圳市国微电子股份有限公司 Storage circuit, storage module and device with storage function
CN102158305B (en) * 2010-12-14 2012-07-04 北京航空航天大学 Mass data transmission supported high-speed photoelectric conversion data transmission method
CN102695041A (en) * 2012-04-27 2012-09-26 中国科学院空间科学与应用研究中心 Unmanned plane load device with real-time wireless high resolution image transmission function
CN104639909A (en) * 2015-02-06 2015-05-20 达声蔚 Method and device for transmitting video

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109597705A (en) * 2018-12-05 2019-04-09 中国人民解放军国防科技大学 High-speed serial interface data encoding and decoding method resistant to single event upset and single event transient
CN109597705B (en) * 2018-12-05 2022-02-08 中国人民解放军国防科技大学 High-speed serial interface data encoding and decoding method resistant to single event upset and single event transient
CN111726166A (en) * 2020-07-03 2020-09-29 北京航天发射技术研究所 EPA star networking optical communication network switch and forwarding method

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Application publication date: 20180612