CN108133932B - 阵列基板及其制作方法、显示面板 - Google Patents
阵列基板及其制作方法、显示面板 Download PDFInfo
- Publication number
- CN108133932B CN108133932B CN201611090724.5A CN201611090724A CN108133932B CN 108133932 B CN108133932 B CN 108133932B CN 201611090724 A CN201611090724 A CN 201611090724A CN 108133932 B CN108133932 B CN 108133932B
- Authority
- CN
- China
- Prior art keywords
- layer
- electrode
- pressure
- pressure electrode
- forming
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 239000000758 substrate Substances 0.000 title claims abstract description 76
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 15
- 238000000034 method Methods 0.000 claims abstract description 25
- 239000010409 thin film Substances 0.000 claims abstract description 17
- 230000000903 blocking effect Effects 0.000 claims abstract description 14
- 239000010410 layer Substances 0.000 claims description 233
- 239000011229 interlayer Substances 0.000 claims description 15
- 238000001514 detection method Methods 0.000 claims description 10
- 239000004973 liquid crystal related substance Substances 0.000 claims description 9
- 239000003990 capacitor Substances 0.000 claims description 6
- 239000012528 membrane Substances 0.000 claims 1
- 238000005530 etching Methods 0.000 abstract description 17
- 229910052751 metal Inorganic materials 0.000 description 9
- 239000002184 metal Substances 0.000 description 9
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 8
- 239000000463 material Substances 0.000 description 8
- 229910052814 silicon oxide Inorganic materials 0.000 description 8
- 238000002161 passivation Methods 0.000 description 6
- 238000000059 patterning Methods 0.000 description 6
- 229910052581 Si3N4 Inorganic materials 0.000 description 4
- 229910004205 SiNX Inorganic materials 0.000 description 4
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 4
- 239000010408 film Substances 0.000 description 4
- 229910052710 silicon Inorganic materials 0.000 description 4
- 239000010703 silicon Substances 0.000 description 4
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 4
- 238000009413 insulation Methods 0.000 description 3
- 238000000206 photolithography Methods 0.000 description 3
- ZOKXTWBITQBERF-UHFFFAOYSA-N Molybdenum Chemical compound [Mo] ZOKXTWBITQBERF-UHFFFAOYSA-N 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- -1 for example Substances 0.000 description 2
- 239000007769 metal material Substances 0.000 description 2
- 239000011733 molybdenum Substances 0.000 description 2
- 230000002093 peripheral effect Effects 0.000 description 2
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 2
- 229920005591 polysilicon Polymers 0.000 description 2
- 238000003825 pressing Methods 0.000 description 2
- 238000006467 substitution reaction Methods 0.000 description 2
- 229910001316 Ag alloy Inorganic materials 0.000 description 1
- 229910000838 Al alloy Inorganic materials 0.000 description 1
- 229910001020 Au alloy Inorganic materials 0.000 description 1
- VYZAMTAEIAYCRO-UHFFFAOYSA-N Chromium Chemical compound [Cr] VYZAMTAEIAYCRO-UHFFFAOYSA-N 0.000 description 1
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- 229910000599 Cr alloy Inorganic materials 0.000 description 1
- 229910000881 Cu alloy Inorganic materials 0.000 description 1
- 229910001182 Mo alloy Inorganic materials 0.000 description 1
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 1
- 229910001362 Ta alloys Inorganic materials 0.000 description 1
- 229910001069 Ti alloy Inorganic materials 0.000 description 1
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 1
- 229910001080 W alloy Inorganic materials 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 229910021417 amorphous silicon Inorganic materials 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 239000011651 chromium Substances 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 239000010949 copper Substances 0.000 description 1
- 238000009792 diffusion process Methods 0.000 description 1
- 238000001312 dry etching Methods 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 239000010931 gold Substances 0.000 description 1
- 230000003993 interaction Effects 0.000 description 1
- 229910044991 metal oxide Inorganic materials 0.000 description 1
- 150000004706 metal oxides Chemical class 0.000 description 1
- 150000002739 metals Chemical class 0.000 description 1
- 229910052750 molybdenum Inorganic materials 0.000 description 1
- 230000000149 penetrating effect Effects 0.000 description 1
- 229920002120 photoresistant polymer Polymers 0.000 description 1
- 239000011347 resin Substances 0.000 description 1
- 229920005989 resin Polymers 0.000 description 1
- 239000004332 silver Substances 0.000 description 1
- GUVRBAGPIYLISA-UHFFFAOYSA-N tantalum atom Chemical compound [Ta] GUVRBAGPIYLISA-UHFFFAOYSA-N 0.000 description 1
- 239000010936 titanium Substances 0.000 description 1
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 description 1
- 239000010937 tungsten Substances 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
- G06F3/03—Arrangements for converting the position or the displacement of a member into a coded form
- G06F3/041—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
- G06F3/0414—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means using force sensing means to determine a position
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01L—MEASURING FORCE, STRESS, TORQUE, WORK, MECHANICAL POWER, MECHANICAL EFFICIENCY, OR FLUID PRESSURE
- G01L1/00—Measuring force or stress, in general
- G01L1/14—Measuring force or stress, in general by measuring variations in capacitance or inductance of electrical elements, e.g. by measuring variations of frequency of electrical oscillators
- G01L1/142—Measuring force or stress, in general by measuring variations in capacitance or inductance of electrical elements, e.g. by measuring variations of frequency of electrical oscillators using capacitors
- G01L1/148—Measuring force or stress, in general by measuring variations in capacitance or inductance of electrical elements, e.g. by measuring variations of frequency of electrical oscillators using capacitors using semiconductive material, e.g. silicon
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/1368—Active matrix addressed cells in which the switching element is a three-electrode device
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
- G06F3/03—Arrangements for converting the position or the displacement of a member into a coded form
- G06F3/041—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
- G06F3/0412—Digitisers structurally integrated in a display
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
- G06F3/03—Arrangements for converting the position or the displacement of a member into a coded form
- G06F3/041—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
- G06F3/044—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means by capacitive means
- G06F3/0447—Position sensing using the local deformation of sensor cells
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3157—Partial encapsulation or coating
- H01L23/3171—Partial encapsulation or coating the coating being directly applied to the semiconductor body, e.g. passivation layer
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
- H01L23/5329—Insulating materials
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1222—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/124—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1259—Multistep manufacturing methods
- H01L27/127—Multistep manufacturing methods with a particular formation, treatment or patterning of the active layer specially adapted to the circuit arrangement
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/417—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions carrying the current to be rectified, amplified or switched
- H01L29/41725—Source or drain electrodes for field effect devices
- H01L29/41733—Source or drain electrodes for field effect devices for thin film transistors with insulated gate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
- H01L29/42312—Gate electrodes for field effect devices
- H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
- H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
- H01L29/42384—Gate electrodes for field effect devices for field-effect transistors with insulated gate for thin film field effect transistors, e.g. characterised by the thickness or the shape of the insulator or the dimensions, the shape or the lay-out of the conductor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/78606—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device
- H01L29/78633—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device with a light shield
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/40—OLEDs integrated with touch screens
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F2201/00—Constructional arrangements not provided for in groups G02F1/00 - G02F7/00
- G02F2201/12—Constructional arrangements not provided for in groups G02F1/00 - G02F7/00 electrode
- G02F2201/121—Constructional arrangements not provided for in groups G02F1/00 - G02F7/00 electrode common or background
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F2201/00—Constructional arrangements not provided for in groups G02F1/00 - G02F7/00
- G02F2201/12—Constructional arrangements not provided for in groups G02F1/00 - G02F7/00 electrode
- G02F2201/123—Constructional arrangements not provided for in groups G02F1/00 - G02F7/00 electrode pixel
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2203/00—Indexing scheme relating to G06F3/00 - G06F3/048
- G06F2203/041—Indexing scheme relating to G06F3/041 - G06F3/045
- G06F2203/04103—Manufacturing, i.e. details related to manufacturing processes specially suited for touch sensitive devices
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2203/00—Indexing scheme relating to G06F3/00 - G06F3/048
- G06F2203/041—Indexing scheme relating to G06F3/041 - G06F3/045
- G06F2203/04105—Pressure sensors for measuring the pressure or force exerted on the touch surface without providing the touch position
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2203/00—Indexing scheme relating to G06F3/00 - G06F3/048
- G06F2203/041—Indexing scheme relating to G06F3/041 - G06F3/045
- G06F2203/04112—Electrode mesh in capacitive digitiser: electrode for touch sensing is formed of a mesh of very fine, normally metallic, interconnected lines that are almost invisible to see. This provides a quite large but transparent electrode surface, without need for ITO or similar transparent conductive material
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/10—OLED displays
- H10K59/12—Active-matrix OLED [AMOLED] displays
- H10K59/126—Shielding, e.g. light-blocking means over the TFTs
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Computer Hardware Design (AREA)
- General Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Human Computer Interaction (AREA)
- Ceramic Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Nonlinear Science (AREA)
- Crystallography & Structural Chemistry (AREA)
- Chemical & Material Sciences (AREA)
- Optics & Photonics (AREA)
- Mathematical Physics (AREA)
- Liquid Crystal (AREA)
- Devices For Indicating Variable Information By Combining Individual Elements (AREA)
- Thin Film Transistor (AREA)
Abstract
提供一种阵列基板及其制作方法、显示面板。该阵列基板,包括:衬底基板;光遮挡层,设置在衬底基板上;压力电极,与光遮挡层同层设置;缓冲层,设置在光遮挡层和压力电极上;薄膜晶体管,包括依次设置在缓冲层上的有源层、栅极绝缘层和栅极;压力电极引线,与栅极同层设置;有源层包括沟道区域,光遮挡层被配置来遮挡入射到有源层的沟道区域的光线,压力电极引线与压力电极电连接。该阵列基板中,压力电极引线与栅极同层设置,从而,可以解决刻蚀过程中损伤衬底基板、损失压力电极、刻蚀时间不好把握、SD层与LS层的过孔以及压力电极引线与压力电极的过孔过厚,易造成断路和接触不良的问题。
Description
技术领域
本公开至少一实施例涉及一种阵列基板及其制作方法、显示面板。
背景技术
压力感应技术是指对外部受力能够感应或测量的技术。许多厂商正在寻求合适的技术方案来在显示领域尤其是手机或平板电脑等领域实现压力感应,从而使用户得到更好的、更丰富的人机交互体验。
发明内容
本公开的至少一实施例涉及一种阵列基板及其制作方法、显示面板,以解决刻蚀过程中损伤衬底基板、损失压力电极、刻蚀时间不好把握、SD层与LS层的过孔以及压力电极引线与压力电极的过孔过厚,易造成断路和接触不良的问题。
本公开至少一实施例提供一种阵列基板,包括:
衬底基板;
光遮挡层,设置在所述衬底基板上;
压力电极,与所述光遮挡层同层设置;
缓冲层,设置在所述光遮挡层和所述压力电极上;
薄膜晶体管,包括依次设置在所述缓冲层上的有源层、栅极绝缘层和栅极;
压力电极引线,与所述栅极同层设置;
其中,所述有源层包括沟道区域,所述光遮挡层被配置来遮挡入射到所述有源层的所述沟道区域的光线,所述压力电极引线与所述压力电极电连接。
本公开至少一实施例提供一种显示面板,包括本公开任一实施例所述的阵列基板。
本公开至少一实施例提供一种阵列基板的制作方法,包括:
在衬底基板上同层形成光遮挡层和压力电极;
在所述光遮挡层和所述压力电极上形成缓冲层;
在所述缓冲层上形成薄膜晶体管的有源层;
在所述有源层上形成栅极绝缘层;
在所述栅极绝缘层上同层形成栅极和压力电极引线;
其中,所述有源层包括沟道区域,所述光遮挡层被配置来遮挡入射到所述有源层的所述沟道区域的光线,所述压力电极引线与所述压力电极电连接。
附图说明
为了更清楚地说明本公开实施例的技术方案,下面将对实施例的附图作简单地介绍,显而易见地,下面描述中的附图仅仅涉及本公开的一些实施例,而非对本公开的限制。
图1为一种阵列基板的示意图;
图2为图1的A-B向剖视示意图;
图3为本公开一实施例提供的一种阵列基板的示意图;
图4为图3的C-D向剖视示意图;
图5为压力电极与中框形成检测电容的示意图;
图6为压力电极与中框形成检测电容的示意图;
图7为在衬底基板上同层形成光遮挡层和压力电极;
图8为在缓冲层上形成薄膜晶体管的有源层;
图9为在栅极绝缘层和缓冲层中形成过孔以便压力电极引线与压力电极电连接;
图10为在栅极绝缘层上同层形成栅极和压力电极引线。
附图标记:
101-衬底基板;001-薄膜晶体管;102-光遮挡层;103-压力电极;104-缓冲层;105-有源层;106-栅极绝缘层;107-栅极;1051-沟道区域;108-层间介电层;109-源极;110-漏极;111-压力电极引线;112-平坦层;113-公共电极;114-钝化层;115-像素电极;120-过孔;121-124、过孔;0107-栅线;0109-数据线;201-中框;1-子像素。
具体实施方式
为使本公开实施例的目的、技术方案和优点更加清楚,下面将结合本公开实施例的附图,对本公开实施例的技术方案进行清楚、完整地描述。显然,所描述的实施例是本公开的一部分实施例,而不是全部的实施例。基于所描述的本公开的实施例,本领域普通技术人员在无需创造性劳动的前提下所获得的所有其他实施例,都属于本公开保护的范围。
除非另外定义,本公开使用的技术术语或者科学术语应当为本公开所属领域内具有一般技能的人士所理解的通常意义。本公开中使用的“第一”、“第二”以及类似的词语并不表示任何顺序、数量或者重要性,而只是用来区分不同的组成部分。同样,“包括”或者“包含”等类似的词语意指出现该词前面的元件或者物件涵盖出现在该词后面列举的元件或者物件及其等同,而不排除其他元件或者物件。“连接”或者“相连”等类似的词语并非限定于物理的或者机械的连接,而是可以包括电性的连接,不管是直接的还是间接的。“上”、“下”、“左”、“右”等仅用于表示相对位置关系,当被描述对象的绝对位置改变后,则该相对位置关系也可能相应地改变。
内嵌式压力触控(in Cell force touch)的薄膜晶体管液晶显示器(thin filmtransistor liquid crystal display,TFT-LCD)中,利用光遮挡(light shielding,LS)层金属制作金属网格状的传感器(metal mesh sensor)作为压力(force)电极。以此压力电极对中框(例如手机中框)的电容作为检测电容。压力电极的引线采用源漏(source/drain,SD)层金属,需要打孔使得压力电极与压力电极的引线相连以传递信号。
图1示出了一种阵列基板,图2是图1的A-B向剖视图。如图1和图2所示,压力电极103与光遮挡层102同层设置,压力电极引线111与源极109和漏极110同层设置,压力电极引线111通过贯穿缓冲层104、栅极绝缘层106和层间介电层108的过孔121与压力电极103电连接。
例如,层间介电层108的厚度可为栅极绝缘层106的厚度可为缓冲层104的厚度可为为了形成过孔121使得压力电极引线111和压力电极103电连接,刻蚀层间介电层108、栅极绝缘层106和缓冲层104,需要刻蚀超过约的厚度,刻蚀时,有损失压力电极103的风险。并且源极109和漏极110分别通过过孔122和123与有源层105电连接,在形成过孔122和123时,刻蚀层间介电层108、栅极绝缘层106、有源层105和缓冲层104,从而,需要刻蚀超过约的厚度,有损伤衬底基板101的风险。刻蚀时间不好把握。而且SD层与LS层的过孔(连接孔)以及压力电极引线111与压力电极103的过孔过厚,易造成断路和接触不良。
图1中还示出了栅线0107、栅极107、数据线0109、平坦层112、公共电极113、钝化层114和像素电极115,像素电极115通过过孔124与漏极110电连接。图2中还示出了有源层105包括沟道区1051、轻掺杂区1052和重掺杂区1053。
本公开至少一实施例提供一种阵列基板,包括:
衬底基板;
光遮挡层,设置在衬底基板上;
压力电极,与光遮挡层同层设置;
缓冲层,设置在光遮挡层和压力电极上;
薄膜晶体管,包括依次设置在缓冲层上的有源层、栅极绝缘层和栅极;
压力电极引线,与栅极同层设置;
有源层包括沟道区域,光遮挡层被配置来遮挡入射到有源层的沟道区域的光线,压力电极引线与压力电极电连接。
本公开至少一实施例提供的阵列基板,压力电极引线与栅极同层设置,从而,可以解决刻蚀过程中损伤衬底基板、损失压力电极、刻蚀时间不好把握、SD层与LS层的过孔以及压力电极引线与压力电极的过孔过厚,易造成断路和接触不良的问题。
本公开至少一实施例提供一种阵列基板的制作方法,包括:
在衬底基板上同层形成光遮挡层和压力电极;
在光遮挡层和压力电极上形成缓冲层;
在缓冲层上形成薄膜晶体管的有源层;
在有源层上形成栅极绝缘层;
在栅极绝缘层上同层形成栅极和压力电极引线;
有源层包括沟道区域,光遮挡层被配置来遮挡入射到有源层的沟道区域的光线,压力电极引线与压力电极电连接。
本公开至少一实施例提供的阵列基板的制作方法,压力电极引线与栅极同层形成,从而,可以解决刻蚀过程中损伤衬底基板、损失压力电极、刻蚀时间不好把握、SD层与LS层的过孔以及压力电极引线与压力电极的过孔过厚,易造成断路和接触不良的问题。
以下通过几个实施例进行说明。
实施例一
如图3和图4所示,本实施例提供一种阵列基板,包括:
衬底基板101;
光遮挡层102,设置在衬底基板101上;
压力电极103,与光遮挡层102同层设置;
缓冲层104,设置在光遮挡层102和压力电极103上;
薄膜晶体管001,包括依次设置在缓冲层104上的有源层105、栅极绝缘层106和栅极107;
压力电极引线111,与栅极107同层设置;
有源层105包括沟道区域1051,光遮挡层102被配置来遮挡入射到有源层105的沟道区域1051的光线,压力电极引线111与压力电极103电连接。沟道区域1051例如是指有源层105与栅极107在垂直于衬底基板101的方向上的重叠的区域。图3并非按比例绘制,可能也未示出全部的结构,其只是为了表示出压力电极引线111与栅极107同层设置的结构。如图3所示,栅线0107可以和栅极107同层形成。例如,栅极107与栅线0107一体形成。例如,压力电极引线111可平行于栅线0107设置。例如压力电极引线111可设置在相邻两行子像素之间,但不限于此。图3中示出了一个子像素1。一个子像素例如至少包括薄膜晶体管和与该薄膜晶体管电连接的像素电极,但不限于此。
本实施例提供的阵列基板,压力电极引线111与栅极107同层设置,从而,可以解决刻蚀过程中损伤衬底基板、损失压力电极、刻蚀时间不好把握、SD层与LS层的过孔以及压力电极引线与压力电极的过孔过厚,易造成断路和接触不良的问题。
例如,光遮挡层102和压力电极103可同层形成,例如可采用金属材料制作,进一步例如,可采用钼(Mo),但不限于此。例如,栅极107采用金属材料,栅极107的材质例如包括铝、铜、钼、钛、银、金、钽、钨、铬单质或铝合金等金属,但不限于此。压力电极引线111可与栅极107采用同样的材料同层形成,从而可减少制作工艺。例如,如图3所示,压力电极103可包括由多条金属线形成的网格。例如,形成网格的金属线的宽度可为微米级别,例如可为2-5微米,但不限于此。压力电极103的尺寸可参照通常设计。
如图3所示,数据线0109可以和源极109同层形成,但不限于此。
一个示例中,图4所示,压力电极引线111通过形成在缓冲层104和栅极绝缘层106中的过孔120与压力电极103电连接(搭接)以传递信号。过孔120可仅贯穿栅极绝缘层106和缓冲层104。过孔120在垂直于衬底基板101的方向上的高度可为缓冲层104的材质可包括氮化硅(SiNx)、氧化硅(SiOx)或氮氧化硅(SiNxOy),但不限于此。缓冲层104的厚度可为栅极绝缘层106的材质可包括氮化硅(SiNx)、氧化硅(SiOx)或氮氧化硅(SiNxOy),但不限于此。栅极绝缘层106的厚度可为
一个示例中,图4所示,该阵列基板还包括层间介电层108,薄膜晶体管001还包括同层形成的源极109和漏极110,层间介电层108位于栅极107和同层形成的源极109和漏极110之间,源极109和漏极110彼此间隔设置并且分别与有源层105电连接。例如,层间介电层108的材质可包括氮化硅(SiNx)、氧化硅(SiOx)或氮氧化硅(SiNxOy),但不限于此。例如,层间介电层108的厚度可为
一个示例中,图4所示,该阵列基板还包括设置在源极109和漏极110上的平坦层112以及设置在平坦层上的公共电极113,在公共电极113上设置有钝化层114,在钝化层114上设置有像素电极115,像素电极115与漏极110电连接。为了清楚的示出其他结构,图4中只示出了漏极附近的公共电极113,公共电极113可为面状电极并在漏极110处设置镂空结构,以便像素电极115与漏极110电连接。例如,公共电极113可与周边区域的公共电极线电连接以传递信号。周边区域位于显示区(AA区)的至少一侧。例如,公共电极线可与源极109和漏极110同层形成,通过过孔与公共电极电连接。例如,平坦层112可采用有机树脂。例如,平坦层112的厚度可为 左右,但不限于此。例如,钝化层114的材质可包括氮化硅(SiNx)、氧化硅(SiOx)或氮氧化硅(SiNxOy),但不限于此。例如,钝化层114的厚度可为该示例的阵列基板可作为高级超维场开关(Advanced-superDimensional Switching,ADS)模式的液晶显示面板的阵列基板。通常,液晶显示面板包括阵列基板、对置基板以及夹设在其间的液晶层,像素电极115和公共电极113被配置来施加电压使得液晶层的液晶旋转以进行显示。对置基板例如可包括彩膜基板,但不限于此。
需要说明的是,本实施例提供的阵列基板也可以采用其他模式,例如,高开口率高级超维场转换(high aperture advanced super dimensional switching,HADS)模式、垂直取向模式(Vertical Alignment,VA)、扭曲向列(Twisted Nematic,TN)模式等,根据需要进行阵列基板的结构调整即可。并且,也不限于制作液晶显示面板的阵列基板,也可以用作有机发光二极管显示面板的阵列基板。
如图4所示,有源层105可采用多晶硅,有源层105除了包括沟道区1051外,还可包括轻掺杂区1052和重掺杂区1053。需要说明的是,有源层105的材质不限于多晶硅,也可以采用其他材质,例如,非晶硅,导电金属氧化物等,有源层105的结构也不限于图4所示。有源层105可采用通常的方法制作。
例如,薄膜晶体管001可包括有源层105、栅极绝缘层106、栅极107、源极109和漏极110。
实施例二
本实施例提供一种显示面板,包括实施例一所述的任一阵列基板。从而可形成内嵌式压力触控显示装置。
例如,显示面板包括液晶显示面板或有机发光二极管显示面板。
如图5和图6所示,压力电极103与中框201之间可形成检测电容Cf,当有手指按压时,压力电极103与中框201之间的距离改变,检测电容Cf发生变化,从而可检测到手指按压位置和按压力度,从而实现压力触控。例如,中框201可采用金属材质。压力电极103与中框201之间具有介电性能的结构可作为检测电容的电介质,具有介电性能的结构例如包括空气层、衬底基板、膜片等至少之一。当显示面板设置有背光结构时,背光结构可设置在中框201和阵列基板之间,背光结构中的棱镜片和/或扩散片可作为压力电极103与中框201之间的电介质。图5中仅示出了两个压力电极103。图6中省略了设置在衬底基板101上的其他结构。本实施例以压力电极103和中框201之间形成检测电容为例进行说明,但不限于此。
例如,本实施例提供的显示面板可应用于电视、数码相机、手机、手表、平板电脑、笔记本电脑、导航仪等显示装置。
实施例三
如图3-4以及图7-10所示,本实施例提供一种阵列基板的制作方法,包括:
如图7所示,在衬底基板101上同层形成光遮挡层102和压力电极103;
在光遮挡层102和压力电极103上形成缓冲层104;
如图8所示,在缓冲层104上形成薄膜晶体管001的有源层105;
在有源层105上形成栅极绝缘层106;
如图10所示,在栅极绝缘层106上同层形成栅极107和压力电极引线111;
有源层105包括沟道区域1051,光遮挡层102被配置来遮挡入射到有源层105的沟道区域1051的光线,压力电极引线111与压力电极103电连接。
本实施例提供的阵列基板,压力电极引线111与栅极107同层形成,从而,可以解决刻蚀过程中损伤衬底基板、损失压力电极、刻蚀时间不好把握、SD层与LS层的过孔以及压力电极引线与压力电极的过孔过厚,易造成断路和接触不良的问题。
如图3和图4所示,一个示例中,栅线0107和栅极107可一体形成。数据线0109也可以和源极109可一体形成。
一个示例中,如图9所示,在栅极绝缘层106上同层形成栅极107和压力电极引线111之前,还包括在栅极绝缘层106和缓冲层104中形成过孔120,压力电极引线111通过过孔120与压力电极103电连接。例如,过孔120仅贯穿栅极绝缘层106和缓冲层104。例如,过孔120在垂直于衬底基板101的方向上的高度为例如,形成过孔120时,可采用干法刻蚀工艺。
如图3和图4所示,一个示例中,形成栅极绝缘层106后,对栅极绝缘层106和缓冲层104进行刻蚀,形成过孔120,然后形成一层金属层,并通过构图工艺,形成栅极107和压力电极引线111。
例如,该制作方法还包括在栅极107和压力电极引线111上形成层间介电层108,以及在层间介电层108上形成源极109和漏极110,源极109和漏极110分别与有源层105电连接。
采用本实施例的方法可形成实施例一中任一阵列基板。有关各层材质、厚度等信息可参照实施例一的描述。
这里应该理解的是,在本公开的实施例中,“同层”指的是采用同一成膜工艺形成用于形成特定图形的膜层,然后利用同一掩模板通过一次构图工艺形成的层结构。根据特定图形的不同,一次构图工艺可能包括多次曝光、显影或刻蚀工艺,而形成的层结构中的特定图形可以是连续的也可以是不连续的,这些特定图形还可能处于不同的高度或者具有不同的厚度。
在本公开的实施例中,构图或构图工艺可只包括光刻工艺,或包括光刻工艺以及刻蚀步骤,或者可以包括打印、喷墨等其他用于形成预定图形的工艺。光刻工艺是指包括成膜、曝光、显影等工艺过程,利用光刻胶、掩模板、曝光机等形成图形。可根据本公开的实施例中所形成的结构选择相应的构图工艺。
有以下几点需要说明:
(1)除非另作定义,本公开实施例以及附图中,同一附图标记代表同一含义。
(2)本公开实施例附图中,只涉及到与本公开实施例涉及到的结构,其他结构可参考通常设计。
(3)为了清晰起见,在用于描述本公开的实施例的附图中,层或区域的厚度可能被放大。可以理解,当诸如层、膜、区域或基板之类的元件被称作位于另一元件“上”或“下”时,该元件可以“直接”位于另一元件“上”或“下”,或者可以存在中间元件。
(4)在不冲突的情况下,本公开的同一实施例及不同实施例中的特征可以相互组合。
以上所述,仅为本公开的具体实施方式,但本公开的保护范围并不局限于此,任何熟悉本技术领域的技术人员在本公开揭露的技术范围内,可轻易想到变化或替换,都应涵盖在本公开的保护范围之内。因此,本公开的保护范围应以所述权利要求的保护范围为准。
Claims (8)
1.一种压力感应显示装置,包括显示面板,所述显示面板包括阵列基板,所述阵列基板包括:
衬底基板;
光遮挡层,设置在所述衬底基板上;
压力电极,与所述光遮挡层同层设置;
缓冲层,设置在所述光遮挡层和所述压力电极上;
薄膜晶体管,包括依次设置在所述缓冲层上的有源层、栅极绝缘层和栅极;
压力电极引线,与所述栅极同层设置;
其中,所述有源层包括沟道区域,所述光遮挡层被配置来遮挡入射到所述有源层的所述沟道区域的光线,所述压力电极引线与所述压力电极电连接;
所述压力电极引线通过形成在所述缓冲层和所述栅极绝缘层中的过孔与所述压力电极电连接;
所述过孔仅贯穿所述栅极绝缘层和所述缓冲层;
所述压力感应显示装置还包括位于所述衬底基板的设置所述压力电极的相反侧的中框,所述压力电极和所述中框之间形成检测电容;
所述压力电极与所述中框之间具有介电性能的结构作为所述检测电容的电介质。
3.根据权利要求1所述的压力感应显示装置,其中,所述阵列基板还包括层间介电层,其中,所述薄膜晶体管还包括同层形成的源极和漏极,所述层间介电层位于所述栅极和所述同层形成的源极和漏极之间,所述源极和所述漏极分别与所述有源层电连接。
4.根据权利要求1所述的压力感应显示装置,其中,所述具有介电性能的结构包括空气层、所述衬底基板和膜片至少之一。
5.根据权利要求1所述的压力感应显示装置,其中,所述显示面板包括液晶显示面板或有机发光二极管显示面板。
6.一种压力感应显示装置的制作方法,包括形成显示面板,形成所述显示面板包括形成阵列基板,形成所述阵列基板包括:
在衬底基板上同层形成光遮挡层和压力电极;
在所述光遮挡层和所述压力电极上形成缓冲层;
在所述缓冲层上形成薄膜晶体管的有源层;
在所述有源层上形成栅极绝缘层;
在所述栅极绝缘层上同层形成栅极和压力电极引线;
其中,所述有源层包括沟道区域,所述光遮挡层被配置来遮挡入射到所述有源层的所述沟道区域的光线,所述压力电极引线与所述压力电极电连接;
在所述栅极绝缘层上同层形成栅极和压力电极引线之前,还包括在所述栅极绝缘层和所述缓冲层中形成过孔,所述压力电极引线通过所述过孔与所述压力电极电连接;
所述过孔仅贯穿所述栅极绝缘层和所述缓冲层;
所述制作方法还包括在所述衬底基板的设置所述压力电极的相反侧形成中框,所述压力电极和所述中框之间形成检测电容;
所述压力电极与所述中框之间具有介电性能的结构作为所述检测电容的电介质。
8.根据权利要求6或7所述的压力感应显示装置的制作方法,还包括在所述栅极和所述压力电极引线上形成层间介电层,以及在所述层间介电层上形成源极和漏极,其中,所述源极和所述漏极分别与所述有源层电连接。
Priority Applications (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201611090724.5A CN108133932B (zh) | 2016-12-01 | 2016-12-01 | 阵列基板及其制作方法、显示面板 |
EP17832184.0A EP3550409B1 (en) | 2016-12-01 | 2017-06-30 | Array substrate and manufacturing method therefor, and display panel |
PCT/CN2017/091106 WO2018099068A1 (zh) | 2016-12-01 | 2017-06-30 | 阵列基板及其制作方法、显示面板 |
US15/748,455 US20190004660A1 (en) | 2016-12-01 | 2017-06-30 | Array substrate and manufacturing method thereof, and display panel |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201611090724.5A CN108133932B (zh) | 2016-12-01 | 2016-12-01 | 阵列基板及其制作方法、显示面板 |
Publications (2)
Publication Number | Publication Date |
---|---|
CN108133932A CN108133932A (zh) | 2018-06-08 |
CN108133932B true CN108133932B (zh) | 2020-04-10 |
Family
ID=62242326
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201611090724.5A Expired - Fee Related CN108133932B (zh) | 2016-12-01 | 2016-12-01 | 阵列基板及其制作方法、显示面板 |
Country Status (4)
Country | Link |
---|---|
US (1) | US20190004660A1 (zh) |
EP (1) | EP3550409B1 (zh) |
CN (1) | CN108133932B (zh) |
WO (1) | WO2018099068A1 (zh) |
Families Citing this family (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN104898896B (zh) * | 2015-05-12 | 2018-06-22 | 京东方科技集团股份有限公司 | 一种阵列基板及其制备方法、光学触控屏和显示装置 |
CN106920804B (zh) * | 2017-04-28 | 2020-03-24 | 厦门天马微电子有限公司 | 一种阵列基板、其驱动方法、显示面板及显示装置 |
CN108538861B (zh) * | 2018-05-04 | 2021-03-16 | 武汉华星光电技术有限公司 | 阵列基板及其制造方法、显示面板 |
CN112534566A (zh) * | 2018-07-04 | 2021-03-19 | 深圳市柔宇科技股份有限公司 | 阵列基板及其制造方法、显示装置 |
CN110426906B (zh) * | 2018-08-10 | 2022-03-04 | 友达光电股份有限公司 | 像素阵列基板 |
WO2020133446A1 (zh) * | 2018-12-29 | 2020-07-02 | 深圳市柔宇科技有限公司 | 阵列基板、显示面板及显示装置 |
CN111897453B (zh) * | 2020-07-23 | 2022-07-12 | 武汉华星光电技术有限公司 | 一种显示面板及其制备方法、显示装置 |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2015153781A1 (en) * | 2014-04-01 | 2015-10-08 | Wispry, Inc. | Systems, devices, and methods for reducing surface dielectric charging in a rf mems actuator element |
CN105070720A (zh) * | 2015-07-13 | 2015-11-18 | 京东方科技集团股份有限公司 | 集成有传感器的显示面板及其制作方法和显示装置 |
Family Cites Families (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100867726B1 (ko) * | 2002-11-21 | 2008-11-10 | 삼성전자주식회사 | 액정표시장치의 제조 방법 |
KR20070077282A (ko) * | 2006-01-23 | 2007-07-26 | 삼성전자주식회사 | 표시 장치, 액정 표시판 조립체, 및 표시 장치의 검사 방법 |
JP5396335B2 (ja) * | 2009-05-28 | 2014-01-22 | 株式会社半導体エネルギー研究所 | タッチパネル |
CN102667678A (zh) * | 2009-11-20 | 2012-09-12 | 夏普株式会社 | 带触摸传感器功能的挠性显示面板 |
KR101343293B1 (ko) * | 2010-04-30 | 2013-12-18 | 샤프 가부시키가이샤 | 회로 기판 및 표시 장치 |
CN103472646B (zh) * | 2013-08-30 | 2016-08-31 | 京东方科技集团股份有限公司 | 一种阵列基板及其制备方法和显示装置 |
CN104022126B (zh) * | 2014-05-28 | 2017-04-12 | 京东方科技集团股份有限公司 | 一种阵列基板、其制作方法及显示装置 |
CN105136378B (zh) * | 2015-09-24 | 2018-04-20 | 京东方科技集团股份有限公司 | 一种显示基板及显示装置 |
CN105677111B (zh) * | 2016-01-29 | 2020-07-07 | 上海天马微电子有限公司 | 一种阵列基板及显示面板 |
CN105739790B (zh) * | 2016-04-25 | 2018-10-19 | 上海天马微电子有限公司 | 一种触控显示面板 |
-
2016
- 2016-12-01 CN CN201611090724.5A patent/CN108133932B/zh not_active Expired - Fee Related
-
2017
- 2017-06-30 US US15/748,455 patent/US20190004660A1/en not_active Abandoned
- 2017-06-30 WO PCT/CN2017/091106 patent/WO2018099068A1/zh unknown
- 2017-06-30 EP EP17832184.0A patent/EP3550409B1/en active Active
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2015153781A1 (en) * | 2014-04-01 | 2015-10-08 | Wispry, Inc. | Systems, devices, and methods for reducing surface dielectric charging in a rf mems actuator element |
CN105070720A (zh) * | 2015-07-13 | 2015-11-18 | 京东方科技集团股份有限公司 | 集成有传感器的显示面板及其制作方法和显示装置 |
Also Published As
Publication number | Publication date |
---|---|
EP3550409A1 (en) | 2019-10-09 |
EP3550409B1 (en) | 2022-04-20 |
EP3550409A4 (en) | 2020-07-08 |
CN108133932A (zh) | 2018-06-08 |
US20190004660A1 (en) | 2019-01-03 |
WO2018099068A1 (zh) | 2018-06-07 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN108133932B (zh) | 阵列基板及其制作方法、显示面板 | |
US10101838B2 (en) | In-cell touch display panel and electronic device | |
JP6702890B2 (ja) | アレイ基板及びその作成方法と駆動方法、表示装置 | |
US9933645B2 (en) | Array substrate, display panel, display device and manufacturing method thereof | |
US10254876B2 (en) | Array substrate, fabricating method thereof and display device | |
US10860159B2 (en) | Display substrate, display panel and display device | |
US8134652B2 (en) | Liquid crystal display having sensor and spacer arrangement and and method of manufacturing the same | |
US9921677B1 (en) | Method for fabricating touch display device | |
US11016625B2 (en) | Display panel and deformation sensing method thereof, and display device | |
WO2017008472A1 (zh) | Ads阵列基板及其制作方法、显示器件 | |
US20170285430A1 (en) | Array Substrate and Manufacturing Method Thereof, Display Panel and Display Device | |
WO2017008450A1 (zh) | 平面转换模式阵列基板及其制作方法、显示器件 | |
US11092836B2 (en) | Array substrate, manufacturing method for the same and in-cell touch panel | |
KR20100046891A (ko) | 액정 표시 장치에 일체화된 터치 스크린 패널과 그 제조 방법 및 터치 센싱 방법 | |
US10509501B2 (en) | Pressure-sensitive display panel, manufacturing method thereof and pressure-sensitive display device | |
EP3662355B1 (en) | Touch control array substrate and touch control display apparatus | |
US10528173B2 (en) | Array substrate, display panel, display device and method for manufacturing array substrate | |
KR20090100639A (ko) | 표시 패널 및 이의 제조 방법 | |
KR20140016593A (ko) | 액정 표시 장치 및 그 제조 방법 | |
US11835808B2 (en) | Array substrate, display panel, and electronic device | |
KR20170013556A (ko) | 터치 표시 장치의 박막트랜지스터를 포함하는 기판 | |
WO2022088326A1 (zh) | 阵列基板、显示面板及电子设备 | |
US10775659B2 (en) | Array substrate, display device and driving method thereof | |
KR20120010071A (ko) | 터치인식 액정표시장치 | |
US11249607B2 (en) | Incell self-capacitive touch display substrate with hallowed-out portions |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
PB01 | Publication | ||
PB01 | Publication | ||
SE01 | Entry into force of request for substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
GR01 | Patent grant | ||
GR01 | Patent grant | ||
CF01 | Termination of patent right due to non-payment of annual fee | ||
CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20200410 |