CN108053799A - Amplifying circuit, source electrode driver and liquid crystal display - Google Patents
Amplifying circuit, source electrode driver and liquid crystal display Download PDFInfo
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- CN108053799A CN108053799A CN201810063226.4A CN201810063226A CN108053799A CN 108053799 A CN108053799 A CN 108053799A CN 201810063226 A CN201810063226 A CN 201810063226A CN 108053799 A CN108053799 A CN 108053799A
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
- G09G3/3607—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals for displaying colours or for displaying grey scales with a specific pixel layout, e.g. using sub-pixels
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
- G09G3/3611—Control of matrices with row and column drivers
- G09G3/3648—Control of matrices with row and column drivers using an active matrix
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- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Liquid Crystal Display Device Control (AREA)
- Amplifiers (AREA)
Abstract
The present invention provides a kind of amplifying circuit, applied to the source electrode driver of liquid crystal display device, including：Operation amplifier unit, including normal phase input end, inverting input, the first output terminal, drive module, PMOS tube and NMOS tube, the drain electrode of the NMOS tube is connected with the source electrode of the PMOS tube and is connected with first output terminal, the source electrode of the NMOS tube connects first voltage, the drain electrode of the PMOS tube connects second voltage, the drive module respectively with the normal phase input end, the inverting input, the PMOS tube and NMOS tube more than grid be connected；Comparing unit, the comparing unit are connected respectively with the normal phase input end and first output terminal, to judge whether the voltage difference of normal phase input end and the first output terminal is more than the first reference voltage；Internal resistance drags down unit, and the internal resistance drags down unit and is connected with the grid of the PMOS tube and the NMOS tube, and the internal resistance drags down unit and is connected with the comparing unit.
Description
Technical field
The present invention relates to field of liquid crystal display, and in particular to a kind of amplifying circuit, source electrode driver and liquid crystal display.
Background technology
With the development of science and technology, it is driven with the design of TFT-LCD panels from single raster data model to bigrid even three grids
Dynamic development, charging time become shorter and shorter.It is badly in need of being improved source electrode drive circuit to promote the charging time, to meet
Charging time short requirement.
The content of the invention
The embodiment of the present invention is designed to provide a kind of amplifying circuit, source electrode driver and liquid crystal display, Neng Gouti
High charge-discharge speed.
A kind of amplifying circuit, applied to the source electrode driver of liquid crystal display device, including：
Operation amplifier unit, including normal phase input end, inverting input, the first output terminal, drive module, PMOS tube and
NMOS tube, the drain electrode of the NMOS tube are connected with the source electrode of the PMOS tube and are connected with first output terminal, the NMOS
The source electrode of pipe connects first voltage, and the drain electrode of the PMOS tube connects second voltage, and the drive module inputs respectively with the positive
Grid connection more than end, the inverting input, the PMOS tube and NMOS tube, the level of the first voltage is more than described
The level of second voltage；
Comparing unit, the comparing unit is connected respectively with the normal phase input end and first output terminal, to sentence
Whether the voltage difference of disconnected normal phase input end and the first output terminal is more than the first reference voltage；
Internal resistance drags down unit, and the internal resistance drags down unit and is connected with the grid of the PMOS tube and the NMOS tube, institute
It states internal resistance and drags down unit and be connected with the comparing unit；
Internal resistance drags down unit and drags down function for opening internal resistance when the voltage difference is more than first reference voltage, and
When charging, the internal resistance value of the NMOS tube is dragged down；The internal resistance value of the PMOS tube will be dragged down in electric discharge.
In amplifying circuit of the present invention, the operation amplifier unit further includes the first gating module and the first base
Quasi- voltage module；The control terminal of first gating module drags down unit with the internal resistance and is connected, first gating module
Grid of two input terminals respectively with the first reference voltage module and the NMOS tube is connected；
During charging, the internal resistance drags down unit and controls first gating module by the first reference voltage module and institute
The gate turn-on of NMOS tube is stated, so as to which the grid voltage of the NMOS tube be drawn high, and then the internal resistance value of the NMOS tube is drawn
It is low.
In amplifying circuit of the present invention, the operation amplifier unit further includes the second gating module and the second base
Quasi- voltage module；The control terminal of second gating module drags down unit with the internal resistance and is connected, second gating module
Grid of two input terminals respectively with the second reference voltage module and the PMOS tube is connected；
During electric discharge, the internal resistance drags down unit and controls second gating module by the second reference voltage module and institute
The gate turn-on of the PMOS tube is stated, so that the grid voltage of the PMOS tube be dragged down, and then by the internal resistance of the PMOS tube
Value drags down.
In amplifying circuit of the present invention, first gating module includes first switch pipe and second switch
Pipe, the input terminal of the first switch pipe is connected with the first reference voltage module, the input terminal of the second switch pipe and
The output terminal of the drive module connection, the first switch pipe and second switch pipe connects respectively with the grid of the NMOS tube
It connects；
The first switch pipe is opposite with the switching characteristic of the second switch pipe.
In amplifying circuit of the present invention, second gating module includes the 3rd switching tube and the 4th switch
Pipe, the input terminal of the 3rd switching tube is connected with the second reference voltage module, the input terminal of the 4th switching tube and
The output terminal of the drive module connection, the 3rd switching tube and the 4th switching tube connects respectively with the grid of the PMOS tube
It connects；
3rd switching tube is opposite with the switching characteristic of the 4th switching tube.
In amplifying circuit of the present invention, first reference voltage is grey according to the target of the liquid crystal display device
Rank value setting.
A kind of source electrode driver, including multistage amplifying circuit cascade successively, wherein, afterbody amplifying circuit includes：
Operation amplifier unit, including normal phase input end, inverting input, the first output terminal, drive module, PMOS tube and
NMOS tube, the drain electrode of the NMOS tube are connected with the source electrode of the PMOS tube and are connected with first output terminal, the NMOS
The source electrode of pipe connects first voltage, and the drain electrode of the PMOS tube connects second voltage, and the drive module inputs respectively with the positive
Grid connection more than end, the inverting input, the PMOS tube and NMOS tube, the level of the first voltage is more than described
The level of second voltage；
Comparing unit, the comparing unit is connected respectively with the normal phase input end and first output terminal, to sentence
Whether the voltage difference of disconnected normal phase input end and the first output terminal is more than the first reference voltage；
Internal resistance drags down unit, and the internal resistance drags down unit and is connected with the grid of the PMOS tube and the NMOS tube, institute
It states internal resistance and drags down unit and be connected with the comparing unit；
Internal resistance drags down unit and drags down function for opening internal resistance when the voltage difference is more than first reference voltage, and
When charging, the internal resistance value of the NMOS tube is dragged down；The internal resistance value of the PMOS tube will be dragged down in electric discharge.
In source electrode driver of the present invention, the operation amplifier unit further includes the first gating module and first
Reference voltage module；The control terminal of first gating module drags down unit with the internal resistance and is connected, first gating module
Grid of two input terminals respectively with the first reference voltage module and the NMOS tube be connected；
During charging, the internal resistance drags down unit and controls first gating module by the first reference voltage module and institute
The gate turn-on of NMOS tube is stated, so as to which the grid voltage of the NMOS tube be drawn high, and then the internal resistance value of the NMOS tube is drawn
It is low.
In source electrode driver of the present invention, the operation amplifier unit further includes the second gating module and second
Reference voltage module；The control terminal of second gating module drags down unit with the internal resistance and is connected, second gating module
Grid of two input terminals respectively with the second reference voltage module and the PMOS tube be connected；
During electric discharge, the internal resistance drags down unit and controls second gating module by the second reference voltage module and institute
The gate turn-on of the PMOS tube is stated, so that the grid voltage of the PMOS tube be dragged down, and then by the internal resistance of the PMOS tube
Value drags down.
A kind of liquid crystal display, including amplifying circuit described in any one of the above embodiments.
Description of the drawings
To describe the technical solutions in the embodiments of the present invention more clearly, make required in being described below to embodiment
Attached drawing is briefly described, it should be apparent that, the accompanying drawings in the following description is only some embodiments of the present invention, for
For those skilled in the art, without creative efforts, it can also be obtained according to these attached drawings other attached
Figure.
Fig. 1 is the structure chart of amplifying circuit provided in an embodiment of the present invention.
Fig. 2 is the partial detailed structure chart of amplifying circuit provided in an embodiment of the present invention.
Fig. 3 is the sequence diagram of amplifying circuit provided in an embodiment of the present invention.
Specific embodiment
Embodiments of the present invention are described below in detail, the example of the embodiment is shown in the drawings, wherein from beginning
Same or similar element is represented to same or similar label eventually or there is same or like element.Below by ginseng
The embodiment for examining attached drawing description is exemplary, and is only used for explaining the present invention, and is not considered as limiting the invention.
In the description of the present invention, it is to be understood that term " " center ", " longitudinal direction ", " transverse direction ", " length ", " width ",
" thickness ", " on ", " under ", "front", "rear", "left", "right", " vertical ", " level ", " top ", " bottom ", " interior ", " outer ", " up time
The orientation or position relationship of the instructions such as pin ", " counterclockwise " are based on orientation shown in the drawings or position relationship, are for only for ease of
The description present invention and simplified description rather than instruction imply that signified device or element must be with specific orientation, Yi Te
Fixed azimuth configuration and operation, therefore be not considered as limiting the invention.In addition, term " first ", " second " are only used for
Purpose is described, and it is not intended that instruction or hint relative importance or the implicit quantity for indicating indicated technical characteristic.
" first " is defined as a result, and the feature of " second " can be expressed or implicitly includes one or more feature.
In description of the invention, " multiple " are meant that two or more, unless otherwise specifically defined.
In the description of the present invention, it is necessary to illustrate, unless otherwise clearly defined and limited, term " installation ", " phase
Even ", " connection " should be interpreted broadly, for example, it may be being fixedly connected or being detachably connected or be integrally connected；It can
To be mechanical connection or electrical connection or can mutually communicate；It can be directly connected, it can also be by between intermediary
It connects connected, can be the interaction relationship of connection inside two elements or two elements.For the ordinary skill of this field
For personnel, the concrete meaning of above-mentioned term in the present invention can be understood as the case may be.
In the present invention, unless otherwise clearly defined and limited, fisrt feature second feature it " on " or it " under "
It can be contacted directly including the first and second features, it is not to contact directly but pass through it that can also include the first and second features
Between other characterisation contact.Moreover, fisrt feature second feature " on ", " top " and " above " to include first special
Sign is directly over second feature and oblique upper or is merely representative of fisrt feature level height higher than second feature.Fisrt feature exists
Second feature " under ", " lower section " and " following " include fisrt feature immediately below second feature and obliquely downward or be merely representative of
Fisrt feature level height is less than second feature.
Following disclosure provides many different embodiments or example is used for realizing the different structure of the present invention.In order to
Simplify disclosure of the invention, hereinafter the component and setting of specific examples are described.Certainly, they are merely examples, and
And it is not intended to limit the present invention.In addition, the present invention can in different examples repeat reference numerals and/or reference letter,
This repetition is for purposes of simplicity and clarity, between itself not indicating discussed various embodiments and/or setting
Relation.In addition, the present invention provides various specific techniques and material example, but those of ordinary skill in the art can be with
Recognize the application of other techniques and/or the use of other materials.
Referring to Fig. 1, Fig. 1 is a kind of structure chart of amplifying circuit provided by the invention, applied to liquid crystal display device
Source electrode driver, source electrode driver include multistage amplifying circuit cascade successively, wherein, afterbody amplifying circuit includes：Fortune
It calculates amplifying unit 100, comparing unit 200 and internal resistance and drags down unit 300.
Wherein, the operation amplifier unit 100 include normal phase input end+, inverting input-, the first output end vo ut, driving
Module 105, NMOS tube Q1 and PMOS tube Q2.The drain electrode of NMOS tube Q1 be connected with the source electrode of PMOS tube Q2 and with the first output terminal
Vout connections, the source electrode of the NMOS tube Q1 meet first voltage VAA, and the drain electrode of the PMOS tube Q2 meets second voltage HVAA.It drives
Dynamic model block 105 respectively with normal phase input end+, inverting input-, the grid of PMOS tube Q2 and NMOS tube Q1 be connected, described
The level of one voltage VAA is more than the level of the second voltage HVAA.
Comparing unit 200 is connected respectively with normal phase input end+and the first output end vo ut, with judge normal phase input end+
And first output end vo ut voltage difference whether be more than the first reference voltage.
Internal resistance drags down unit 300 and is connected with the grid of the PMOS tube Q2 and the NMOS tube Q1, and internal resistance drags down unit
300 are connected with the comparing unit 200.Internal resistance drags down unit 300 for when the voltage difference is more than first reference voltage
Shi Kaiqi internal resistances drag down function, and when charging, the internal resistance value of the PMOS tube Q2 is dragged down；It will be by described in electric discharge
The internal resistance value of NMOS tube Q1 drags down.
Specifically, in amplifying circuit of the present invention, operation amplifier unit 100 further include the first gating module 101,
First reference voltage module 103, the second gating module 102, the second reference voltage module 104；First gating module 101
Control terminal drags down unit 300 with the internal resistance and is connected, two input terminals of first gating module 101 respectively with first base
The grid of quasi- voltage module 103 and the NMOS tube Q1 connect；Two input terminals of second gating module 102 respectively with institute
State the second reference voltage module 104 and the grid connection of the PMOS tube Q2；Further, first gating module 101
It is connected with second gating module 102 with the drive module 105.
It refer to Fig. 1, Fig. 3, during charging, internal resistance drags down unit 300 and controls the first gating module 101 by the first reference voltage
The gate turn-on of module 103 and the NMOS tube Q1, so as to by the grid a point voltage highs of the NMOS tube Q1, and then by institute
The internal resistance value for stating NMOS tube Q1 drags down.
During electric discharge, internal resistance drag down unit 300 control the second gating module 102 by the second reference voltage module 104 with it is described
The gate turn-on of PMOS tube Q2, so as to which the grid voltage b points of the PMOS tube Q2 be dragged down, and then will be in the PMOS tube Q2
Resistance value drags down.
Referring to Fig. 2, in some embodiments, the first gating module 101 includes first switch pipe T1 and second
Switch transistor T 2, the input terminal of first switch pipe T1 are connected with the first reference voltage module 103, the second switch pipe T2's
Input terminal is connected with the drive module 105, the output terminal of the first switch pipe T1 and second switch pipe T2 respectively with institute
State the grid connection of NMOS tube Q1；The first switch pipe T1 is opposite with the switching characteristic of the second switch pipe T2.
In some embodiments, the second gating module 102 includes the 3rd switch transistor T 3 and the 4th switch transistor T 4, and described the
The input terminal of three switch transistor Ts 3 is connected with the second reference voltage module 104, the input terminal of the 4th switch transistor T 4 and institute
Drive module 105 is stated to connect, the output terminal of the 3rd switch transistor T 3 and the 4th switch transistor T 4 respectively with the PMOS tube Q2
Grid connection；3rd switch transistor T 3 is opposite with the switching characteristic of the 4th switch transistor T 4.
First switch pipe T1, second switch pipe T2, the 3rd switch transistor T 3 and the 4th switch transistor T 4 control terminal and this is interior
Resistance drags down unit 300 and connects.
In amplifying circuit of the present invention, first reference voltage is grey according to the target of the liquid crystal display device
Rank value setting.First reference voltage and the correlation of the difference of the current gray and target gray scale of liquid crystal display are very strong.
When gray scale variation is smaller, it is impossible to which when reaching the first reference voltage, internal resistance drags down dragging down function and will not opening for unit 300.Work as ash
Rank changes greatly, and has been more than first reference voltage, then internal resistance drag down unit 300 drag down function unlatching.
Wherein, the drive module 105 is similar with the drive module structure of operational amplifier of the prior art, therefore does not go to live in the household of one's in-laws on getting married
It states.
The present invention is by setting the internal resistance to drag down unit 300, and when charging, internal resistance drags down first gating of the control of unit 300
Module 101 by the first reference voltage module 103 with described, the gate turn-on of NMOS tube Q1, so as to passing through first reference voltage
The internal resistance value of the NMOS tube Q1 is dragged down the grid a point voltage highs of the NMOS tube Q1 by module 103；During electric discharge,
Internal resistance drags down unit 300 and the second gating module 102 is controlled to connect the second reference voltage module 104 and the grid of the PMOS tube Q2
It is logical, so as to which the grid voltage b points of the PMOS tube Q2 be dragged down by the second reference voltage module 104, and then by described in
The internal resistance value of PMOS tube Q2 drags down, so as to improve charge/discharge rates.
The present invention also provides a kind of liquid crystal display, including amplifying circuit described in any one of the above embodiments.
LCD assembly provided in an embodiment of the present invention is described in detail above, it is used herein specifically a
Example is set forth the principle of the present invention and embodiment, and the explanation of above example is only intended to help to understand the present invention.
Meanwhile for those skilled in the art, thought according to the invention has change in specific embodiments and applications
Become part, in conclusion this specification content should not be construed as limiting the invention.
Claims (10)
1. a kind of amplifying circuit, the source electrode driver applied to liquid crystal display device, which is characterized in that including：
Operation amplifier unit, including normal phase input end, inverting input, the first output terminal, drive module, PMOS tube and NMOS
Pipe, the drain electrode of the NMOS tube are connected with the source electrode of the PMOS tube and are connected with first output terminal, the NMOS tube
Source electrode connects first voltage, and the drain electrode of the PMOS tube connects second voltage, the drive module respectively with the normal phase input end, institute
The grid connection of inverting input, the PMOS tube and NMOS tube is stated, the level of the first voltage is more than the described second electricity
The level of pressure；
Comparing unit, the comparing unit are connected respectively with the normal phase input end and first output terminal, to judge just
Whether the voltage difference of phase input terminal and the first output terminal is more than the first reference voltage；
Internal resistance drags down unit, and the internal resistance drags down unit and is connected with the grid of the PMOS tube and the NMOS tube, described interior
Resistance drags down unit and is connected with the comparing unit；
Internal resistance drags down unit and drags down function for opening internal resistance when the voltage difference is more than first reference voltage, and is filling
When electric, the internal resistance value of the NMOS tube is dragged down；The internal resistance value of the PMOS tube will be dragged down in electric discharge.
2. amplifying circuit according to claim 1, which is characterized in that the operation amplifier unit further includes the first gating mould
Block and the first reference voltage module；The control terminal of first gating module drags down unit with the internal resistance and is connected, and described
Grid of two input terminals of one gating module respectively with the first reference voltage module and the NMOS tube is connected；
During charging, the internal resistance drag down unit control first gating module by the first reference voltage module with it is described
The gate turn-on of NMOS tube so as to which the grid voltage of the NMOS tube be drawn high, and then the internal resistance value of the NMOS tube is dragged down.
3. amplifying circuit according to claim 2, which is characterized in that the operation amplifier unit further includes the second gating mould
Block and the second reference voltage module；The control terminal of second gating module drags down unit with the internal resistance and is connected, and described
Grid of two input terminals of two gating modules respectively with the second reference voltage module and the PMOS tube is connected；
During electric discharge, the internal resistance drags down unit and controls second gating module by the second reference voltage module and the institute
The gate turn-on of PMOS tube is stated, so as to which the grid voltage of the PMOS tube be dragged down, and then the internal resistance value of the NMOS tube is drawn
It is low.
4. amplifying circuit according to claim 2, which is characterized in that first gating module include first switch pipe with
And second switch pipe, the input terminal of the first switch pipe are connected with the first reference voltage module, the second switch pipe
Input terminal be connected with the drive module, the output terminal of the first switch pipe and second switch pipe respectively with the NMOS
The grid connection of pipe；
The first switch pipe is opposite with the switching characteristic of the second switch pipe.
5. amplifying circuit according to claim 3, which is characterized in that second gating module include the 3rd switching tube with
And the 4th switching tube, the input terminal of the 3rd switching tube are connected with the second reference voltage module, the 4th switching tube
Input terminal be connected with the drive module, the output terminal of the 3rd switching tube and the 4th switching tube respectively with the PMOS
The grid connection of pipe；
3rd switching tube is opposite with the switching characteristic of the 4th switching tube.
6. amplifying circuit according to claim 1, which is characterized in that first reference voltage is according to the liquid crystal display
The target gray scale value setting of device.
7. a kind of source electrode driver, which is characterized in that including multistage amplifying circuit cascade successively, wherein, afterbody amplification
Circuit includes：
Operation amplifier unit, including normal phase input end, inverting input, the first output terminal, drive module, PMOS tube and NMOS
Pipe, the drain electrode of the NMOS tube are connected with the source electrode of the PMOS tube and are connected with first output terminal, the NMOS tube
Source electrode connects first voltage, and the drain electrode of the PMOS tube connects second voltage, the drive module respectively with the normal phase input end, institute
The grid connection more than inverting input, the PMOS tube and NMOS tube is stated, the level of the first voltage is more than described second
The level of voltage；
Comparing unit, the comparing unit are connected respectively with the normal phase input end and first output terminal, to judge just
Whether the voltage difference of phase input terminal and the first output terminal is more than the first reference voltage；
Internal resistance drags down unit, and the internal resistance drags down unit and is connected with the grid of the PMOS tube and the NMOS tube, described interior
Resistance drags down unit and is connected with the comparing unit；
Internal resistance drags down unit and drags down function for opening internal resistance when the voltage difference is more than first reference voltage, and is filling
When electric, the internal resistance value of the NMOS tube is dragged down；The internal resistance value of the PMOS tube will be dragged down in electric discharge.
8. source electrode driver according to claim 7, which is characterized in that the operation amplifier unit further includes the first gating
Module and the first reference voltage module；The control terminal of first gating module drags down unit with the internal resistance and is connected, described
Grid of two input terminals of the first gating module respectively with the first reference voltage module and the NMOS tube is connected；
During charging, the internal resistance drag down unit control first gating module by the first reference voltage module with it is described
The gate turn-on of NMOS tube so as to which the grid voltage of the NMOS tube be drawn high, and then the internal resistance value of the NMOS tube is dragged down.
9. source electrode driver according to claim 8, which is characterized in that the operation amplifier unit further includes the second gating
Module and the second reference voltage module；The control terminal of second gating module drags down unit with the internal resistance and is connected, described
Grid of two input terminals of the second gating module respectively with the second reference voltage module and the PMOS tube is connected；
During electric discharge, the internal resistance drags down unit and controls second gating module by the second reference voltage module and the institute
The gate turn-on of PMOS tube is stated, so as to which the grid voltage of the PMOS tube be dragged down, and then the internal resistance value of the PMOS tube is drawn
It is low.
10. a kind of liquid crystal display, including claim 1-9 any one of them amplifying circuits.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201810063226.4A CN108053799A (en) | 2018-01-23 | 2018-01-23 | Amplifying circuit, source electrode driver and liquid crystal display |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201810063226.4A CN108053799A (en) | 2018-01-23 | 2018-01-23 | Amplifying circuit, source electrode driver and liquid crystal display |
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| CN108053799A true CN108053799A (en) | 2018-05-18 |
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| CN201810063226.4A Pending CN108053799A (en) | 2018-01-23 | 2018-01-23 | Amplifying circuit, source electrode driver and liquid crystal display |
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111681612A (en) * | 2020-06-24 | 2020-09-18 | 武汉华星光电技术有限公司 | Data driving circuit and display panel |
| CN112201212A (en) * | 2020-10-13 | 2021-01-08 | 深圳市华星光电半导体显示技术有限公司 | Display device and driving method thereof |
| TWI746246B (en) * | 2019-11-20 | 2021-11-11 | 聯詠科技股份有限公司 | Electronic device and display driving chip |
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| US11176861B2 (en) | 2019-11-20 | 2021-11-16 | Novatek Microelectronics Corp. | Electronic device and display driver chip |
| CN111681612A (en) * | 2020-06-24 | 2020-09-18 | 武汉华星光电技术有限公司 | Data driving circuit and display panel |
| CN112201212A (en) * | 2020-10-13 | 2021-01-08 | 深圳市华星光电半导体显示技术有限公司 | Display device and driving method thereof |
| CN112201212B (en) * | 2020-10-13 | 2022-04-01 | 深圳市华星光电半导体显示技术有限公司 | Display device and driving method thereof |
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Application publication date: 20180518 |