CN108028689B - Signal processing method, device and system - Google Patents

Signal processing method, device and system Download PDF

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CN108028689B
CN108028689B CN201580081138.1A CN201580081138A CN108028689B CN 108028689 B CN108028689 B CN 108028689B CN 201580081138 A CN201580081138 A CN 201580081138A CN 108028689 B CN108028689 B CN 108028689B
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power control
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control factor
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CN108028689A (en
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王威扬
米罗斯拉夫·赫克尔德拉
翁贝托·斯帕尼奥利尼
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Huawei Technologies Co Ltd
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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B7/00Radio transmission systems, i.e. using radiation field
    • H04B7/02Diversity systems; Multi-antenna system, i.e. transmission or reception using multiple antennas
    • H04B7/04Diversity systems; Multi-antenna system, i.e. transmission or reception using multiple antennas using two or more spaced independent antennas
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    • Y02DCLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
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    • Y02D30/70Reducing energy consumption in communication networks in wireless communication networks

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Abstract

The embodiment of the invention provides a signal processing method, a device and a system, wherein the method comprises the following steps: a sending terminal multiplies a signal subjected to lattice reduction processing by a power control factor corresponding to a port for sending the signal; and the transmitting end multiplies the signal multiplied by the corresponding power control factor by a linear precoding matrix to obtain an output signal of each port after linear precoding processing. By adopting the signal processing method and device provided by the embodiment of the invention, far-end crosstalk generated between multiple paths of signals accessed by the DSLAM can be eliminated through the linear coding control matrix, and the power amplification effect of the linear precoding matrix on the signals of each port before lattice reduction processing is limited through the corresponding power control factor, so that the transmitting end can allocate the corresponding power control factor to each port according to system configuration, and the signal-to-noise ratio and the transmission rate of the signals are improved.

Description

Signal processing method, device and system
Technical Field
Embodiments of the present invention relate to communications technologies, and in particular, to a method, an apparatus, and a system for processing a signal.
Background
Since a Digital Subscriber Line (DSL) copper wire access scheme can make full use of telephone Subscriber loops that have been already laid in large numbers, and reduce the network access investment cost, it is popular among users to provide internet access at a higher rate using copper wires. In order to meet the increasing demand of users for the access network speed, the international telecommunication union sets the next generation copper wire bandwidth access technical standard g.fast. As the frequency band used by the g.fast is wider and wider, the far-end crosstalk generated between multiple signals accessed by a Digital Subscriber Line Access Multiplexer (DSLAM) seriously affects the transmission performance of the Line. At present, a precoding method based on lattice reduction is proposed in the industry, which precodes an input signal in a data downlink process to eliminate far-end crosstalk. However, the pre-coding process will amplify the input signal, so in practical DSL systems, further processing of the pre-coded input signal is required to bring the power of the output signal within the limits defined by the system.
In the prior art, all signals are multiplied by the same power control factor on the basis of precoding input signals of all ports, and the received signals are multiplied by the reciprocal of the power control factor respectively at a receiving end to limit the power of output signals.
However, with the method in the prior art, the loss of the signal-to-noise ratio is large, and the signal transmission rate is affected.
Disclosure of Invention
The embodiment of the invention provides a signal processing method, a signal processing device and a signal processing system, which are used for solving the problem of large signal-to-noise ratio loss when the power of an output signal is limited in the prior art.
In a first aspect, the present invention provides a signal processing method, including:
a sending terminal multiplies a signal subjected to lattice reduction processing by a power control factor corresponding to a port for sending the signal;
and the transmitting end multiplies the signal multiplied by the corresponding power control factor by a linear precoding matrix to obtain an output signal of each port after linear precoding processing.
With reference to the first aspect, in a first possible implementation manner of the first aspect, before the step of multiplying the signal subjected to lattice reduction processing by a power control factor corresponding to a port through which the signal is transmitted, the method further includes:
and the transmitting end determines the power control factor corresponding to each port according to the power, the noise, the Shannon difference and the weight of each port of the original input signal of each port.
With reference to the first possible implementation manner of the first aspect, in a second possible implementation manner of the first aspect, the obtaining, by the sending end, a power control factor corresponding to each port according to the power of the original input signal of each port, noise, shannon difference, and a weight of each port includes:
according to
Figure GPA0000240500490000041
And
Figure GPA0000240500490000042
Figure GPA0000240500490000043
determining a power control factor corresponding to each port;
wherein x isiRepresenting the original input signal of the i-th port, giRepresents the Power control factor, Power (x), corresponding to the ith porti) Represents the power of the original input signal of the ith port; power (n)i) Representing the background noise of the ith port; Γ represents the shannon gap; w is aiRepresenting a weight value assigned to the ith port; τ represents a modulus value of the modulus operation; m isijRepresenting the i multiplied by j elements in the matrix obtained by P G T, wherein T represents a lattice reduction matrix, G represents a power control factor matrix, and P represents a linear precoding matrix; g is a diagonal matrix with diagonal elements G1、g2....gLAnd the power control factor corresponding to each port is represented.
With reference to the first aspect, according to the second possible implementation manner of the first aspect, in a third possible implementation manner of the first aspect, the lattice reduction matrix is a per-unit modulus matrix.
With reference to the first aspect, according to any one of the first to third possible implementation manners of the first aspect, in a fourth possible implementation manner of the first aspect, before the step of multiplying the signal of each port after the lattice reduction processing by the power control factor corresponding to each port by the sending end, the method further includes:
multiplying the original input signals of each port by the lattice reduction inverse matrix by the sending end;
the sending terminal performs a modulus operation on the signals of the ports multiplied by the lattice reduction inverse matrix;
and the sending end carries out the lattice reduction processing on the signals of the ports after the modulus operation.
In a second aspect, the present invention provides a signal processing apparatus, including:
the power control module is used for multiplying the signal subjected to lattice reduction processing by a power control factor corresponding to a port for sending the signal;
and the linear precoding module is used for multiplying the signal multiplied by the corresponding power control factor by a linear precoding matrix to obtain an output signal of each port after linear precoding processing.
With reference to the second aspect, in a first possible implementation manner of the second aspect, the method further includes:
and the determining module is used for determining the power control factor corresponding to each port according to the power, the noise, the shannon difference and the weight of each port of the original input signal of each port.
With reference to the second aspect, according to the first possible implementation manner of the second aspect, in a second possible implementation manner of the second aspect, the determining module is specifically configured to:
according to
Figure GPA0000240500490000051
And
Figure GPA0000240500490000052
Figure GPA0000240500490000053
determining a power control factor corresponding to each port;
wherein x isiRepresenting the original input signal of the i-th port, giRepresents the Power control factor, Power (x), corresponding to the ith porti) Represents the power of the original input signal of the ith port; power (n)i) Representing the background noise of the ith port; Γ represents the shannon gap; w is aiRepresenting a weight value assigned to the ith port; τ represents a modulus value of a modulo operation on the input signal before the lattice reduction processing; m isijRepresenting the i multiplied by j elements in the matrix obtained by P G T, wherein T represents a lattice reduction matrix, G represents a power control factor matrix, and P represents a linear precoding matrix; g is a diagonal matrix with diagonal elements G1、g2....gLAnd the power control factor corresponding to each port is represented.
With reference to the second aspect, according to the first or second possible implementation manner of the second aspect, in a third possible implementation manner of the first aspect, the method further includes:
the lattice reduction inverse processing module is used for multiplying the original input signals of all the ports by a lattice reduction inverse matrix;
the modulus taking module is used for carrying out modulus taking operation on the signals of the ports multiplied by the lattice reduction inverse matrix;
and the lattice reduction processing module is used for carrying out lattice reduction processing on the signals of the ports after the modulus operation.
In a third aspect, an embodiment of the present invention provides a signal processing apparatus, including:
the processor is used for multiplying the signal subjected to the lattice reduction processing by a power control factor corresponding to the signal to be transmitted; the power control module is further configured to multiply the signal multiplied by the corresponding power control factor by a linear precoding matrix to obtain an output signal of each port after linear precoding processing;
a transmitter for transmitting the output signal.
In a fourth aspect, an embodiment of the present invention provides a signal processing system, including:
the signal processing apparatus of the second aspect, and a receiving end, where the receiving end is configured to receive the output signal sent by the signal processing apparatus.
According to the signal processing method, the device and the system provided by the embodiment of the invention, the signal processed by the lattice reduction is multiplied by the power control factor corresponding to the port for sending the signal by the sending end; and the transmitting end multiplies the signal multiplied by the corresponding power control factor by a linear precoding matrix to obtain an output signal of each port after linear precoding processing. By adopting the signal processing method provided by the embodiment of the present invention, the far-end crosstalk generated between the multiple signals accessed by the DSLAM can be eliminated by the linear coding control matrix, and the power amplification effect of the linear precoding matrix on the input signal of each port before the lattice reduction processing is limited by the power control factor corresponding to each port, so that the transmitting end can allocate a corresponding power control factor to each port according to the system configuration, thereby improving the signal-to-noise ratio and the transmission rate of the signal.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings needed to be used in the description of the embodiments or the prior art will be briefly introduced below, and it is obvious that the drawings in the following description are some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to these drawings without creative efforts.
Fig. 1 is a schematic diagram of a data downlink scenario in a DSL copper line access scheme;
FIG. 2 is a schematic flow chart of a signal processing method according to a first embodiment of the present invention;
FIG. 3 is a schematic diagram of a signal processing procedure according to a first embodiment of the signal processing method of the present invention;
FIG. 4 is a schematic diagram of a signal processing procedure according to a second embodiment of the signal processing method of the present invention;
FIG. 5 is a schematic structural diagram of a signal processing apparatus according to a first embodiment of the present invention;
FIG. 6 is a schematic structural diagram of a second signal processing apparatus according to an embodiment of the present invention;
fig. 7 is a schematic structural diagram of a signal processing system according to a first embodiment of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are some, but not all, embodiments of the present invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
Since a Digital Subscriber Line (DSL) copper wire access scheme can make full use of telephone Subscriber loops that have been already laid in large numbers, and reduce the network access investment cost, it is popular among users to provide internet access at a higher rate using copper wires. In order to meet the increasing demand of users for the access network speed, the international telecommunication union sets the next generation copper wire bandwidth access technical standard g.fast. As the frequency band used by the g.fast is wider and wider, the far-end crosstalk generated between multiple signals accessed by a Digital Subscriber Line Access Multiplexer (DSLAM) seriously affects the transmission performance of the Line. At present, a precoding method based on lattice reduction is proposed in the industry, which precodes an input signal in a data downlink process to eliminate far-end crosstalk. However, the pre-coding process will amplify the input signal, so in practical DSL systems, further processing of the pre-coded input signal is required to bring the power of the output signal within the limits defined by the system. The prior art multiplies all signals by the same power control factor g on the basis of precoding the input signals of all ports to define the power of the output signal. However, with the method in the prior art, the loss of the signal-to-noise ratio is large, and the signal transmission rate is affected.
Therefore, the present invention provides a signal processing method, which eliminates the influence of far-end crosstalk on signal transmission of each port through a linear precoding matrix, and controls the amplification of the input signal of each port by the linear precoding matrix through a power control factor corresponding to each port, so that the power of the output signal of each port after linear precoding processing is consistent with the power of the input signal before lattice reduction processing.
The technical solution of the present invention will be described in detail below with specific examples. Several specific embodiments described below may be combined with each other, and details of the same or similar concepts or processes may not be repeated in some embodiments.
Fig. 1 is a schematic diagram of a data downlink scenario in a DSL copper line access scheme. Fig. 2 is a flowchart illustrating a signal processing method according to a first embodiment of the present invention. Referring to fig. 1 and fig. 2, an execution main body according to a first embodiment of the present invention is a sending end, and a signal processing method according to the first embodiment of the present invention is as follows:
s101: and the sending terminal multiplies the signal subjected to lattice reduction processing by a power control factor corresponding to a port for sending the signal.
Specifically, the sending end may be a digital subscriber line access multiplexer DSLAM or a wireless network access device, which is not limited herein. The power control factor corresponding to each port may be multiplied by the signal of each port after the lattice reduction processing in a power control factor matrix manner. The process of performing the lattice reduction processing on the signal is to multiply by the lattice reduction matrix T.
S102: and the transmitting end multiplies the signals multiplied by the power control factors corresponding to the ports by a linear precoding matrix to obtain output signals of the ports after linear precoding processing.
Fig. 3 is a schematic diagram of a signal processing process according to a first embodiment of the signal processing method of the present invention. Referring to fig. 3, in a signal transmission process, the transmitting end multiplies a signal before lattice reduction processing by a lattice reduction matrix T, the power control factor matrix G, and the linear precoding matrix P to obtain an output signal, and transmits the output signal to a receiving end through a channel. The power control factor matrix G is located between the lattice reduction matrix T and the linear precoding matrix P. Specifically, the power control factor matrix G is represented as a diagonal matrix in a frequency domain model, and diagonal elements of the diagonal matrix represent power control factors corresponding to the ports, and the power control factors may be the same or different. In a practical system, the power control matrix G may be three independent matrix modules with the lattice-reduction matrix T before it and the linear precoding matrix P after it, or the power control matrix G may be merged with the lattice-reduction matrix T, or the power control matrix G may be merged with the linear precoding matrix P; or, the power control matrix G is merged with the lattice reduction matrix T and the linear precoding matrix P.
And the receiving end receives the output signals multiplied by the lattice reduction matrix T, the power control factor matrix G and the linear precoding matrix P, and multiplies the received signals by the reciprocal of the power control factor corresponding to each port to restore the signals sent by the sending end.
Specifically, the linear precoding matrix P is multiplied by the channel matrix H to form a diagonal matrix, so as to eliminate far-end crosstalk generated between multiple channels of signals accessed by the DSLAM.
In the signal processing method provided by the embodiment of the present invention, signals of each port after lattice reduction processing by a sending terminal are multiplied by power control factors corresponding to each port; and the transmitting end multiplies the signals multiplied by the power control factors corresponding to the ports by a linear precoding matrix to obtain output signals of the ports after linear precoding processing. By adopting the signal processing method provided by the embodiment of the present invention, the far-end crosstalk generated between the multiple signals accessed by the DSLAM can be eliminated by the linear coding control matrix, and the power amplification effect of the linear precoding matrix on the input signal of each port before the lattice reduction processing is limited by the power control factor corresponding to each port, so that the transmitting end can allocate a corresponding power control factor to each port according to the system configuration, thereby improving the signal-to-noise ratio and the transmission rate of the signal.
Meanwhile, the signal processing method provided by the embodiment of the invention can allocate different power control factors to different ports under the condition of using the lattice reduction precoding method, thereby providing one more degree of freedom and optimizing power allocation and rate allocation. When part or all of the ports are in a working state, the signal processing method provided in the embodiment of the present invention may adjust the actual transmission power of the output signal of each port by changing the power control factor corresponding to each port on the premise that the lattice reduction matrix T and the linear precoding matrix P are not updated.
Further, in order to determine the power control factor corresponding to each port, and optimize power allocation and rate allocation, before the sending end multiplies the signal after the lattice reduction processing by the power control factor corresponding to the port sending the signal, the method further includes:
and the transmitting end determines the power control factor corresponding to each port according to the power, the noise, the Shannon difference and the weight of each port of the original input signal of each port.
Specifically, the obtaining, by the sending end, the power control factor corresponding to each port according to the power, the noise, the shannon gap of the original input signal of each port and the weight of each port includes:
according to
Figure GPA0000240500490000101
And constraint conditions
Figure GPA0000240500490000102
Figure GPA0000240500490000103
Determining a power control factor corresponding to each port;
wherein x isiRepresenting the original input signal of the i-th port, giRepresents the Power control factor, Power (x), corresponding to the ith porti) Represents the power of the original input signal of the ith port; power (n)i) Representing the background noise of the ith port; Γ represents the shannon gap; w is aiRepresenting a weight value assigned to the ith port; τ represents a modulus value of a modulo operation on the input signal before the lattice reduction processing; m isijRepresenting the i multiplied by j elements in the matrix obtained by P G T, wherein T represents a lattice reduction matrix, G represents a power control factor matrix, and P represents a linear precoding matrix; g is a diagonal matrix with diagonal elements G1、g2...gLAnd the power control factor corresponding to each port is represented.
Figure GPA0000240500490000106
Is composed of
Figure GPA0000240500490000107
Represents a digital domain value of the power of the original input signal of said ith port.
In particular, the amount of the solvent to be used,
Figure GPA0000240500490000104
Figure GPA0000240500490000105
where denotes the conjugation of the complex value.
In the above method, formula (1) takes the weighted sum of the bit loading of each port as the objective function. Solving the maximum value of the objective function under the condition of meeting the constraint condition by using a symbolic geometric programming method,thus obtaining g1、g2....gLAnd g is given1、g2....gLThe values of (a) and (b) are respectively used as power control factors corresponding to the ports to regulate the power of the input signals of the ports.
Further, in order to ensure that the signal received by the receiving end is consistent with the signal sent by the port corresponding to the sending end, before the signal of each port after lattice reduction processing by the sending end is multiplied by the power control factor corresponding to each port, the method further includes:
multiplying the original input signals of the ports by a lattice reduction inverse matrix by the sending end;
the sending terminal performs a modular operation on the signals of the ports multiplied by the inverse lattice reduction matrix;
the sending terminal carries out the lattice reduction processing on the signals of the ports after the modulus taking operation; that is, the signal of each port after the modulo operation by the transmitting end is multiplied by the lattice reduction matrix T.
Specifically, the lattice reduction matrix T is a per-unit module matrix, that is, each element T in the lattice reduction matrix TijIs an integer, and the inverse lattice-reduction matrix T-1The real and imaginary parts of each element of (a) are also integers. T-1=T-1*T=E。
And the original input signals of the ports are multiplied by the inverse lattice reduction matrix by the sending end, so as to restore the effect of the lattice reduction matrix on the original input signals of the ports. The modulus operation is used for eliminating the lattice reduction inverse matrix T-1The amplification that will be produced on the original input signal power.
In particular, the modulus-taking operation ΓτFor limiting the power of the original input signal to a range set by a system. Where τ represents a modulus value of the modulus operation. Let it be assumed that F is subjected to said modulo operationτThe signals of the rear ports are uniformly distributed in a square
Figure GPA0000240500490000111
And is subjected to said modulus-taking operation ΓτThe signals of the latter ports are uncorrelated random variables, and then the modulo operation Γ is performedτThe power of the signal of each subsequent port is
Figure GPA0000240500490000112
The constraint conditions can be obtained
Figure GPA0000240500490000113
Further, the transmitting end passes through the inverse matrix T of the lattice reduction-1Said modulo operation ΓτAfter the lattice reduction matrix T processes the original input signal, integer multiples of τ are added to the real part and the imaginary part of the original input signal, so that the receiving end needs to perform corresponding modulo operation Γ on the received signal in order to recover the original input signalτTo remove integer multiples of τ of the real and imaginary parts of the output signal.
Specifically, the receiving end multiplies the received signal by the reciprocal of the power control factor corresponding to each port, which is completed before the modulo operation.
Fig. 4 is a schematic diagram of a signal processing process according to a second embodiment of the signal processing method of the present invention. Referring to fig. 4, before performing the modulus operation, the receiving end performs Frequency domain equalization (FEQ, denoted by F) processing on the received signal. And multiplying the linear precoding matrix P and the channel matrix FH after frequency domain equalization into a diagonal matrix so as to eliminate far-end crosstalk generated between the multiple paths of signals accessed by the DSLAM.
Specifically, the receiving end may multiply the received signal by the reciprocal of the power control factor before the received signal is subjected to the frequency domain equalization, may multiply the received signal by the reciprocal of the power control factor after the received signal is subjected to the frequency domain equalization, or may combine the processes of performing the frequency domain equalization and multiplying the received signal by the power control factor. And are not limited herein.
Fig. 5 is a schematic structural diagram of a signal processing apparatus according to a first embodiment of the invention. Referring to fig. 5, a signal processing apparatus according to an embodiment of the present invention at least includes: a power control module 110 and a linear precoding module 120.
The power control module 110 is configured to multiply the signal of each port after lattice reduction processing by a power control factor corresponding to each port.
The linear precoding module 120 is configured to multiply the signal multiplied by the power control factor corresponding to each port by a linear precoding matrix to obtain an output signal of each port after linear precoding processing.
Specifically, the power control module 110 may be an application module for implementing power control, or may be a power control electronic device; the linear precoding module 120 may be an application module for implementing linear precoding, or may be a linear precoding electronic device.
In the signal processing apparatus provided in the first embodiment of the present invention, the power control module 110 multiplies the signal subjected to lattice reduction processing by the power control factor corresponding to the port that transmits the signal, and the linear precoding module 120 multiplies the signal multiplied by the corresponding power control factor by the linear precoding matrix to obtain the output signal of each port subjected to linear precoding processing. By adopting the signal processing device provided by the embodiment of the present invention, the far-end crosstalk generated between the multiple paths of signals accessed by the DSLAM can be eliminated through the linear coding control matrix, and the power amplification effect of the linear precoding matrix on the input signal of each port before the lattice reduction processing is limited through the power control factor corresponding to each port, so that the transmitting end can allocate a corresponding power control factor to each port according to the system configuration, thereby improving the signal-to-noise ratio and the transmission rate of the signal.
Further, in order to determine the power control factor corresponding to each port, and optimize power allocation and rate allocation, the apparatus further includes:
a determining module 130, configured to determine a power control factor corresponding to each port according to the power, noise, shannon difference of the original input signal of each port, and a weight of each port.
Specifically, the manner of determining the power control factor corresponding to each port by the determining module 130 is the same as that of the method embodiment provided in the first embodiment, and is not described herein again.
Further, in order to ensure that the signal received by the receiving end is consistent with the original signal sent by each corresponding port, the apparatus further includes:
a lattice-reduction inverse processing module 140, configured to multiply the original input signal of each port by a lattice-reduction inverse matrix;
a modulus module 150, configured to perform a modulus operation on the signal of each port multiplied by the inverse lattice reduction matrix;
a lattice reduction processing module 160, configured to perform the lattice reduction processing on the signals of the ports after the modulo operation.
The apparatus provided in the first embodiment of the present invention may be used to implement the technical solution of the method embodiment provided in the first embodiment of the present invention, and the implementation principle and the technical effect are similar, which are not described herein again.
Fig. 6 is a schematic structural diagram of a second embodiment of the signal processing apparatus according to the present invention. Referring to fig. 6, the signal processing apparatus according to the second embodiment of the present invention at least includes a processor 210 and a transmitter 220.
The processor 210 is configured to multiply the signal after the lattice reduction processing by a power control factor corresponding to a port that transmits the signal; and the signal multiplied by the corresponding power control factor is multiplied by a linear precoding matrix to obtain an output signal of each port after linear precoding processing.
The transmitter 220 is used to send out the output signal.
In the signal processing apparatus according to the second embodiment of the present invention, the processor 210 multiplies the signal subjected to lattice reduction processing by the power control factor corresponding to the port that transmits the signal, and multiplies the signal multiplied by the corresponding power control factor by the linear precoding matrix to obtain the output signal of each port subjected to linear precoding processing. By adopting the signal processing device provided by the embodiment of the present invention, the far-end crosstalk generated between the multiple paths of signals accessed by the DSLAM can be eliminated through the linear coding control matrix, and the power amplification effect of the linear precoding matrix on the signals of the ports before the lattice reduction processing is limited through the power control factors corresponding to the ports, so that the transmitting end can allocate corresponding power control factors to the ports according to the system configuration, thereby improving the signal-to-noise ratio and the transmission rate of the signals.
The signal processing apparatus provided in the second embodiment of the present invention may be used to implement the technical solution of the method embodiment provided in the first embodiment of the present invention, and the implementation principle and the technical effect are similar, which are not described herein again.
Fig. 7 is a schematic structural diagram of a signal processing system according to a first embodiment of the present invention. Referring to fig. 7, the signal processing system according to the embodiment of the present invention includes a signal processing apparatus 310 according to the first embodiment of the present invention and a receiving end 320, where the receiving end 320 is configured to receive the output signal sent by the signal processing apparatus 310. The signal processing system 310 is used for executing the technical solution of the method embodiment provided in the first embodiment of the present invention, and the implementation principle and the technical effect are similar, which are not described herein again.
The signal processing method and the device provided by the embodiment of the invention can also be used for wireless communication, and different power control factors are distributed to different antennas at a sending end. The implementation principle is similar, and the detailed description is omitted.
Those of ordinary skill in the art will understand that: all or a portion of the steps of implementing the above-described method embodiments may be performed by hardware associated with program instructions. The program may be stored in a readable storage medium of a computer, a mobile phone or other portable devices. When executed, the program performs steps comprising the method embodiments described above; and the aforementioned storage medium includes: various media that can store program codes, such as ROM, RAM, magnetic or optical disks.
Finally, it should be noted that: the above embodiments are only used to illustrate the technical solution of the present invention, and not to limit the same; while the invention has been described in detail and with reference to the foregoing embodiments, it will be understood by those skilled in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some or all of the technical features may be equivalently replaced; and the modifications or the substitutions do not make the essence of the corresponding technical solutions depart from the scope of the technical solutions of the embodiments of the present invention.

Claims (7)

1. A signal processing method, comprising:
a sending terminal multiplies a signal subjected to lattice reduction processing by a power control factor corresponding to a port for sending the signal;
the transmitting end multiplies the signal multiplied by the corresponding power control factor by a linear precoding matrix to obtain an output signal of each port after linear precoding processing;
before the sending terminal multiplies the signal after the lattice reduction processing by the power control factor corresponding to the port sending the signal, the method further includes:
multiplying the original input signals of the ports by a lattice reduction inverse matrix by the sending end;
the sending terminal performs a modular operation on the signals of the ports multiplied by the inverse lattice reduction matrix;
the sending terminal carries out the lattice reduction processing on the signals of the ports after the modulus taking operation;
before the sending terminal multiplies the signal after the lattice reduction processing by the power control factor corresponding to the port sending the signal, the method further includes:
and the transmitting end determines the power control factor corresponding to each port according to the power, the noise, the Shannon difference and the weight of each port of the original input signal of each port.
2. The method of claim 1, wherein the obtaining, by the sending end, the power control factor corresponding to each port according to the power, the noise, the shannon difference and the weight of each port of the original input signal of each port comprises:
according to
Figure FDA0002748427670000011
And
Figure FDA0002748427670000012
Figure FDA0002748427670000013
determining a power control factor corresponding to the port;
wherein x isiRepresenting the original input signal of the i-th port, giRepresents the Power control factor, Power (x), corresponding to the ith porti) Represents the power of the original input signal of the ith port; power (n)i) Representing the background noise of the ith port; Γ represents the shannon gap; w is aiRepresenting a weight value assigned to the ith port; τ represents a modulus value of a modulo operation on the input signal before the lattice reduction processing; m isijRepresenting the i multiplied by j elements in the matrix obtained by P G T, wherein T represents a lattice reduction matrix, G represents a power control factor matrix, and P represents a linear precoding matrix; g is a diagonal matrix with diagonal elements G1、g2…gLAnd the power control factor corresponding to each port is represented.
3. The method according to claim 2, wherein the lattice reduction matrix is a per-unit modulus matrix.
4. A signal processing apparatus, characterized by comprising:
the power control module is used for multiplying the signal subjected to lattice reduction processing by a power control factor corresponding to a port for sending the signal;
the linear precoding module is used for multiplying the signal multiplied by the corresponding power control factor by a linear precoding matrix to obtain an output signal of each port after linear precoding processing;
further comprising:
the lattice reduction inverse processing module is used for multiplying the original input signals of all the ports by a lattice reduction inverse matrix;
the modulus taking module is used for carrying out modulus taking operation on the signals of the ports after the signals are multiplied by the lattice reduction inverse matrix;
the lattice reduction processing module is used for carrying out lattice reduction processing on the signals of the ports after the modulus operation;
and the determining module is used for determining the power control factor corresponding to each port according to the power, the noise, the shannon difference and the weight of each port of the original input signal of each port.
5. The apparatus of claim 4, wherein the determining module is specifically configured to:
according to
Figure FDA0002748427670000021
And
Figure FDA0002748427670000022
Figure FDA0002748427670000023
determining a power control factor corresponding to each port;
wherein x isiRepresenting the original input signal of the i-th port, giRepresents the Power control factor, Power (x), corresponding to the ith porti) Represents the power of the original input signal of the ith port; power (n)i) Representing the background noise of the ith port; Γ represents the shannon gap; w is aiRepresenting a weight value assigned to the ith port; τ represents a modulus value of a modulo operation on the input signal before the lattice reduction processing; m isijRepresenting the i multiplied by j elements in the matrix obtained by P G T, wherein T represents a lattice reduction matrix, G represents a power control factor matrix, and P represents a linear precoding matrix; g is a diagonal matrix with diagonal elements G1、g2…gLAnd the power control factor corresponding to each port is represented.
6. A signal processing apparatus, characterized by comprising:
the processor is used for multiplying the signals of the ports after the lattice reduction processing by the power control factors corresponding to the ports; the linear precoding matrix is used for multiplying the signals multiplied by the power control factors corresponding to the ports by a linear precoding matrix to obtain output signals of the ports after linear precoding processing;
a transmitter for transmitting the output signal;
the processor is further configured to multiply an original input signal of each of the ports by a lattice reduction inverse matrix; performing a modulus operation on the signals of the ports multiplied by the lattice reduction inverse matrix; carrying out the lattice reduction processing on the signals of the ports after the modulus operation; and determining the power control factor corresponding to each port according to the power, the noise, the Shannon gap of the original input signal of each port and the weight of each port.
7. A signal processing system, comprising:
the signal processing apparatus according to any one of claims 4 to 5, and a receiving end, wherein the receiving end is configured to receive the output signal sent by the signal processing apparatus.
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