CN108028285A - 隧道势垒肖特基 - Google Patents
隧道势垒肖特基 Download PDFInfo
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- CN108028285A CN108028285A CN201680055297.9A CN201680055297A CN108028285A CN 108028285 A CN108028285 A CN 108028285A CN 201680055297 A CN201680055297 A CN 201680055297A CN 108028285 A CN108028285 A CN 108028285A
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- 230000004888 barrier function Effects 0.000 title claims abstract description 121
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 claims abstract description 70
- 239000004065 semiconductor Substances 0.000 claims abstract description 53
- 229910002601 GaN Inorganic materials 0.000 claims abstract description 50
- 229910052751 metal Inorganic materials 0.000 claims abstract description 42
- 239000002184 metal Substances 0.000 claims abstract description 42
- 229910052782 aluminium Inorganic materials 0.000 claims abstract description 33
- 239000004411 aluminium Substances 0.000 claims abstract description 32
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims abstract description 32
- 239000000758 substrate Substances 0.000 claims abstract description 27
- 239000000956 alloy Substances 0.000 claims abstract description 10
- 229910045601 alloy Inorganic materials 0.000 claims abstract description 10
- 238000005468 ion implantation Methods 0.000 claims description 17
- 238000002513 implantation Methods 0.000 claims description 14
- 238000000034 method Methods 0.000 claims description 14
- 150000004767 nitrides Chemical class 0.000 claims description 10
- 238000004519 manufacturing process Methods 0.000 claims description 7
- 238000005036 potential barrier Methods 0.000 description 17
- 238000013461 design Methods 0.000 description 10
- PIGFYZPCRLYGLF-UHFFFAOYSA-N Aluminum nitride Chemical compound [Al]#N PIGFYZPCRLYGLF-UHFFFAOYSA-N 0.000 description 7
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 6
- BASFCYQUMIYNBI-UHFFFAOYSA-N platinum Chemical compound [Pt] BASFCYQUMIYNBI-UHFFFAOYSA-N 0.000 description 6
- 230000009467 reduction Effects 0.000 description 6
- 229910017083 AlN Inorganic materials 0.000 description 4
- 230000015572 biosynthetic process Effects 0.000 description 4
- 238000010586 diagram Methods 0.000 description 4
- 230000005611 electricity Effects 0.000 description 4
- 230000005684 electric field Effects 0.000 description 3
- 230000001360 synchronised effect Effects 0.000 description 3
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 2
- PZNSFCLAULLKQX-UHFFFAOYSA-N Boron nitride Chemical compound N#B PZNSFCLAULLKQX-UHFFFAOYSA-N 0.000 description 2
- NWAIGJYBQQYSPW-UHFFFAOYSA-N azanylidyneindigane Chemical compound [In]#N NWAIGJYBQQYSPW-UHFFFAOYSA-N 0.000 description 2
- 230000000903 blocking effect Effects 0.000 description 2
- 238000000605 extraction Methods 0.000 description 2
- 230000006870 function Effects 0.000 description 2
- 229910052738 indium Inorganic materials 0.000 description 2
- 239000011777 magnesium Substances 0.000 description 2
- 238000005259 measurement Methods 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 229910052759 nickel Inorganic materials 0.000 description 2
- 229910052697 platinum Inorganic materials 0.000 description 2
- 230000008569 process Effects 0.000 description 2
- 239000010936 titanium Substances 0.000 description 2
- XEEYBQQBJWHFJM-UHFFFAOYSA-N Iron Chemical compound [Fe] XEEYBQQBJWHFJM-UHFFFAOYSA-N 0.000 description 1
- FYYHWMGAXLPEAU-UHFFFAOYSA-N Magnesium Chemical compound [Mg] FYYHWMGAXLPEAU-UHFFFAOYSA-N 0.000 description 1
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 1
- 238000009825 accumulation Methods 0.000 description 1
- 230000009471 action Effects 0.000 description 1
- 238000005275 alloying Methods 0.000 description 1
- AJGDITRVXRPLBY-UHFFFAOYSA-N aluminum indium Chemical compound [Al].[In] AJGDITRVXRPLBY-UHFFFAOYSA-N 0.000 description 1
- 239000010953 base metal Substances 0.000 description 1
- 230000015556 catabolic process Effects 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 238000010276 construction Methods 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 238000007599 discharging Methods 0.000 description 1
- 238000009826 distribution Methods 0.000 description 1
- 238000001312 dry etching Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 239000004744 fabric Substances 0.000 description 1
- 229910052733 gallium Inorganic materials 0.000 description 1
- 239000001307 helium Substances 0.000 description 1
- 229910052734 helium Inorganic materials 0.000 description 1
- SWQJXJOGLNCZEY-UHFFFAOYSA-N helium atom Chemical compound [He] SWQJXJOGLNCZEY-UHFFFAOYSA-N 0.000 description 1
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 description 1
- 229910052749 magnesium Inorganic materials 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 238000001465 metallisation Methods 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- 229910052757 nitrogen Inorganic materials 0.000 description 1
- 238000012545 processing Methods 0.000 description 1
- 238000011160 research Methods 0.000 description 1
- 229910052719 titanium Inorganic materials 0.000 description 1
- 230000005641 tunneling Effects 0.000 description 1
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Abstract
一种二极管包含:半导体衬底;阴极金属层,其接触所述衬底的底部;半导体漂移层,其在所述衬底上;递变氮化铝镓(AlGaN)半导体势垒层,其在所述漂移层上且具有比所述漂移层大的带隙,所述势垒层具有顶表面和在所述漂移层与所述顶表面之间的底表面,所述势垒层具有从所述底表面到所述顶表面增大的铝成分;以及阳极金属层,其直接接触所述势垒层的所述顶表面。
Description
关于联邦赞助的研究或开发的声明
本发明是在政府支持下根据由能源部签署的第DE-AR0000450号合同进行的。政府享有本发明的某些权利。
技术领域
本发明的实施例的方面涉及肖特基结构和结设计。
背景技术
氮化镓(GaN)肖特基二极管中遇到的一个困难是降低反向漏电流。在使用例如镍(Ni)和铂(Pt)等具有在GaN上小于1电子伏(eV)的肖特基势垒高度的肖特基金属时,在将反向偏压施加到二极管时可能会产生显著的漏电流。使用p-n结替代肖特基结来形成二极管可克服此问题。举例来说,GaN p-n结具有约3eV的势垒高度。此大势垒可显著降低反向漏电流。然而,缺点为需要大于3伏特(V)的正向偏压来接通二极管以进行前向传导。大接通电压意味着不合需要的大传导功率损耗。由此,需要同时(例如,同步)实现低反向漏电流和低接通电压两者。
发明内容
本发明的实施例的方面是针对肖特基结构和结设计,例如具有新颖肖特基结设计的氮化镓(GaN)垂直肖特基二极管。举例来说,本发明的实施例可使用新颖肖特基势垒设计代替GaNp-n结用于建构垂直二极管。所述肖特基结可利用成分递变半导体层来在反向偏压下实现低泄漏,而在正向偏压下实现低接通电压。本发明的其它实施例是针对具有减小的反向漏电流而不显著增大前向接通电压的肖特基二极管。其它实施例是针对不仅减少泄漏而且减小接通电压的新势垒设计。
根据本发明的实施例,提供一种二极管。所述二极管包含:半导体衬底;阴极金属层,其接触所述衬底的底部;半导体漂移层,其在所述衬底上;递变氮化铝镓(AlGaN)半导体势垒层,其在所述漂移层上且具有比所述漂移层大的带隙,所述势垒层具有顶表面和在所述漂移层与所述顶表面之间的底表面,所述势垒层具有从所述底表面到所述顶表面增大的铝成分;以及阳极金属层,其直接接触所述势垒层的所述顶表面。
所述势垒层的所述铝成分可从所述底表面到所述顶表面线性地递变。
所述势垒层的所述铝成分可从在所述底表面处的约0%线性地增大到在所述顶表面处的约25%。
所述势垒层可具有约5纳米(nm)的厚度。
根据本发明的另一实施例,提供一种半导体结构。所述半导体结构包含:半导体衬底;半导体漂移层,其在所述衬底上;以及氮化物半导体势垒层,其在所述漂移层上且具有比所述漂移层大的带隙。所述势垒层具有顶表面和在所述漂移层与所述顶表面之间的底表面。所述势垒层的成分递变,以使得所述势垒层的所述带隙从所述势垒层在所述底表面附近的一部分到所述势垒层在所述顶表面附近的一部分增大。
所述势垒层可包含在所述势垒层的***部分处的离子植入区和在所述势垒层的中心部分处的非离子植入区。所述结构可进一步包含阳极金属层,所述阳极金属层接触所述势垒层的顶表面,覆盖所述势垒层的所述中心部分处的所述非离子植入区,且与所述势垒层的所述***部分处的所述离子植入区重叠。
所述结构可进一步包含:阳极金属层,其接触所述势垒层的顶表面;以及阴极金属层,其接触所述衬底的底部。
所述衬底和所述漂移层可包含III族氮化物半导体。
所述势垒层可包含氮化铝镓(AlGaN)。所述势垒层中的铝成分可从所述底表面到所述顶表面增大。
所述势垒层可具有介于2.5纳米(nm)与10nm之间的厚度。
所述势垒层可接触所述漂移层。
所述漂移层可包含多个半导体漂移层。
所述多个半导体漂移层可包含在所述衬底上的第一漂移层和在所述第一漂移层上的第二漂移层,所述第一漂移层具有比所述第二层高的掺杂浓度。
根据本发明的又一实施例,提供一种制造半导体结构的方法。所述方法包含:在半导体衬底上形成半导体漂移层;以及在所述漂移层上形成氮化物半导体势垒层。所述势垒层具有比所述漂移层大的带隙。所述势垒层具有顶表面和在所述漂移层与所述顶表面之间的底表面。所述形成所述势垒层可包含使所述势垒层的成分递变,以使得所述势垒层的所述带隙从所述势垒层在所述底表面附近的一部分到所述势垒层在所述顶表面附近的一部分增大。
所述方法可进一步包含:在所述势垒层的***部分处形成离子植入区,使非离子植入区处于所述势垒层的中心部分处;以及形成阳极金属层,所述阳极金属层接触所述势垒层的顶表面,覆盖所述势垒层的所述中心部分处的所述非离子植入区,且与所述势垒层的所述***部分处的所述离子植入区重叠。
所述方法可进一步包含:形成阳极金属层,所述阳极金属层接触所述势垒层的顶表面;以及形成阴极金属层,所述阴极金属层接触所述衬底的底部。
所述势垒层可包含氮化铝镓(AlGaN)。所述形成所述势垒层可包含使所述势垒层的成分递变,以使得所述势垒层中的铝成分从所述势垒层在所述底表面附近的一部分到所述势垒层在所述顶表面附近的一部分增大。
所述形成所述势垒层可包含形成接触所述漂移层的所述势垒层。
所述方法可进一步包含在所述漂移层上形成第二半导体漂移层。
所述第二半导体漂移层可具有比所述漂移层低的掺杂浓度。
本发明的以上和其它实施例提供同时(例如,同步)减少反向漏电流和前向接通电压两者的隧道-势垒-肖特基(TBS)结构。举例来说,此类结构可适用于多种切换应用。此类肖特基势垒设计实现适合用于高效功率电子***中的高电压和低损耗垂直二极管。这些***对于使用电的实际上所有事物是重要的,例如飞机、雷达***、汽车和消费型电子装置。
附图说明
附图与说明书一起说明本发明的实例实施例。这些附图与描述一起用来更好地描述本发明的方面和原理。
图1为可比肖特基二极管的示意性横截面。
图2为根据本发明的实施例的隧道-势垒肖特基(TBS)二极管的示意性横截面。
图3为说明图1到2的二极管的仿真导带边缘图的曲线图。
图4到7说明制造根据本发明的实施例的GaN TBS二极管的处理流程。
图8为从电容-电压测量提取的图1到2的两个二极管的GaN漂移层中的电子浓度分布的曲线图。
图9为比较图1到2的两个二极管的反向泄漏特性的曲线图。
图10为比较图1到2的两个二极管的正向电流-电压特性的曲线图。
图11为根据本发明的另一实施例的隧道-势垒肖特基(TBS)二极管的示意性横截面。
具体实施方式
提供以下描述以使得所属领域的一般技术人员能够制造和使用本发明的实施例,且将此类实施例并入到特定应用的上下文中。在不同应用在的各种修改以及多种用途对于所属领域的技术人员而言将是显而易见的,并且本文中所界定的通用原理可以应用于各种实施例。因此,本发明不希望限于所呈现的实施例,而应符合与本文中所公开的方面、原理和新颖特征相一致的最广泛范围。
在以下详细描述中,阐述许多特定细节以便提供对本发明的实施例中的一些的更透彻理解。然而,所属领域的技术人员将明白,可在无需必要限于这些具体细节的情况下实践本发明。在其它情况下,以框图形式而非详细地示出众所周知的结构和装置,以便避免混淆本发明的各方面。
读者的注意力是针对与本说明书同时递交的且是对公众检查本说明书开放的所有文章和文档,且所有此类文章和文档的内容以引用的方式并入本文中。除非另外明确说明,否则本说明书(包括任何随附权利要求书、摘要及附图)中所公开的所有特征可由合于相同、等效或类似目的的替代特征替换。因此,除非另外明确说明,否则所公开的各特征仅为一系列通用的等效或类似特征的一个实例。类似地,除非相反地指示,否则一个实施例的特征可并入到其它实施例中,而不脱离本发明的精神和范围。
另外,权利要求书中未明确地说明“用于执行特定功能的构件”或“用于执行特定功能的步骤”的任何元件未被解释为如在35U.S.C.§112(f)中规定的“构件”或“步骤”条款。明确地说,在本文中的权利要求书中的“步骤”或“动作”的使用并不希望援引35U.S.C.§112(f)的条款。
举例来说,本发明的各种实施例是针对具有新颖肖特基结设计的氮化镓(GaN)垂直肖特基二极管。然而,这些实施例呈现为实例,且本发明不限于此。
现将参考随附附图描述本发明的实例实施例。在附图中,相同或类似参考标号通篇指代相同或类似元件。本文中,在描述本发明的实施例时使用术语“可”是指“本发明的一个或多个实施例”。此外,在描述本发明的实施例时使用例如“或”等替代性语言是指用于所列的每一对应项目的“本发明的一个或多个实施例”。
本发明的实施例是针对改进的半导体装置设计,例如用于具有新颖肖特基结设计的氮化镓(GaN)垂直肖特基二极管。举例来说,肖特基结可利用成分递变半导体层以在反向偏压下实现低泄漏,而在正向偏压下实现低接通电压。此可降低反向漏电流,而不显著增大前向接通电压。
通过使用例如成分递变半导体层(例如,氮化铝镓(AlGaN)层,例如AlxGa1-xN,0<x<1,具有不同比例的氮化铝(AlN)和GaN)等特征,肖特基结的实施例可在反向偏压下实现低泄漏,而在正向偏压下实现低接通电压。其它实施例是针对减少反向漏电流而不显著增大前向接通电压的半导体装置设计。其它实施例是针对同时(例如,同步)减少反向漏电流和前向接通电压的垂直隧道-势垒-肖特基(TBS)结构。此类势垒设计可替代可比二极管的p-n结而使用。
氮化镓(GaN)具有高击穿场和高电子迁移率。这些特性使GaN成为用于功率切换应用的有希望的候选者。功率二极管是用于功率切换的重要装置。本发明的实施例提供解决先前报告的GaN二极管遇到的技术困难的半导体结构,例如基于GaN的二极管结构。
图1为可比肖特基二极管100的示意性横截面。图2为根据本发明的实施例的隧道-势垒肖特基(TBS)二极管200的示意性横截面。
参考图1,可比肖特基二极管100包含n型GaN衬底110,例如重掺杂n型GaN衬底110。具有约6微米(μm)的厚度的n型GaN漂移层120(例如轻掺杂n型GaN漂移层120)在GaN衬底110的顶部上。离子(例如,p型)植入区140形成于GaN漂移层120的顶边缘处。阳极金属150在GaN漂移层120的顶部上,与植入区140部分地重叠。阴极金属160形成于GaN衬底110的背侧上。此处,例如“重掺杂”和“轻掺杂”等关系术语希望由本申请案所属领域的一般技术人员以其常用意义加以解释。
参考图2,TBS二极管200包含n型(例如,重掺杂n型)GaN半导体底部层或衬底210。具有约6微米(μm)的厚度的n型(例如,轻掺杂n型)GaN半导体漂移层220在GaN衬底210的顶部上。递变(例如,线性地递变)氮化铝镓(AlGaN)半导体势垒层230,例如包含氮化铝(AlN)和氮化镓(GaN)两者且具有约5纳米(nm)的厚度的AlGaN,在漂移层的顶部上,其中铝成分从例如底部处的0%递变到顶部处的25%。
此处,铝成分是指铝在势垒层的总体金属含量中的百分比。举例来说,在AlxGa1- xN、0<x<1,其中x=0.25且1-x=0.75(例如,AlN与GaN的摩尔比为1比3的比例)的情况下,铝成分可称为25%。此类递变可向半导体势垒层230提供比半导体漂移层220的带隙大的带隙,例如从势垒层230在势垒层230的底表面附近的下部分到势垒层230在势垒层230的顶表面附近的上部分增大的带隙。
另外,离子植入区240(例如p型离子植入区)形成于AlGaN势垒层230的边缘和GaN漂移层220的顶边缘处,使非离子植入区处于AlGaN势垒层230的中心部分处。阳极金属250在AlGaN势垒层230的顶部上(例如,与其直接接触),与植入区240部分地重叠且完全覆盖非离子植入区。阴极金属260形成于GaN衬底210的背侧上。
图3为说明图1到2的二极管的仿真导带边缘图(能带图)310和320的曲线图,其中曲线310表示图1的可比肖特基二极管100的能带图,而曲线320表示图2的TBS二极管200的能带图。
在图3中,x轴表示以埃计的深度(对于图1的可比二极管100从GaN漂移层的顶部测量,且对于图2的TBS二极管200从AlGaN势垒层的顶部测量),而y轴表示电子能量(以eV表达的EC-EF,其中EC为导带边缘,且EF为费米能级)。如在图3中可观察到,图2的TBS二极管200(曲线320)具有比图1的可比二极管100(曲线310)高约0.5eV的肖特基势垒。较高肖特基势垒减少反向偏压下的漏电流。然而,在对TBS二极管施加前向偏压时,电子可在相对较小偏压下聚积在近表面区中。电子在近表面区中的聚积使得电子易于隧穿表面势垒,从而形成前向传导电流。
图4到7说明制造根据本发明的实施例的GaN TBS二极管200的处理流程。应注意,图4到7说明步骤的实例次序,但本发明不限于此。在其它实施例中,步骤可反转或具有不同次序。另外,步骤中的一些可省略。
参考图4,可使用GaN块状衬底210的起始晶圆。举例来说,GaN衬底210可为300μm厚。根据一些实施例,GaN衬底210可介于100μm与300μm之间,因为GaN衬底的减小的厚度可提供减小的电阻和热阻。因此,在更进一步的实施例中,GaN衬底210小于100μm厚,但仍然足够厚以提供半导体装置的其余部分的结构完整性和机械支撑,如所属领域的一般技术人员将显而易见的。在其它实施例中,另一III族氮化物半导体可用于衬底,例如氮化硼(BN)、AlN或氮化铟(InN)。
GaN衬底210可为n型,例如重掺杂n型(n+类型),且可具有低电阻率。GaN漂移层220可生长在GaN衬底210的顶部上。漂移层220可为n型,如同GaN衬底210,仅为轻掺杂n型,且具有比GaN底部层或衬底210高的电阻率(例如,GaN漂移层220可具有比GaN衬底210显著低的掺杂浓度)。取决于例如目标阻断电压等因素,GaN漂移层220可具有介于0.1μm与100μm之间,例如为6μm的均一或接近均一的厚度。在其它实施例中,漂移层可介于0.01μm与1000μm之间。
充当势垒层(例如,氮化物半导体势垒层)的递变(例如,线性地递变)AlGaN层230(AlN与GaN的合金化混合晶体)生长在漂移层220的顶部上,其中铝成分从例如底部(例如,较接近或接近于漂移层220)处的0%递变到顶部(例如,较远离或远离漂移层220)处的25%。递变可为线性、非线性、逐步的,或其变化。在其它实施例中,势垒层可由例如氮化铝铟(AlInN)或氮化铝铟镓(AlInGaN)等其它半导体合金组成,只要其能带隙可从底部处的较小值递变到顶部处的较大值即可。势垒层的顶表面处的能带隙可大于漂移层的带隙。此处,铝成分是指金属(例如,Al、In、Ga)在铝势垒层中的百分比(根据摩尔分数)。
在一些实施例中,递变将包含铝成分从底部到顶部的一个或多个逐渐增大,但可以存在变化。举例来说,在一些实施例中,根据摩尔分数,铝成分在底部处可介于0%与10%之间,且在顶部处可介于15%与55%之间。其它成分也是可能的。
AlGaN势垒层230的厚度可为例如5nm。在其它实施例中,AlGaN势垒层230的厚度可介于4nm与6nm之间。在又其它实施例中,AlGaN势垒层230的厚度可介于2.5nm与10nm之间。在又其它实施例中,AlGaN势垒层230的厚度可介于1nm与20nm之间。AlGaN层形成对阳极肖特基金属的较大势垒高度,其可导致较小的由热离子排放造成的反向漏电流。
参考图5,离子植入240(例如以p型离子植入)施加到晶片的前侧。离子植入240可包含例如铁(Fe)、铝(Al)、镁(Mg)、氦(He)和氮(N)等物质,但本发明不限于此,且可在势垒层230的边缘(例如,***部分)和漂移层220的顶边缘处形成离子植入区240,使非离子植入区处于势垒层230的中心部分处。边缘处的离子植入有助于降低电场拥挤。离子植入可为p型。离子植入还可包含将深位俘获状态引入带隙中的元件,其可帮助降低移动电子浓度且减少电场拥挤。
参考图6,阳极金属(或阳极金属层)250可形成于晶片的前侧上。高功函数金属,例如镍(Ni)、铂(Pt)或金(Au),可用于制造阳极。阳极金属250与植入区240之间可存在重叠,以缓解阳极金属250的边缘处的电场拥挤。阳极金属250可完全覆盖非植入区且与其直接接触。参考图7,阴极金属(或阴极金属层)260可形成于晶片的背侧上。低功函数金属,例如钛(Ti)或铝(Al),可用于制造阴极。为实现较低接触电阻,可在阴极金属化260之前执行对背侧GaN表面的干式蚀刻。
为了验证隧道-势垒-肖特基设计的影响,制造两个二极管:可比GaN肖特基二极管100(见图1)和GaN TBS二极管200(见图2)。两个二极管100与200具有相同装置结构和处理条件,只是TBS二极管200在半导体的表面上具有额外5nm递变(0%到25%铝)的AlGaN层230。
图8为从电容-电压测量提取的图1到2的两个相应二极管100和200的GaN漂移层120和220中的电子浓度分布810和820的曲线图。
参考图8,x轴为GaN漂移层的以微米(μm)计的深度,而y轴为以每立方厘米(cm3)电子数计的电子浓度。如可从图8观察到,在小正向偏压下,在接近于AlGaN表面的区中存在电子聚积。电子可隧穿大(而薄)的能量势垒,且形成前向传导电流。此外,可比肖特基二极管电子浓度810与TBS二极管电子浓度820几乎相同,从而确认对应GaN漂移层120与220大体上相同。
图9为比较图1到2的两个相应二极管100和200的反向泄漏特性910和920的曲线图。图9到10中的数据是使用半导体参数分析器加以收集。
参考图9,x轴表示以伏特(V)计的反向偏压,而y轴表示以安培(A),例如毫微安(nA)、微安(μA)和毫安(mA),计的漏电流。对于图2的TBS设计200,反向漏电流920比图1的可比肖特基二极管100的反向漏电流910低出超过三个数量级(1000倍)。低反向漏电流920可归于在AlGaN势垒层230(在TBS二极管200中)的表面与GaN漂移层120(在可比肖特基二极管100中)的表面上的较大肖特基势垒。
图10为比较图1到2的两个相应二极管100和200的正向电流-电压特性1010和1020的曲线图。
参考图10,x轴表示以伏特(V)计的正向偏压或接通电压,而y轴表示以安培(A)计的正向电流。可观察到,尽管肖特基势垒高度较大,但TBS设计200导致比可比肖特基二极管100的接通电压1010更低的接通电压1020。这是因为仅需要小正向偏压来使电子聚积在TBS二极管200的表面区中,其隧穿大势垒以形成传导电流。低接通电压对于实现低传导损耗是极为优选的。还可观察到,TBS二极管200具有比可比肖特基二极管100大的导通电阻。较大导通电阻可能由穿隧阻力造成。
应注意,本发明不限于上文公开的实施例。举例来说,本发明不限于基于GaN的层。在其它实施例中,可使用任何导电III族氮化物或III族氮化物半导体,例如氮化铝(AlN)、氮化铟(InN)、氮化硼(BN)或其组合(可能还包含氮化镓)。
图11为根据本发明的另一实施例的隧道-势垒肖特基(TBS)二极管1100的示意性横截面。图11的TBS二极管1100可与图2的TBS二极管200具有许多相同或类似特征。因此,可省略此类特征的重复描述。
参考图11,TBS二极管1100包含可生长在(第一)GaN漂移层220的顶部上的第二GaN漂移层225。第二漂移层225可为n型(例如轻掺杂n型),如同第一GaN漂移层220,且可甚至比第一GaN漂移层220掺杂程度小(例如,第一漂移层220可具有比第二漂移层225高的掺杂浓度)。取决于例如目标阻断电压等因素,第二GaN漂移层225可具有介于0.1μm与100μm之间,例如为6μm的均一或接近均一的厚度。在其它实施例中,第二GaN漂移层225可介于0.01μm与1000μm之间。在其它实施例中,除了第一GaN漂移层220之外,还可存在多个此类半导体漂移层225。另外,额外漂移层中的每一个可具有渐进地比前一漂移层小的n型掺杂,使得漂移层的掺杂浓度从衬底210(或阴极端)到势垒层230(或阳极端)减小。
虽然已经关于某些实例实施例来描述本发明,但应理解,本发明不限于所公开的实施例,而相反地,本发明希望涵盖包含于所附权利要求的精神和范围内的各种修改和等效布置和其等效内容。
Claims (20)
1.一种二极管,其包括:
半导体衬底;
阴极金属层,其接触所述衬底的底部;
半导体漂移层,其在所述衬底上;
递变氮化铝镓(AlGaN)半导体势垒层,其在所述漂移层上且具有比所述漂移层大的带隙,所述势垒层具有顶表面和在所述漂移层与所述顶表面之间的底表面,所述势垒层具有从所述底表面到所述顶表面逐渐增大的铝成分;以及
阳极金属层,其直接接触所述势垒层的所述顶表面。
2.根据权利要求1所述的二极管,其中所述势垒层的所述铝成分从所述底表面到所述顶表面线性地递变。
3.根据权利要求2所述的二极管,其中所述势垒层的所述铝成分从在所述底表面处的约0%线性地增大到在所述顶表面处的约25%。
4.根据权利要求1所述的二极管,其中所述势垒层具有约5纳米(nm)的厚度。
5.一种半导体结构,其包括:
半导体衬底;
半导体漂移层,其在所述衬底上;以及
氮化物半导体势垒层,其在所述漂移层上且具有比所述漂移层大的带隙,所述势垒层具有顶表面和在所述漂移层与所述顶表面之间的底表面,
其中所述势垒层的成分递变,以使得所述势垒层的所述带隙从所述势垒层的在所述底表面附近的一部分到所述势垒层的在所述顶表面附近的一部分增大。
6.根据权利要求5所述的结构,其中
所述势垒层包括在所述势垒层的***部分处的离子植入区和在所述势垒层的中心部分处的非离子植入区,且
所述结构进一步包括阳极金属层,所述阳极金属层接触所述势垒层的顶表面,覆盖所述势垒层的所述中心部分处的所述非离子植入区,且与所述势垒层的所述***部分处的所述离子植入区重叠。
7.根据权利要求5所述的结构,其进一步包括:
阳极金属层,其接触所述势垒层的顶表面;以及
阴极金属层,其接触所述衬底的底部。
8.根据权利要求5所述的结构,其中所述衬底和所述漂移层包括III族氮化物半导体。
9.根据权利要求5所述的结构,其中
所述势垒层包括氮化铝镓(AlGaN),且
所述势垒层中的铝成分从所述底表面到所述顶表面增大。
10.根据权利要求9所述的结构,其中所述势垒层具有介于2.5纳米(nm)与10nm之间的厚度。
11.根据权利要求5所述的结构,其中所述势垒层接触所述漂移层。
12.根据权利要求5所述的结构,其中所述漂移层包括多个半导体漂移层。
13.根据权利要求12所述的结构,其中所述多个半导体漂移层包括在所述衬底上的第一漂移层和在所述第一漂移层上的第二漂移层,所述第一漂移层具有比所述第二层高的掺杂浓度。
14.一种制造半导体结构的方法,其包括:
在半导体衬底上形成半导体漂移层;以及
在所述漂移层上形成氮化物半导体势垒层,所述势垒层具有比所述漂移层大的带隙,所述势垒层具有顶表面和在所述漂移层与所述顶表面之间的底表面,所述形成所述势垒层包括使所述势垒层的成分递变,以使得所述势垒层的所述带隙从所述势垒层的在所述底表面附近的一部分到所述势垒层的在所述顶表面附近的一部分增大。
15.根据权利要求14所述的方法,其进一步包括:
在所述势垒层的***部分处形成离子植入区,使非离子植入区处于所述势垒层的中心部分处;以及
形成阳极金属层,所述阳极金属层接触所述势垒层的顶表面,覆盖所述势垒层的所述中心部分处的所述非离子植入区,且与所述势垒层的所述***部分处的所述离子植入区重叠。
16.根据权利要求14所述的方法,其进一步包括:
形成阳极金属层,所述阳极金属层接触所述势垒层的顶表面;以及
形成阴极金属层,所述阴极金属层接触所述衬底的底部。
17.根据权利要求16所述的方法,其中
所述势垒层包括氮化铝镓(AlGaN),且
所述形成所述势垒层包括使所述势垒层的成分递变,以使得所述势垒层中的铝成分从所述势垒层的在所述底表面附近的一部分到所述势垒层的在所述顶表面附近的一部分增大。
18.根据权利要求14所述的方法,其中所述形成所述势垒层包括形成接触所述漂移层的所述势垒层。
19.根据权利要求14所述的方法,其进一步包括在所述漂移层上形成第二半导体漂移层。
20.根据权利要求19所述的方法,其中所述第二半导体漂移层具有比所述漂移层低的掺杂浓度。
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US15/093,710 US9899482B2 (en) | 2015-08-11 | 2016-04-07 | Tunnel barrier schottky |
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Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN110137267A (zh) * | 2019-05-15 | 2019-08-16 | 上海科技大学 | 一种垂直型氮化镓肖特基二极管器件及其制备方法 |
CN111180335A (zh) * | 2019-12-19 | 2020-05-19 | 深圳第三代半导体研究院 | 一种GaN基垂直二极管及其制备方法 |
CN111326590A (zh) * | 2020-02-19 | 2020-06-23 | 珠海格力电器股份有限公司 | 半导体装置及其制造方法 |
CN111509033A (zh) * | 2020-04-07 | 2020-08-07 | 深圳第三代半导体研究院 | 一种极化掺杂的sbd二极管及其制备方法 |
WO2021248879A1 (zh) * | 2020-06-11 | 2021-12-16 | 珠海格力电器股份有限公司 | 一种mps二极管器件及其制备方法 |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US10672917B2 (en) * | 2016-12-05 | 2020-06-02 | Gpower Semiconductor, Inc. | Schottky barrier rectifier |
Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN102916054A (zh) * | 2011-08-01 | 2013-02-06 | 三星电子株式会社 | 肖特基势垒二极管及其制造方法 |
CN103107151A (zh) * | 2011-11-11 | 2013-05-15 | 万国半导体股份有限公司 | 用于氮化镓肖特基二极管的端接结构 |
US20140051236A1 (en) * | 2011-11-18 | 2014-02-20 | Avogy, Inc. | Gan-based schottky barrier diode with field plate |
US20140374769A1 (en) * | 2011-11-18 | 2014-12-25 | Avogy, Inc. | Gan-based schottky barrier diode with algan surface layer |
CN104321880A (zh) * | 2012-06-22 | 2015-01-28 | Hrl实验室有限责任公司 | 电流孔径二极管及其制作方法 |
Family Cites Families (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20030015708A1 (en) * | 2001-07-23 | 2003-01-23 | Primit Parikh | Gallium nitride based diodes with low forward voltage and low reverse current operation |
US7199442B2 (en) * | 2004-07-15 | 2007-04-03 | Fairchild Semiconductor Corporation | Schottky diode structure to reduce capacitance and switching losses and method of making same |
DE102009033302B4 (de) * | 2009-07-15 | 2012-01-26 | Infineon Technologies Ag | Herstellungsverfahren für ein unipolares Halbleiter-Bauelement und Halbleitervorrichtung |
US8778788B2 (en) * | 2011-10-11 | 2014-07-15 | Avogy, Inc. | Method of fabricating a gallium nitride merged P-i-N Schottky (MPS) diode |
-
2016
- 2016-04-07 US US15/093,710 patent/US9899482B2/en not_active Expired - Fee Related
- 2016-04-15 WO PCT/US2016/027750 patent/WO2017027074A1/en active Application Filing
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- 2016-04-15 EP EP16835558.4A patent/EP3335243A4/en not_active Ceased
-
2017
- 2017-12-14 US US15/842,002 patent/US10134851B2/en not_active Expired - Fee Related
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN102916054A (zh) * | 2011-08-01 | 2013-02-06 | 三星电子株式会社 | 肖特基势垒二极管及其制造方法 |
CN103107151A (zh) * | 2011-11-11 | 2013-05-15 | 万国半导体股份有限公司 | 用于氮化镓肖特基二极管的端接结构 |
US20140051236A1 (en) * | 2011-11-18 | 2014-02-20 | Avogy, Inc. | Gan-based schottky barrier diode with field plate |
US20140374769A1 (en) * | 2011-11-18 | 2014-12-25 | Avogy, Inc. | Gan-based schottky barrier diode with algan surface layer |
CN104321880A (zh) * | 2012-06-22 | 2015-01-28 | Hrl实验室有限责任公司 | 电流孔径二极管及其制作方法 |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN110137267A (zh) * | 2019-05-15 | 2019-08-16 | 上海科技大学 | 一种垂直型氮化镓肖特基二极管器件及其制备方法 |
CN111180335A (zh) * | 2019-12-19 | 2020-05-19 | 深圳第三代半导体研究院 | 一种GaN基垂直二极管及其制备方法 |
CN111326590A (zh) * | 2020-02-19 | 2020-06-23 | 珠海格力电器股份有限公司 | 半导体装置及其制造方法 |
CN111509033A (zh) * | 2020-04-07 | 2020-08-07 | 深圳第三代半导体研究院 | 一种极化掺杂的sbd二极管及其制备方法 |
WO2021248879A1 (zh) * | 2020-06-11 | 2021-12-16 | 珠海格力电器股份有限公司 | 一种mps二极管器件及其制备方法 |
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