CN108021511A - A kind of method and SSD of SSD performance boosts - Google Patents
A kind of method and SSD of SSD performance boosts Download PDFInfo
- Publication number
- CN108021511A CN108021511A CN201711172086.6A CN201711172086A CN108021511A CN 108021511 A CN108021511 A CN 108021511A CN 201711172086 A CN201711172086 A CN 201711172086A CN 108021511 A CN108021511 A CN 108021511A
- Authority
- CN
- China
- Prior art keywords
- mapping table
- ssd
- host
- host side
- buffer area
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/0223—User address space allocation, e.g. contiguous or non contiguous base addressing
- G06F12/0292—User address space allocation, e.g. contiguous or non contiguous base addressing using tables or multilevel address translation means
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/06—Addressing a physical block of locations, e.g. base addressing, module addressing, memory dedication
- G06F12/0646—Configuration or reconfiguration
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Memory System Of A Hierarchy Structure (AREA)
Abstract
The invention discloses a kind of method and SSD of SSD performance boosts, it is characterized in that SSD distributes a memory headroom as mapping table buffer area to host side application, mapping table is stored in mapping table buffer area, passes through the mapping item data in high-speed interface access map table cache area.It is limited for the mapping table of Dramless SSD, host random read-write can frequently trigger the mapping table displacement of inside, so as to the problem of causing performance extremely low, HMB strategy of the present invention based on NVMe SSD, it can be used as mapping table cache by applying for the Memory of host side, so as to avoid frequent mapping table loading, refresh, and then realize the purpose improved to SSD operation performance.
Description
Technical field
The present invention relates to SSD control technologies, the more particularly to a kind of method and SSD of SSD performance boosts.
Background technology
SSD due to its it is more the advantages of：Performance is high, power consumption is low etc., is just progressively replacing traditional HDD hard disks.As system
For manufacturer, performance is an important factor for assessing product with price.
Traditional SSD needs more DRAM cache to realize the buffering of mapping table and data, so as to fulfill high performance
Readwrite bandwidth.Under some consumer scenes, compromise opposite for readwrite performance requirement, but but paid close attention to very much for cost.Cause
This has derived a series of DRAMLESS in the SATA epoch with these specific demands, that is, without external DRAM's
SSD, a small amount of Memory only carried by its chip internal complete read-write operation.
While cost is reduced, so extremely low memory causes SSD to need the loading of frequent switching mapping table, brush
Newly, cause performance extremely low, there is the defects of very big
Fig. 1 is the mapping table management strategy of existing DRAMLESS SSD, has about 1MB SRAM inside SSD controller,
A portion is used for user data read-write buffering, and a part is used to cache mapping table (such as 512KB).NAND is divided into two
Point, portion storage user data a, part stores complete mapping table (typically such as 128MB)
Nearest, a small number of mapping items of current accessed are only cached in SRAM, when the logical address mapping of host read-write does not exist
Loaded during this caching, it is necessary to trigger corresponding mapping table from NAND.Further, for write operation, after the completion of NAND loadings
Need to modify in Memory, when needing to be replaced away, it is necessary to write on NAND in real time.
Fig. 2 is the model of the random write of existing DRAMLESS SSD, and host submits write request to SSD ends；SSD ends, which check, to be reflected
Whether firing table hits, and needs triggering to load correspondence mappings table segmenting from NAND if being not hit by；During this, if currently
It is full to map table cache, in order to load new mapping table, then needs all items changed in mapping table cache to flush to
On NAND；SSD inside points match somebody with somebody new physical address, and update the list item in corresponding mapping table cache；Write data into again
On NAND.
For random write because its logical address dispersion is very big, the probability of generation Cache hits is very low, so needing frequently hair
Play mapping table loading and mapping table flushes to NAND.These operations will not then occur in the SSD with DRAM, so globality
It is able to can decline very big.
The content of the invention
For disadvantages described above, the present invention seeks to how lift the performance of SSD.
A kind of method of SSD performance boosts is proposed in order to solve the problem above present invention, it is characterised in that SSD is to host
Mapping table is stored in mapping table buffer area, passes through high quick access by end application one memory headroom of distribution as mapping table buffer area
The mapping item data in mouth access map table cache area.
The method of the SSD performance boosts, it is characterised in that SSD is according to NVMe HMB protocol realizations to host side application
Mapping table buffer area, the inquiry and renewal to mapping table are realized by PCIe interface.
The method of the SSD performance boosts, it is characterised in that host side mapping table cache management mould is added in SSD
Block, host side mapping table caching management module is realized is loaded into host by the initial mapping table stored in NAND FLASH in SSD
In the mapping table buffer area at end, when performing the operational order of host, the inquiry and renewal to mapping table are realized.
The method of the SSD performance boosts, it is characterised in that the host side mapping table caching management module will map
Table is made multiple sections and is managed, and each section of state is recorded by host side mapping table cache management table, the section of each section
Whether whether status information includes at least has loaded and has been changed.
The method of the SSD performance boosts, it is characterised in that SSD actively supports NVMe when powering on to host report
HMB protocol characteristics, and report the size of required mapping table buffer area.
The method of the SSD performance boosts, it is characterised in that initial mapping table is not also loaded into mapping table and delayed by SSD
Before depositing area, initial mapping table is safeguarded in the memory inside SSD and performs the operational order of host.
A kind of SSD, it is characterised in that host side mapping table caching management module, host side mapping table are added in SSD
Caching management module realizes the mapping table buffer area that the initial mapping table stored in NAND FLASH in SSD is loaded into host side
In, when performing the operational order of host, realize the inquiry and renewal to mapping table.
The SSD, it is characterised in that SSD according to NVMe HMB protocol realizations to host side application mapping table buffer area,
Inquiry and renewal to mapping table is realized by PCIe interface.
The SSD, it is characterised in that be that SSD actively supports that NVMe HMB agreements are special when powering on to host report
Property, and report the size of required mapping table buffer area.
The SSD, it is characterised in that before initial mapping table is not also loaded into mapping table buffer area by SSD, inside SSD
Memory in safeguard initial mapping table and perform the operational order of host.
The beneficial effects of the invention are as follows：It is limited for the mapping table of Dramless SSD, host random read-write can be touched frequently
Mapping table displacement inside hair, so as to cause performance extremely low.HMB strategy of the present invention based on NVMe SSD, can pass through application
The Memory of host side is used as mapping table cache, so as to avoid frequent mapping table loading, refresh, and then realizes and SSD is grasped
Make the purpose of performance raising.
Brief description of the drawings
Fig. 1 is the mapping table management strategy of existing DRAMLESS SSD；
Fig. 2 is the model of the random write of existing DRAMLESS SSD；
Fig. 3 is the management structure diagram after host side increases mapping table cache；
Fig. 4 is Host map table cache management table；
Fig. 5 is the working-flow figure of NVMe DRAMLESS SSD.
Embodiment
Below in conjunction with the attached drawing in the embodiment of the present invention, the technical solution in the embodiment of the present invention is carried out clear, complete
Site preparation describes, it is clear that described embodiment is only part of the embodiment of the present invention, instead of all the embodiments.It is based on
Embodiment in the present invention, those of ordinary skill in the art are obtained every other without creative efforts
Embodiment, belongs to the scope of protection of the invention.
Fig. 3 is the management structure diagram after host side increases mapping table cache, is divided into 3 major parts, in host
Deposit, SSD controller and NAND FLASH, particular for the performance improvement method of NVMe DRAMLESS SSD, by NVMe HMB
Agreement, SSD distribute a part of memory headroom as mapping table buffer area from host side, HMB mapping table caches are recorded as, for depositing
Put mapping item.The interface rate of PCIe is very high (typical case such as 3GB/s), and mapping table inquiry and renewal are being carried out using the interface
When, SSD performances are substantially without big influence.
Compared with traditional DRAMLESS SSD, increased newly inside SSD " host side mapping table cache management " module, it is used for
Mapping table is loaded to host end memory from NAND, and the inquiry and renewal of mapping table are completed with read write command.
Fig. 4 is Host map table cache management table, as being reflected in host side mapping table caching management module for host side
Firing table cache management table.Corresponding each mapping table segmenting, including at least there is two attributes：
1) whether load:If Y, represent that corresponding mapping table segmenting is loaded into host end memory from NAND
2) whether changed:After mapping table is loaded into host side caching, changed in the event of crossing, then by this field
Become Y. when mapping table is written to NAND by follow-up needs from N, representing this segmentation needs to write.And indicate and be then not required to for N
Write, be newest on NAND because it is not updated always after coming up from NAND loadings.
Fig. 5 is the working-flow figure of NVMe DRAMLESS SSD：
1)S1:After system electrification, SSD supports HMB characteristics and required DRAM sizes to host report, initializes at the same time
" Host map table cache manages table ", all segmentation list items are disposed as N；
2)S2–S3:After host start, system bios can also initiate some read-write operations, and at this time, SSD is because not yet distribute
HMB spaces, are operated in traditional DRAMLESS patterns, i.e., by SSD inside " Buffer mapping table " and complete mapping table on demand
Loading, renewal, refresh.Because little for performance demand before being now in OS loadings, meet feature requirements for access；
3)S4:After particular moment, typical case such as OS load drivers, host enables HMB characteristics and distribution HMB host bufferings
Area；
4)S5:After enabled HMB characteristics, SSD can load mapping table to host side from the background when host does not have command request
HMB mapping table buffering areas, while incite somebody to action " Host map table cache manages table " corresponding segments " whether load " it is arranged to Y；
5)S6–S9:When host has read-write requests, inquiry " Host map table cache manages table " corresponding segments " whether
Loading ".If be already loaded into host buffer, directly it completed to inquire about, updated, then initiate NAND read-writes.By
Very high in the interface rate of PCIe, typical case such as 3GB/s, the map operation speed of host buffer is carried out much based on this speed
Higher than the speed of NAND real-time loadings, substantially the access time same grade with DRAM inside SSD.
Further, because the HMB mapping table buffer areas of host side are bigger, item (respective hosts are updated for mapping table
Write operation) Cache replacement operators need not frequently occur, into the operation for being written to NAND without frequently initiating mapping table.
While operating lag is improved, NAND write operation is greatly reduced, has improved the SSD service lifes.
6) when SSD is operated in fast mode, with the write operation of host, in renewal host side HMB mapping table caches
While, also synchronously setting " Host map table cache manages table " corresponding segments, " whether Dirty " is Y, when host is initiated
When request, item, all dirty segmentations can be collectively written on NAND, so that under accelerating safety shutdown as an optimization
Initialization time after one time SSD is re-powered.
The above disclosed interest field for being only an embodiment of the present invention, sheet cannot being limited with this certainly,
One of ordinary skill in the art will appreciate that realize all or part of flow of above-described embodiment, and according to the claims in the present invention institute
The equivalent variations of work, still fall within the scope that the present invention is covered.
Claims (10)
- A kind of 1. method of SSD performance boosts, it is characterised in that SSD distributes a memory headroom as mapping to host side application Table cache area, mapping table buffer area is stored in by mapping table, passes through the mapping table item number in high-speed interface access map table cache area According to.
- 2. the method for SSD performance boosts according to claim 1, it is characterised in that SSD is according to NVMe HMB protocol realizations To host side application mapping table buffer area, the inquiry and renewal to mapping table are realized by PCI e interfaces.
- 3. the method for SSD performance boosts according to claim 2, it is characterised in that host side mapping table is added in SSD Caching management module, host side mapping table caching management module realize the initial mapping table that will be stored in NAND FLASH in SSD It is loaded into the mapping table buffer area of host side, when performing the operational order of host, realizes the inquiry and renewal to mapping table.
- 4. the method for SSD performance boosts according to claim 3, it is characterised in that the host side mapping table cache management Mapping table is made multiple sections and is managed by module, and each section of state is recorded by host side mapping table cache management table, Whether whether the section status information of each section includes at least has loaded and has been changed.
- 5. the method for SSD performance boosts according to any one of claims 1 to 4, it is characterised in that SSD masters when powering on Trend host report supports NVMe HMB protocol characteristics, and reports the size of required mapping table buffer area.
- 6. the method for SSD performance boosts according to claim 5, it is characterised in that SSD does not also add initial mapping table Before being downloaded to mapping table buffer area, initial mapping table is safeguarded in the memory inside SSD and performs the operational order of host.
- 7. a kind of SSD, it is characterised in that host side mapping table caching management module is added in SSD, host side mapping table delays Deposit management module and realize the mapping table buffer area that the initial mapping table stored in NAND FLASH in SSD is loaded into host side In, when performing the operational order of host, realize the inquiry and renewal to mapping table.
- 8. SSD according to claim 7, it is characterised in that SSD is reflected according to NVMe HMB protocol realizations to host side application Firing table buffer area, the inquiry and renewal to mapping table are realized by PCI e interfaces.
- 9. SSD according to claim 8, it is characterised in that be that SSD actively supports NVMe when powering on to host report HMB protocol characteristics, and report the size of required mapping table buffer area.
- 10. SSD according to claim 9, it is characterised in that initial mapping table is not also loaded into mapping table buffer area by SSD Before, initial mapping table is safeguarded in the memory inside SSD and performs the operational order of host.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201711172086.6A CN108021511B (en) | 2017-11-22 | 2017-11-22 | SSD performance improving method and SSD |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201711172086.6A CN108021511B (en) | 2017-11-22 | 2017-11-22 | SSD performance improving method and SSD |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN108021511A true CN108021511A (en) | 2018-05-11 |
| CN108021511B CN108021511B (en) | 2021-04-06 |
Family
ID=62080815
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201711172086.6A Active CN108021511B (en) | 2017-11-22 | 2017-11-22 | SSD performance improving method and SSD |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN108021511B (en) |
Cited By (15)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109086168A (en) * | 2018-07-13 | 2018-12-25 | 深圳忆联信息***有限公司 | A kind of method and its system using hardware backup solid state hard disk writing rate |
| CN109634875A (en) * | 2018-12-12 | 2019-04-16 | 深圳忆联信息***有限公司 | Order data method for caching and processing, device, computer equipment and storage medium |
| CN109871337A (en) * | 2019-02-22 | 2019-06-11 | 深圳忆联信息***有限公司 | A kind of SSD storaging medium switching method and its system |
| CN110083481A (en) * | 2019-04-28 | 2019-08-02 | 深圳忆联信息***有限公司 | The guard method of logical physical mapping table, device and solid state hard disk based on HMB |
| CN110109845A (en) * | 2019-04-26 | 2019-08-09 | 深圳忆联信息***有限公司 | Data cached management method, device, computer equipment and storage medium |
| CN110334034A (en) * | 2019-07-12 | 2019-10-15 | 深圳忆联信息***有限公司 | Method, apparatus, computer equipment and the storage medium of mapping table dynamically load |
| CN110413228A (en) * | 2019-07-09 | 2019-11-05 | 江苏芯盛智能科技有限公司 | A kind of mapping table management method, system and electronic equipment and storage medium |
| CN112148377A (en) * | 2020-09-28 | 2020-12-29 | 深圳忆联信息***有限公司 | Method and device for preventing SSD from abnormal power failure in EFI Shell environment |
| CN112379830A (en) * | 2020-11-03 | 2021-02-19 | 成都佰维存储科技有限公司 | Method and device for creating effective data bitmap, storage medium and electronic equipment |
| CN112559193A (en) * | 2020-12-31 | 2021-03-26 | 山东华芯半导体有限公司 | Region information table management method based on host memory space |
| WO2021062982A1 (en) * | 2019-09-30 | 2021-04-08 | 深圳忆联信息***有限公司 | Method and apparatus for managing hmb memory, and computer device and storage medium |
| CN113407120A (en) * | 2021-06-30 | 2021-09-17 | 深圳忆联信息***有限公司 | Mapping table management method and device based on HMB and computer equipment |
| CN114328297A (en) * | 2021-12-29 | 2022-04-12 | 合肥兆芯电子有限公司 | Mapping table management method, memory control circuit unit and memory storage device |
| CN114327274A (en) * | 2021-12-29 | 2022-04-12 | 深圳忆联信息***有限公司 | Mapping table loading checking method and device based on solid state disk and computer equipment |
| US11640253B2 (en) | 2021-06-01 | 2023-05-02 | Western Digital Technologies, Inc. | Method to use flat relink table in HMB |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20160246726A1 (en) * | 2014-08-20 | 2016-08-25 | Sandisk Technologies Inc. | Adaptive host memory buffer (hmb) caching using unassisted hinting |
| CN106354664A (en) * | 2016-08-22 | 2017-01-25 | 浪潮(北京)电子信息产业有限公司 | Solid state disk data transmission method and device |
| CN107066393A (en) * | 2017-01-12 | 2017-08-18 | 安徽大学 | The method for improving map information density in address mapping table |
-
2017
- 2017-11-22 CN CN201711172086.6A patent/CN108021511B/en active Active
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20160246726A1 (en) * | 2014-08-20 | 2016-08-25 | Sandisk Technologies Inc. | Adaptive host memory buffer (hmb) caching using unassisted hinting |
| CN106354664A (en) * | 2016-08-22 | 2017-01-25 | 浪潮(北京)电子信息产业有限公司 | Solid state disk data transmission method and device |
| CN107066393A (en) * | 2017-01-12 | 2017-08-18 | 安徽大学 | The method for improving map information density in address mapping table |
Non-Patent Citations (1)
| Title |
|---|
| 大话存储: "关于SSD HMB与CMB", 《HTTPS://BLOG.CSDN.NET/TV8MBNO2Y2RFU/ARTICLE/DETAILS/78103780》 * |
Cited By (23)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109086168A (en) * | 2018-07-13 | 2018-12-25 | 深圳忆联信息***有限公司 | A kind of method and its system using hardware backup solid state hard disk writing rate |
| CN109634875A (en) * | 2018-12-12 | 2019-04-16 | 深圳忆联信息***有限公司 | Order data method for caching and processing, device, computer equipment and storage medium |
| CN109871337A (en) * | 2019-02-22 | 2019-06-11 | 深圳忆联信息***有限公司 | A kind of SSD storaging medium switching method and its system |
| CN109871337B (en) * | 2019-02-22 | 2021-06-08 | 深圳忆联信息***有限公司 | SSD storage medium switching method and system |
| CN110109845A (en) * | 2019-04-26 | 2019-08-09 | 深圳忆联信息***有限公司 | Data cached management method, device, computer equipment and storage medium |
| CN110109845B (en) * | 2019-04-26 | 2021-03-05 | 深圳忆联信息***有限公司 | Cache data management method and device, computer equipment and storage medium |
| CN110083481A (en) * | 2019-04-28 | 2019-08-02 | 深圳忆联信息***有限公司 | The guard method of logical physical mapping table, device and solid state hard disk based on HMB |
| CN110413228A (en) * | 2019-07-09 | 2019-11-05 | 江苏芯盛智能科技有限公司 | A kind of mapping table management method, system and electronic equipment and storage medium |
| CN110413228B (en) * | 2019-07-09 | 2022-10-14 | 江苏芯盛智能科技有限公司 | Mapping table management method and system, electronic equipment and storage medium |
| CN110334034A (en) * | 2019-07-12 | 2019-10-15 | 深圳忆联信息***有限公司 | Method, apparatus, computer equipment and the storage medium of mapping table dynamically load |
| CN110334034B (en) * | 2019-07-12 | 2021-10-26 | 深圳忆联信息***有限公司 | Mapping table dynamic loading method and device, computer equipment and storage medium |
| WO2021062982A1 (en) * | 2019-09-30 | 2021-04-08 | 深圳忆联信息***有限公司 | Method and apparatus for managing hmb memory, and computer device and storage medium |
| CN112148377A (en) * | 2020-09-28 | 2020-12-29 | 深圳忆联信息***有限公司 | Method and device for preventing SSD from abnormal power failure in EFI Shell environment |
| CN112148377B (en) * | 2020-09-28 | 2023-02-10 | 深圳忆联信息***有限公司 | Method and device for preventing SSD from abnormal power failure in EFI Shell environment |
| CN112379830A (en) * | 2020-11-03 | 2021-02-19 | 成都佰维存储科技有限公司 | Method and device for creating effective data bitmap, storage medium and electronic equipment |
| CN112379830B (en) * | 2020-11-03 | 2022-07-26 | 成都佰维存储科技有限公司 | Method and device for creating effective data bitmap, storage medium and electronic equipment |
| CN112559193A (en) * | 2020-12-31 | 2021-03-26 | 山东华芯半导体有限公司 | Region information table management method based on host memory space |
| US11640253B2 (en) | 2021-06-01 | 2023-05-02 | Western Digital Technologies, Inc. | Method to use flat relink table in HMB |
| CN113407120A (en) * | 2021-06-30 | 2021-09-17 | 深圳忆联信息***有限公司 | Mapping table management method and device based on HMB and computer equipment |
| CN113407120B (en) * | 2021-06-30 | 2023-02-10 | 深圳忆联信息***有限公司 | Mapping table management method and device based on HMB and computer equipment |
| CN114327274A (en) * | 2021-12-29 | 2022-04-12 | 深圳忆联信息***有限公司 | Mapping table loading checking method and device based on solid state disk and computer equipment |
| CN114328297A (en) * | 2021-12-29 | 2022-04-12 | 合肥兆芯电子有限公司 | Mapping table management method, memory control circuit unit and memory storage device |
| CN114327274B (en) * | 2021-12-29 | 2023-07-04 | 深圳忆联信息***有限公司 | Mapping table loading checking method and device based on solid state disk and computer equipment |
Also Published As
| Publication number | Publication date |
|---|---|
| CN108021511B (en) | 2021-04-06 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN108021511A (en) | A kind of method and SSD of SSD performance boosts | |
| JP6007329B2 (en) | Storage controller, storage device, storage system | |
| CN104572478B (en) | Data access method and data access device | |
| CN105159622B (en) | A kind of method and system reducing SSD read-write IO time delay | |
| US9128847B2 (en) | Cache control apparatus and cache control method | |
| JP5944587B2 (en) | Computer system and control method | |
| US20150378884A1 (en) | Storage system controlling addressing of solid storage disks (ssd) | |
| US9367469B2 (en) | Storage system and cache control method | |
| US8924659B2 (en) | Performance improvement in flash memory accesses | |
| US11561696B2 (en) | Garbage collection pacing in a storage system | |
| US20140082310A1 (en) | Method and apparatus of storage tier and cache management | |
| US20100325352A1 (en) | Hierarchically structured mass storage device and method | |
| WO2013175529A1 (en) | Storage system and storage control method for using storage area based on secondary storage as cache area | |
| EP2577470A2 (en) | Cache management and acceleration of storage media | |
| WO2017132056A1 (en) | Hot-spot adaptive garbage collection | |
| CN108182154A (en) | A kind of reading/writing method and solid state disk of the journal file based on solid state disk | |
| CN104850355A (en) | Storage device, storage system, address information processing method of storage device | |
| CN109739696B (en) | Double-control storage array solid state disk caching acceleration method | |
| CN113243007A (en) | Storage class memory access | |
| CN107590084A (en) | A kind of page level buffering area improved method based on classification policy | |
| US20170220476A1 (en) | Systems and Methods for Data Caching in Storage Array Systems | |
| US9298636B1 (en) | Managing data storage | |
| CN115203079A (en) | Method for writing data into solid state disk | |
| Bu et al. | The optimization of the hierarchical storage system based on the hybrid ssd technology | |
| JP4734432B2 (en) | Data storage system |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |