CN108010925A - Display device - Google Patents
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- CN108010925A CN108010925A CN201711369691.2A CN201711369691A CN108010925A CN 108010925 A CN108010925 A CN 108010925A CN 201711369691 A CN201711369691 A CN 201711369691A CN 108010925 A CN108010925 A CN 108010925A
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- substrate
- layer
- display device
- separation material
- groove
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- 239000000758 substrate Substances 0.000 claims abstract description 148
- 239000002245 particle Substances 0.000 claims abstract description 40
- 239000000084 colloidal system Substances 0.000 claims abstract description 33
- 230000002093 peripheral effect Effects 0.000 claims abstract description 32
- 239000000463 material Substances 0.000 claims description 51
- 238000000926 separation method Methods 0.000 claims description 50
- 238000002161 passivation Methods 0.000 claims description 15
- 239000012212 insulator Substances 0.000 claims description 13
- 125000006850 spacer group Chemical group 0.000 abstract 4
- 239000004973 liquid crystal related substance Substances 0.000 description 6
- 238000007323 disproportionation reaction Methods 0.000 description 5
- 239000010409 thin film Substances 0.000 description 5
- 238000010586 diagram Methods 0.000 description 4
- 239000010408 film Substances 0.000 description 4
- 239000003292 glue Substances 0.000 description 3
- 239000004065 semiconductor Substances 0.000 description 3
- 230000005684 electric field Effects 0.000 description 2
- 239000002184 metal Substances 0.000 description 2
- 238000000034 method Methods 0.000 description 2
- 230000000007 visual effect Effects 0.000 description 2
- 239000000853 adhesive Substances 0.000 description 1
- 230000001070 adhesive effect Effects 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000000059 patterning Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Devices For Indicating Variable Information By Combining Individual Elements (AREA)
- Liquid Crystal (AREA)
Abstract
The invention provides a display device which is provided with an inner area and a peripheral area surrounding the inner area and comprises a substrate, an opposite substrate, an insulating layer, at least one spacer and a colloid layer. The substrate and the opposite substrate are oppositely arranged. The insulating layer is arranged on the substrate and is positioned in the face area and the peripheral area, wherein the insulating layer is provided with at least one groove, and the groove is positioned in at least one edge area of the peripheral area. The spacer is arranged on the opposite substrate, and a space exists between the spacer and the substrate, wherein the vertical projection of the spacer on the substrate is overlapped with the groove. The colloid layer is arranged on the substrate and positioned in the peripheral area, wherein one part of the colloid layer is positioned between the substrate and the clearance object and positioned in the groove. The height of the top end of the gap particle relative to the substrate can be reduced through the groove, so that the space between the substrate and the opposite substrate is prevented from being spread by the gap object and the gap particle, and the possibility of uneven brightness of the display device at the edge of the in-plane area of the display device is reduced.
Description
Technical field
The present invention relates to display technology field, more particularly to a kind of display device.
Background technology
Among the various electronic product of domestic electric appliance, applied film transistor (thin film transistor;
TFT display panel) has been widely used.The display panel of film crystal tubular type is mainly by thin film transistor (TFT) array base
Plate, colorful filter array substrate and display medium are formed, and are wherein provided with thin-film transistor array base-plate multiple with array
The thin film transistor (TFT) of arrangement, and, the pixel electrode (pixel electrode) of configuration corresponding with each thin film transistor (TFT),
To form dot structure.
In the manufacturing process of display panel, colloid can be first passed through and bond substrate and opposite substrate, and pass through cutting again
Master slice and each panel is separated, but in adhesion process, the material in colloid would be possible to cause panel to have uneven thickness
Problem, causes the display quality of follow-up made display panel to have an impact, such as it may produce brightness disproportionation
The problem of.
The content of the invention
One embodiment of the present invention provides a kind of display device, and display device has face inner region and around the face inner region
Peripheral region, and include substrate, opposite substrate, at least insulating layer, a separation material and colloid layer.Substrate and opposite substrate are set relatively
Put.Insulating layer is arranged on substrate, and in face inner region and peripheral region, wherein insulating layer has an at least groove, and ditch
Groove is located at an at least fringe region for peripheral region.Separation material is arranged at opposite substrate, and there are spacing between separation material and substrate,
Wherein separation material is overlapping with groove in the upright projection of substrate.Colloid layer is arranged on substrate, and is located in peripheral region, wherein glue
A part for body layer between substrate and separation material and position in the trench.
In some embodiments, the edge of separation material and the edge of substrate trim.
In some embodiments, separation material in substrate upright projection with insulating layer the phase between the upright projection of substrate
Every the first distance W, and 3 microns<W<10 microns.
In some embodiments, insulating layer has the opposite two edges region that two grooves are located at peripheral region respectively.
In some embodiments, display device also includes multiple gap particles, and gap particles are arranged in colloid layer, its
Middle portion gap particle is between substrate and separation material.
In some embodiments, at least gap particles contact substrate and separation material.
In some embodiments, display device also includes conductive layer and conductive pad.Conductive layer is arranged at opposite substrate
On.Conductive pad is arranged on substrate, and between substrate and conductive layer, wherein the conductive upright projection being padded on substrate and
Gap thing is mutually mutually separated in the upright projection on substrate, and wherein another part of gap particles is conductive, and contacts conduction
Layer and conductive pad.
In some embodiments, display device also includes an at least switch element, is arranged in the face inner region of substrate.
In some embodiments, insulating layer includes gate insulator and passivation layer, and wherein gate insulator is arranged at base
On plate and substrate is contacted, passivation layer is arranged on gate insulator and overlay switch element, and the passivation of colloid layer covering part
Layer.
In some embodiments, display device also includes an at least gate driving circuit, is arranged at the peripheral region of substrate
It is interior, and between groove and face inner region.
By above-mentioned configuration, the height of the top opposing substrate of gap particles can be downgraded by groove, so as to preventing substrate
Space between opposite substrate is strutted by separation material and gap particles, so as to reduce display device in the edge of its face inner region
The possibility of brightness disproportionation occurs.
Brief description of the drawings
The exemplary embodiment of the present invention, above and other example of the invention are described in further detail by referring to accompanying drawing
Property embodiment, advantages and features will become clearer, wherein:
Fig. 1 is the upper schematic diagram that master slice is illustrated according to some embodiments of the present invention.
Fig. 2A illustrates the upper schematic diagram along the display device after the cutting wire cutting of Fig. 1.
Fig. 2 B illustrate the diagrammatic cross-section along the line segment 2B-2B of Fig. 2A.
Fig. 2 C illustrate the diagrammatic cross-section along the line segment 2C-2C of Fig. 2A.
Description of reference numerals:
100 master slices
110A, 110B display device
112 substrates
114 face inner regions
116 peripheral regions
118A, 118B fringe region
120 insulating layers
122 gate insulators
124 passivation layers
126A, 126B groove
130 colloid layers
132nd, 132A, 132B, 132C separation material
134 gap particles
140 switch elements
142 first conductive layers
144 gate driving circuits
146 liquid crystal layers
150 opposite substrates
152 conductive pads
154 second conductive layers
156 light shield layers
2B-2B, 2C-2C line segment
D drains
E1, E2, E3, E4 edge
G grids
P spacing
S source electrodes
SC semiconductor layers
The first distances of W
Embodiment
Multiple embodiments of the present invention, as clearly stated, the details in many practices will be disclosed with attached drawing below
It will be explained in the following description.It should be appreciated, however, that the details in these practices is not applied to limit the present invention.Also
It is to say, in some embodiments of the present invention, the details in these practices is non-essential.In addition, for the sake of simplifying attached drawing, one
A little existing usual structures will be illustrated in a manner of simply illustrating in the accompanying drawings with element.
In the accompanying drawings, for the sake of clarity, it is exaggerated the thickness in layer, film, panel, region etc..Throughout the specification, phase
With the identical element of reference numeral expression.It should be appreciated that ought the element of such as layer, film, region or substrate be referred to as another
On element " " or " be connected to " another element when, it can be connected directly on another element or with another element, or middle
Element can be there is also.On the contrary, when element is referred to as " directly on another element " or " be directly connected to " and another element when, no
There are intermediary element.As it is used herein, " connection " physics and/or electrical connection can be referred to.
It will be appreciated that though term " the first ", " the second ", " the 3rd " and etc. can be used for describing herein various elements,
Component, region, layer and/or part, but these elements, component, region, and/or part should not be limited by these terms.This
A little terms are only used for distinguishing an element, component, region, layer or part and another element, component, region, layer or part
Open.Therefore, it is discussed below " the first element ", " component ", " region ", " layer " or " part " the second element, portion can be referred to as
Part, region, layer or part are without departing from teaching herein.
In addition, such as " under " or " bottom " and " top " or " top " relative terms can be used for herein description one
The relation of element and another element, as shown in the figure.It should be appreciated that relative terms are intended to include in addition to the orientation shown in figure
Device different azimuth.If for example, the device upset in an attached drawing, is described as be in other elements " under " side
Element will be oriented at other elements " on " side.Therefore, under exemplary term " " can include " under " and " on " and orientation, take
Certainly in the specific orientation of attached drawing.Similarly, if the device in an attached drawing is overturn, other elements are described as be in " lower section "
Or " lower section " and element will be oriented in other elements " top ".Therefore, exemplary term " is below " or " below " can wrap
Orientation above and below including.
Please refer to Fig.1, Fig. 1 is the upper schematic diagram that master slice 100 is illustrated according to some embodiments of the present invention.Master slice
100 include at least the display device 110A and 110B being connected.Master slice 100 can be by the way that substrate and opposite substrate are used glue
Body layer 130 is made after adhering.After being bonded by colloid layer 130, the state such as Fig. 1 can be presented in master slice 100, then, can
Cut further along line of cut 102, so that display device 110A and 110B is disconnected from each other.
Fig. 2A and Fig. 2 B are refer again to, Fig. 2A illustrates the display device 110A's after being cut along the line of cut 102 of Fig. 1
Upper schematic diagram, and Fig. 2 B illustrate the diagrammatic cross-section along the line segment 2B-2B of Fig. 2A, wherein Fig. 2A eliminate opposite substrate 150,
The subelement of light shield layer 156 and other faces inner region 114 is so that top view is more visible is readily appreciated that.
Display device 110A includes substrate 112, insulating layer 120, colloid layer 130, separation material 132A, 132B, 132C, gap
Particle 134A, 134B, switch element 140, the first conductive layer 142, gate driving circuit (gate on array;GOA) 144, liquid
Crystal layer 146, opposite substrate 150, conductive pad 152, the second conductive layer 154 and light shield layer 156, wherein substrate 112 with to base
The mode that 150 system of plate adopts relative to each other is set, and insulating layer 120, colloid layer 130, separation material 132A, 132B, 132C, gap
Particle 134A, 134B, switch element 140, the first conductive layer 142, gate driving circuit 144, liquid crystal layer 146, conductive pad 152,
Second conductive layer 154 and the meeting of light shield layer 156 position are between substrate 112 and opposite substrate 150.
Display panel 110A (substrate 112, opposite substrate 150) has face inner region 114 and peripheral region 116, and peripheral region 116
Around face inner region 114.In some embodiments, face inner region 114 can be considered the viewing area of display device 110A, and peripheral region
116 can be the cabling area of display device 110A.Peripheral region 116 includes fringe region 118A and 118B, wherein fringe region
118A and 118B relative to each other in 112 both sides of substrate, and face inner region 114 is located between fringe region 118A and 118B.In addition,
Light shield layer 156 may be provided on opposite substrate 150 or the top of substrate 112, and light shield layer 156 is in the upright projection meeting of substrate 112
It is at least overlapping with the peripheral region 116 of substrate 112.
Insulating layer 120 is arranged on substrate 112, and in face inner region 114 and peripheral region 116.In an embodiment,
Insulating layer 120 includes gate insulator 122 and passivation layer 124, and wherein gate insulator 122 is arranged on substrate 112 and contacts
Substrate 112, and passivation layer 124 is arranged on gate insulator 122.Gate insulator 122 and passivation layer 124 can have ditch jointly
Groove 126A and 126B, wherein groove 126A and 126B systems respectively positioned at substrate 112 peripheral region 116 fringe region 118A and
In 118B, and strip groove is extended into along the edge of substrate 112 respectively.
Switch element 140 is arranged in the face inner region 114 of substrate 112, and is covered by passivation layer 124.Switch element 140 wraps
Containing grid G, source S, drain D and semiconductor layer SC, wherein grid G is arranged on substrate 112 and is covered by gate insulator 122
Lid, and source S, drain D and semiconductor layer SC are arranged on gate insulator 122 and are covered by passivation layer 124.First is conductive
Layer 142 is arranged on insulating layer 120, and the wherein passivation layer 124 of insulating layer 120 can have a through hole 125, and the first conductive layer 142
The drain D of switch element 140 can be electrically connected by through hole 125.
Grid G can be by being formed after patterning, wherein the metal layer after patterned can form grid G by metal layer
Or common electrode (not indicating) etc., in addition, grid G can be electrically connected gate driving circuit 144, wherein gate driving circuit 144
It is arranged in the peripheral region 116 of substrate 112, and between face inner region 114 and fringe region 118A (groove 126A) or position
Between face inner region 114 and fringe region 118B (groove 126B).
Colloid layer 130 is arranged on substrate 112, and in the peripheral region 116 of substrate 112, it is to adhesive base plate 112
With opposite substrate 150.In in peripheral region 116, colloid layer 130 can cover passivation layer 124.In addition, in the marginal zone of peripheral region 116
In domain 118A and 118B, colloid layer 130, which can be inserted, to be arranged in groove 126A and 126B.
On the other hand, since line of cut 102 (see Fig. 1) can be overlapping with colloid layer 130, therefore after the cut has been made, show
The edge E1 of the substrate 112 of showing device 110A can (as shown in Figure 2 A and 2 B) overlapping with the edge E3 of colloid layer 130, i.e. substrate
112 border can be trimmed with the edge E3 of colloid layer 130, for example, edge E1 meeting and colloid layer of the substrate 112 on short side
130 edge E3 is overlapping and trims.
In this embodiment, edge E2 of the substrate 112 in long side overlapping (such as Fig. 2A not with the edge E4 of colloid layer 130
It is shown), furthermore, it is understood that in fringe region of the adjacent substrates 112 in long side, the edge E4 of colloid layer 130 can be with substrate
112 edge E2 reserves appropriate spacing.By such a configuration mode, shown in display device 110A by cutting long side with another
When showing device (not illustrating) separates, colloid layer 130 can be reduced and peel off incomplete probability.However, the present invention not as
Limit, can also be overlapping regarding the edge E4 of demand setting colloid layer 130 and the edge E2 of substrate 112 in other embodiment.
Fig. 2A and Fig. 2 B are refer again to, separation material 132A-132C is arranged on opposite substrate 150, and it can be by same
Technique is formed.Separation material 132A is in the fringe region 118A and 118B of the peripheral region 116 of opposite substrate 150, with substrate 112
On groove 126A be oppositely arranged, and a part for colloid layer 130 can between substrate 112 and separation material 132A, in addition,
Spacing P may be present between gap thing 132A and substrate 112.
Separation material 132A can be overlapping with groove 126A in the upright projection of substrate 112, and separation material 132A is in substrate 112
Upright projection meeting and insulating layer 120 between the upright projection of substrate 112 at a distance., in fig. 2b, for example
Beeline between the upright projection of gap thing 132A and insulating layer 120 is the first distance W.In some embodiments, 3 microns
<First distance W<10 microns.In addition, when being seen with the visual angle of vertical substrate 112 to separation material 132A, separation material 132A can fall exhausted
In the groove 126A of edge layer 120.For example, in the visual angle of Fig. 2A, separation material 132A can fall the groove in insulating layer 120
Within the bounds of 126A.In some embodiments, the border of separation material 132A and the side of the groove 126A of insulating layer 120
Beeline between boundary can be between 3 microns to 10 microns.
On the other hand, since line of cut 102 (see Fig. 1) also can be overlapping (see Fig. 1) with separation material 132, therefore carrying out
When cutting, the separation material 132 that Fig. 1 is painted can be also cut open, and therefore, the edge of the substrate 112 of display device 110A can be with
The edge of separation material 132A trims.Further, since separation material 132A relative colloids layer 130 is without viscosity, therefore separation material 132A
It can be beneficial in cutting splitting, make display device 110A and 110B easily disconnected from each other, avoid because cutting produces defect.
Separation material 132B and 132C are located in the face inner region 114 of substrate 112, and respectively as main gap thing and auxiliary air gap
Thing.Separation material 132B can be contacted with the layer body being arranged on substrate 112, also commonly referred to as main gap thing, and separation material 132C is then
Separate or separate with the layer body being arranged on substrate 112, also commonly referred to as auxiliary air gap thing, for example, under separation material 132C
Surface can be towards substrate 112 and with passivation layer 124 at a distance.Therefore, display device can be made to maintain appropriately distance,
Avoid showing bad.In addition, light shield layer 156 also can be with separation material 132B and 132C in substrate 112 in the upright projection of substrate 112
Upright projection it is overlapping.
Gap particles 134A and 134B are arranged in colloid layer 130, i.e. gap particles 134A and 134B meetings position are in substrate 112
Peripheral region 116 in.Gap particles part can be that conducting particles sets the layer being arranged on substrate 112 body to be electrically connected to
The layer body on opposite substrate 150 is put, can be partly Non-conductive particles supporting and maintain substrate 112 and opposite substrate 150
Distance.
For example, Fig. 2A and Fig. 2 C are please also refer to, wherein Fig. 2 C are illustrated to be shown along the section of the line segment 2C-2C of Fig. 2A
It is intended to.152 and second conductive layer 154 of conductive pad can be separately positioned on substrate 112 and opposite substrate 150 and by liquid crystal layer 146
Separate with colloid layer 130, i.e., conductive pad 152 can be between 112 and second conductive layer 154 of substrate, and conductive pad 152 is in substrate
Upright projection on 112 is mutually mutually separated with separation material 132A, 132B and 132C in the upright projection system on substrate 112.Positioned at glue
Conductive gap particles 134 can be contacted with 152 and second conductive layer 154 of conductive pad in body layer 130 so that conductive pad
152 can be electrically connected with the second conductive layer 154 by the gap particles 134 in colloid layer 130.By gap particles 134,
When voltage is bestowed to conductive pad 152, the second conductive layer 154 can also have corresponding current potential, so that conductive first
Electric field is coupled out between 142 and second conductive layer 154 of layer, wherein the electric field being coupled out can control the liquid crystal molecule of liquid crystal layer 146.
It please return Fig. 2A and Fig. 2 B.Gap particles 134A is between substrate 112 and separation material 132A, and is fallen exhausted
Within the groove 126A of edge layer 120, and gap particles 134A can contact substrate 112 and separation material 132A.Gap particles 134B is
Between the passivation layer 124 and opposite substrate 150 of insulating layer 120.In addition, by groove 126A, gap particles 134A can be made
Top and gap particles 134B top between can there are difference in height, wherein the top opposing substrate 112 of gap particles 134A
Height can less than gap particles 134B top opposing substrate 112 height.Therefore, display device can be with peripheral region 116
There is spacing evenly, avoid to occur showing the non-uniform situation of bad or picture in peripheral region during display picture.
By above-mentioned configuration, can reduce that brightness disproportionation occurs in the edge of its face inner region 114 for display device 110A can
Can property.Furthermore, it is understood that if the height of the top opposing substrate 112 of gap particles 134A is opposite with the top of gap particles 134B
When the height of substrate 112 is substantially the same, space between substrate 112 and opposite substrate 150 will by separation material 132A and
Gap particle 134A is strutted, and causes display device 110A the edge of its face inner region 114 can there is a phenomenon where brightness irregularities.It is right
This, the height of the top opposing substrate 112 due to having downgraded gap particles 134A by groove 126A, therefore can prevent substrate 112
Space between opposite substrate 150 is strutted by separation material 132A and gap particles 134A, is existed so as to reduce display device 110A
The possibility of brightness disproportionation occurs for the edge of its face inner region 114.
In conclusion the display device of the present invention includes substrate, opposite substrate, insulating layer, separation material and gap particles.Absolutely
Edge layer and separation material are connected on substrate and opposite substrate between substrate and opposite substrate.Insulating layer has ditch
Groove, wherein separation material can fall in the trench in the upright projection of substrate.Gap particles set in the trench, and positioned at separation material with
Between substrate.By forming groove in insulating layer, the height of the top opposing substrate of gap particles can be downgraded, so as to preventing base
Space between plate and opposite substrate is strutted by separation material and gap particles, and reduces display device in the edge of its face inner region
The possibility of brightness disproportionation occurs.
Although the present invention is disclosed as above with numerous embodiments, so it is not limited to the present invention, any this area
Technical staff, without departing from the spirit and scope of the present invention, when can make various variation and retouching, therefore the protection of the present invention
Scope is when being subject to appended as defined in claim.
Claims (10)
1. a kind of display device, there is a face inner region and around a peripheral region of the face inner region, comprising:
One substrate and an opposite substrate, are oppositely arranged;
One insulating layer, is arranged on the substrate, and in the face inner region and the peripheral region, wherein the insulating layer has at least
One groove, an at least groove are located at an at least fringe region for the peripheral region;
An at least separation material, is arranged at the opposite substrate, and there are a spacing, the wherein gap between the separation material and the substrate
Thing is overlapping with the groove in the upright projection of the substrate;And
Colloid layer, is arranged on the substrate, and in the peripheral region, wherein a part for the colloid layer be located at the substrate and
Between the separation material and position is in the groove.
2. an edge of display device as claimed in claim 1, the wherein separation material and an edge of the substrate trim.
3. display device as claimed in claim 1, the wherein separation material in the substrate the upright projection and the insulating layer in
It is separated by one first distance W, and 3 microns between the upright projection of the substrate<W<10 microns.
4. display device as claimed in claim 1, the wherein insulating layer have the phase that two grooves are located at the peripheral region respectively
To two edges region.
5. display device as claimed in claim 1, also includes:
Multiple gap particles, are arranged in the colloid layer, and the plurality of gap particles of which part are located at the substrate and the separation material
Between.
6. display device as claimed in claim 5, wherein at least one gap particles contact the substrate and the separation material.
7. display device as claimed in claim 5, also includes:
One conductive layer, is arranged on the opposite substrate;And
One conductive pad, is arranged on the substrate, and between the substrate and the conductive layer, wherein the conduction is padded on the substrate
Upright projection be mutually mutually separated in the upright projection on the substrate with the separation material, wherein the plurality of gap particles is wherein another
It is a part of conductive, and contact the conductive layer and the conductive pad.
8. the display device described in claim 1, also includes:
An at least switch element, is arranged in the face inner region of the substrate.
9. display device as claimed in claim 8, the wherein insulating layer include a gate insulator and a passivation layer, wherein should
Gate insulator is arranged on the substrate and contacts the substrate, which is arranged on the gate insulator and covers this at least
One switch element, and the passivation layer of the colloid layer covering part.
10. the display device as described in claim 1 or 4, also includes:
An at least gate driving circuit, is arranged in the peripheral region of the substrate, and between the groove and the face inner region.
Applications Claiming Priority (2)
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TW106137212A TWI637217B (en) | 2017-10-27 | 2017-10-27 | Display device |
TW106137212 | 2017-10-27 |
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Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN109686767A (en) * | 2018-11-20 | 2019-04-26 | 友达光电股份有限公司 | Display device and its manufacturing method |
CN110398848A (en) * | 2019-07-22 | 2019-11-01 | 深圳市华星光电半导体显示技术有限公司 | A kind of light shield, array substrate and preparation method thereof |
WO2021218447A1 (en) * | 2020-04-30 | 2021-11-04 | 京东方科技集团股份有限公司 | Display substrate and method for manufacturing same, and display device |
CN113687545A (en) * | 2021-08-24 | 2021-11-23 | 京东方科技集团股份有限公司 | Panel frame sealing structure, display panel and manufacturing method of display panel |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TWI744034B (en) * | 2020-10-14 | 2021-10-21 | 友達光電股份有限公司 | Display panel |
Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2007121687A (en) * | 2005-10-28 | 2007-05-17 | Epson Imaging Devices Corp | Liquid crystal display device |
CN101697043A (en) * | 2009-06-24 | 2010-04-21 | 深超光电(深圳)有限公司 | Liquid crystal display panel |
CN101699335A (en) * | 2009-06-24 | 2010-04-28 | 深超光电(深圳)有限公司 | Liquid crystal display panel and manufacturing method thereof |
CN105242446A (en) * | 2015-11-09 | 2016-01-13 | 深圳市华星光电技术有限公司 | Manufacturing method for liquid crystal display panel |
CN106483717A (en) * | 2015-08-31 | 2017-03-08 | 乐金显示有限公司 | Liquid crystal indicator |
Family Cites Families (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2010139953A (en) * | 2008-12-15 | 2010-06-24 | Hitachi Displays Ltd | Liquid crystal display device |
CN102707465B (en) * | 2012-06-13 | 2015-06-10 | 深圳市华星光电技术有限公司 | Liquid crystal display device and manufacturing method thereof |
JP6220592B2 (en) * | 2013-07-30 | 2017-10-25 | 株式会社ジャパンディスプレイ | Liquid crystal display element and manufacturing method thereof |
TW201609403A (en) * | 2014-09-01 | 2016-03-16 | 中華映管股份有限公司 | Manufacturing method of display panel |
-
2017
- 2017-10-27 TW TW106137212A patent/TWI637217B/en active
- 2017-12-19 CN CN201711369691.2A patent/CN108010925B/en active Active
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2007121687A (en) * | 2005-10-28 | 2007-05-17 | Epson Imaging Devices Corp | Liquid crystal display device |
CN101697043A (en) * | 2009-06-24 | 2010-04-21 | 深超光电(深圳)有限公司 | Liquid crystal display panel |
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CN105242446A (en) * | 2015-11-09 | 2016-01-13 | 深圳市华星光电技术有限公司 | Manufacturing method for liquid crystal display panel |
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TWI637217B (en) | 2018-10-01 |
CN108010925B (en) | 2020-06-23 |
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