CN107963607A - A kind of all standing getter wafer scale electronic component and its method for packing - Google Patents
A kind of all standing getter wafer scale electronic component and its method for packing Download PDFInfo
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- CN107963607A CN107963607A CN201711036185.1A CN201711036185A CN107963607A CN 107963607 A CN107963607 A CN 107963607A CN 201711036185 A CN201711036185 A CN 201711036185A CN 107963607 A CN107963607 A CN 107963607A
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81B—MICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICAL DEVICES
- B81B7/00—Microstructural systems; Auxiliary parts of microstructural devices or systems
- B81B7/02—Microstructural systems; Auxiliary parts of microstructural devices or systems containing distinct electrical or optical devices of particular relevance for their function, e.g. microelectro-mechanical systems [MEMS]
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81B—MICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICAL DEVICES
- B81B7/00—Microstructural systems; Auxiliary parts of microstructural devices or systems
- B81B7/0032—Packages or encapsulation
- B81B7/0035—Packages or encapsulation for maintaining a controlled atmosphere inside of the chamber containing the MEMS
- B81B7/0038—Packages or encapsulation for maintaining a controlled atmosphere inside of the chamber containing the MEMS using materials for controlling the level of pressure, contaminants or moisture inside of the package, e.g. getters
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
- B81C3/00—Assembling of devices or systems from individually processed components
- B81C3/001—Bonding of two components
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81B—MICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICAL DEVICES
- B81B2201/00—Specific applications of microelectromechanical systems
- B81B2201/02—Sensors
- B81B2201/0207—Bolometers
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81B—MICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICAL DEVICES
- B81B2201/00—Specific applications of microelectromechanical systems
- B81B2201/02—Sensors
- B81B2201/0228—Inertial sensors
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81B—MICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICAL DEVICES
- B81B2201/00—Specific applications of microelectromechanical systems
- B81B2201/02—Sensors
- B81B2201/0264—Pressure sensors
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81B—MICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICAL DEVICES
- B81B2201/00—Specific applications of microelectromechanical systems
- B81B2201/02—Sensors
- B81B2201/0271—Resonators; ultrasonic resonators
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- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
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Abstract
A kind of all standing getter wafer scale electronic component and its method for packing, the basic Component units of all standing getter wafer scale electronic component include following several parts：Device wafers (1), cavity wafer (2)；Two wafer bondings are integrally formed both it by bonding technology, bonding technology is realized by bonded layer (5), is additionally provided with cavity (3) between；Cavity wafer (2) inner surface in cavity (3) or on device wafers (1) surface covered with one layer of active coating, that is, air-breathing Rotating fields (4)；The component of air-breathing Rotating fields (4) is one or a combination set of following several elements and its oxide：Ti, Co, Zr, Fe；The thickness range of air-breathing Rotating fields (4) is in 500nm 2um.The application and preparation physical gas-phase deposition of air-breathing Rotating fields (4)：Sputtering or evaporation or combination.Structure and simple process and low cost of the present invention, technique effect are excellent；With expected more huge economy and social value.
Description
Technical field
It is special the present invention relates to vacuum wafer-level packaging and the structure design and applied technical field of relative electronic components
A kind of all standing getter wafer scale electronic component and its method for packing are not provided.
Background technology
Vacuum Package is an essential link for MEMS, and MEMS device usually has mobilizable portion
Part, in order to ensure these sensitive movable members and sensing unit mechanical performance, it is necessary to allow these sensing units and movable member
It is operated in vacuum environment, needs the movable member that will machine and sensing unit Vacuum Package being connected with the external world for this
Housing inside, here it is Vacuum Package, but if carry out Vacuum Package one by one, from cost, time for all
MEMS high-volume is not met, low cost requires, so wafer-level packaging is imperative, it is whole can to encapsulate completion for once encapsulation
All devices on wafer.In addition to keeping the vacuum of Vacuum Package to remain unchanged, reliable a condition of high vacuum degree chamber is obtained
Body, getter are essential.By the reaction and suction-operated of getter layer and air molecule, keep true in vacuum cavity
Reciprocal of duty cycle remains unchanged.Improve performance and the service life of MEMS devices.
People are highly desirable to obtain a kind of excellent all standing getter wafer scale electronic component of technique effect and its encapsulation
Method.
The content of the invention
The object of the present invention is to provide a kind of excellent all standing getter wafer scale electronic component of technique effect and its envelope
Dress method.
The present invention provides a kind of all standing getter wafer scale electronic component, its basic Component units includes following several
Part：Device wafers 1, cavity wafer 2；Both it by bonding technology bonding be integrally formed, bonding technology by bonded layer 5 come
Realize；Cavity 3 is additionally provided with therebetween in device wafers 1, cavity wafer 2；It is characterized in that：Cavity in cavity 3 is brilliant
Justify 2 inner surfaces or on 1 surface of device wafers all covered with one layer of active coating, that is, air-breathing Rotating fields 4；Gettering layer
The component of structure 4 includes and is not limited to one or a combination set of following several elements and its oxide：Ti, Co, Zr, Fe；Inhale
The thickness range of gas-bearing formation structure 4 is in 500nm-2um；
Following physical vapour deposition (PVD) (PVD) technique of the application and preparations of air-breathing Rotating fields 4：Sputtering or evaporation or the group of the two
Close.
Evaporation refer to the process of semiconductor devices production in vacuum evaporation, so-called vacuum evaporation be exactly put material to be plated and
By plated substrate in vacuum chamber, material to be plated is heated using resistance heating or electron beam, is allowed to evaporate or distils, and flies and arrives quilt
The technique of plated substrate surface aggregation film forming.Film forming can reduce the atom of evaporation material, molecule in flight substrate under vacuum
During collision between gas molecule, reduce the chemistry of bioactive molecule in gas and evaporation material and evaporation source material key instead
It (should such as aoxidize), and reduce gas molecule in film forming procedure and enter in film the amount for becoming impurity, so as to improve film
Consistency, purity, sedimentation rate and the adhesive force with substrate.Sputtering refers to high energy particle (typically by electric field acceleration just
Ion) the bombardment surface of solids, the atom of the surface of solids, molecule exchange kinetic energy with incident high energy particle after from surface of solids splashing
Phenomenon out is known as sputtering.The atom (or atomic group) sputtered out has certain energy, they can be with redeposited solidifying
Gather and film is formed on solid substrate surface, be known as sputtered film.Usually gas ionization, its cation are produced using gas discharge
The high velocity bombardment cathode targets under electric field action, hit the atom or molecule of cathode targets, fly to plated substrate surface and are deposited into
Film.Sputtering mode generally has d.c. sputtering；Magnetron sputtering；Radio-frequency sputtering；Reactive sputtering etc..
Different devices has different requirements to the vacuum (air pressure) of dual cavity or multi-chamber.Heretofore described air-breathing
Rotating fields 4 are whole cover types, according to the design requirement of different components, can choose whether there is bonding metal layer in the chamber
5, for example, dual cavity design is in Inertial Measurement Unit device primarily directed to design, Inertial Measurement Unit by 3 axis gyroscopes with
3 axis accelerometers form, and wherein gyroscope part needs condition of high vacuum degree chamber, and condition of high vacuum degree is not required in accelerometer part,
So this patent first deposits the getter layer 4 of all standing, but when bonded layer 5 are deposited, using bonded layer 5 as barrier layer
To have blocked the getter layer in high pressure (rough vacuum) chamber so that accelerometer chamber has rough vacuum；Thus keep away
Exempt to remove the getter layer in high pressure chest (rough vacuum) also needing to photoetching process after depositing getter layer.Simplify
Technological process, saves cost, there is provided yield.
The deposition position of getter layer includes but not limited to 2 internal layer surface of cavity wafer, is needed not for different devices
Same position, such as：Inertial Measurement Unit is mainly the deposited inside in cavity wafer 2, and pressure sensor (Fig. 2), infrared biography
Sensor (Fig. 3) is deposited in non-device wafer segment.
And sealant is not air-breathing Rotating fields, and sealing ring belongs to likewise, belonging to bonded layer 5.It is described to carry air-breathing
The vacuum wafer-level packaging electronic component of agent, it is characterised in that：Cavity 3 is specially the single-chamber for corroding formation on cavity wafer 2
Body either dual chamber or Multicarity；When for dual chamber or Multicarity when each cavity 3 can be same depth cavity or not
With depth cavity；Caustic solution is using wet etching, dry etching either the two combined method etching.
Silicon Wafer, due to different crystal orientations corrosion resistance difference, can form different etching pattern in KOH or TMAH solution.
The MEMS cavity wafer finished products formed after corrosion, the requirement covered before gettering layer is that surface is substantially smooth, through over cleaning.
Wet etching mainly utilizes the anisotropic properties of silicon, and being that a kind of body silicon of common manufacture micro mechanical structure is micro- adds
Work technology, because it realizes relatively easy, cost also relative moderate.Anisotropy refers to corrosion of all alkaline etchings to silicon
All it is anisotropic, etch-rate depends on crystal orientation.Most fast erosional surface is typically (100), and (111) rate of corrosion is most
Low, its decomposition rate is limited to Chemical Kinetics.For isotropic etchant, decompose by with semiconductor react from
The diffusion rate of son determines.Anisotropy can be clearly viewed by surface profile.If silicon wafer surface (100) is by etching
Mask patterning, erosional surface are limited by (111), and the shape of final eroded crater is a V-shaped groove or an inverted pyramid.Corrosion
Side is alignd with (110), unrelated with the original shape of etching mask.
Due to anisotropy, the structure size on (100) silicon is always limited by minimum dimension.<100>With<111>It
Between angle be 54.74 °.Therefore, dell depth A its minimum widith of an etching is 2A/tan (54.74 °).Use (110)
Silicon Wafer may can improve the low depth-width ratio of wet etching.Since (111) face to provide constraints is perpendicular to (110) face.Cause
This, the angle between the side wall of etch pit and surface is 90 °.Most common corrosive agent be ethylene diamine pyrocatechol (EDP), hydrazine,
KOH solution and tetramethylammonium hydroxide (TMAH).The above two are hypertoxic, are needed in processing procedure especially careful.In contrast, rear two
Person is more favourable.
The air-breathing Rotating fields 4 of 2 inner surface of cavity wafer or the covering of 1 surface of device wafers in cavity 3, cavity wafer 2
It there are bonded layer 5 between device wafers 1；Its bonding technology is one of the following or a combination thereof：Metal eutectic bonding, sun
Pole be bonded, high temperature bonding, low-temperature bonding, metal solder bonds, glass paste bonding, bond wire for gold, chromium, aluminium, tin, indium,
One of aluminium, germanium etc. or its combination.
Bonded layer 5 also serves as barrier layer, in the design of two-chamber or multi-chamber, is inhaled for being covered in low vacuum chamber
Gas oxidant layer 4, rough vacuum in holding chamber body.
Bonding technology refers to utilize pressure, temperature, electrostatic or chemical method so that the skill that two wafers are bonded together
Art.Wafer scale bonding techniques refer to by chemically and physically acting on that silicon chip and silicon chip, silicon chip and glass or other materials is close
The method that ground combines.Wafer bonding is often combined with surface silicon processing and silicon bulk fabrication, used in the processing technology of MEMS
In.Common wafer scale bonding techniques include anode linkage, metal bonding and glass solder sintering etc..Anode linkage technology can be with
Glass any binding agent is not had into together with metal, alloy or bonding semiconductor.This bonding temperature is low, bonded interface is firm
Gu, long-time stability it is good.Metal bonding technology can generally be divided into two classes：Non-melt type diffusion method and self-planarization are (molten
Change) eutectic reaction.When with both technologies, it can choose what is be adapted to respectively according to desirable technical parameter and requirement
Metal system.
In all standing getter wafer scale electronic component, cavity 3 is specially the two-chamber that cavity wafer 2 is corroded to formation
Body；Wherein：Air-breathing Rotating fields 4 are provided with 2 inner side cavity of cavity wafer, 3 inner wall of low pressure chamber；In the cavity wafer 2 of high pressure chest
Air-breathing Rotating fields 4 are provided with 3 inner wall of side chamber body first, the outside of air-breathing Rotating fields 4 is additionally provided with bonded layer 5.Low pressure chamber is used for
Arrange MEMS gyroscope, high pressure chest is used to arrange mems accelerometer；It is collectively forming dedicated Inertial Measurement Unit.
In all standing getter wafer scale electronic component, using the method or two of grinding chemical machinery polishing
The method of person's combination, deep top of chamber is removed, and is formed opening 12, is exposed wire bond pads 13.Herein using different height
Cavity design, it is during being thinned that solder tray local is exposed.(this way saves technological process, and common practices needs first to subtract
It is thin, then pad portion is opened by way of cutting, we use the cavity design of different height, will during being thinned
Pad exposes, and pad is that certain needs expose, it is necessary to do technique again on pad.)
The present invention using reduction process while integral device thickness is reduced, by using different depth dual cavity or
Multiple chamber design, exposes bonding region metal by chamber opening to realize, and other products be all by increasing by one of cutting technique,
The chamber roof for needing to be open is opened.In contrast, we while thinned die (thinned die is necessary technique), just
Bonding region metal is exposed, reduces technological process, avoids some chippings in cutting process, dicing lane etching is asked
Topic.Improve the yield rate of product.This patent can be with simplification of flowsheet, and reducing photoetching number, (photoetching process is microelectronics work
Most crucial technique in skill, and most complicated technique, generally represent complex process degree with photoetching number, reduce by one of photoetching
Mean to reduce many techniques, gluing, front baking, exposes, and development, post bake, etching, removes photoresist, cleaning etc.), simplify technique stream
Cost (including Master Cost, machine loss, labour cost etc.) is decreased while journey, product can also be accelerated by reducing flow
Manufacturing speed so that monthly output increase, monthly income also increases, and in electronics market with keen competition, cost is particularly
It is important.
Key is additionally provided between device wafers 1 and cavity wafer 2 in all standing getter wafer scale electronic component
Close layer 5, its concrete application bond wire or welding compound；Bond wire is one of the following or a combination thereof：Gold, chromium, aluminium,
Tin, indium, aluminium, germanium, copper；Use low-temperature bonding；Welding compound is specially photoetching welding compound；Cavity wafer 2 is specifically infrared fileter；
Its material is silicon, germanium or the combination both it.
The invention further relates to the vacuum packaging method of all standing getter wafer scale electronic component, all standing getter
The basic Component units of wafer scale electronic component include following several parts：Device wafers 1, cavity wafer 2；Fixed dress both it
With being integrated, cavity 3 is additionally provided between；It is characterized in that：2 surface of cavity wafer in cavity 3 covers one layer
Active coating, that is, air-breathing Rotating fields 4；The component of air-breathing Rotating fields 4 is one or a combination set of following several elements：Ti,
Co, Zr, Fe；The thickness range of air-breathing Rotating fields 4 is in 500nm-2um.
The vacuum packaging method of all standing getter wafer scale electronic component, it is characterised in that：Air-breathing Rotating fields 4
The following physical vapour deposition (PVD) PVD process of application and preparation：Sputtering or evaporation or combination；Specifically heated using electron beam
Or electron beam deflects bombardment target under magnetic field, by evaporation of metal or pound, be attached to crystal column surface.Sputtering, steams
Hair belongs to physical vapour deposition (PVD) PVD methods.
Cavity 3 is specially that cavity wafer 2 is corroded the single-chamber body of formation either dual chamber or Multicarity.For cavity 3
Caustic solution specifically using wet etching, dry etching either the two combined method etching.Silicon Wafer is molten in KOH or TMAH
Liquid can form different etching pattern since different crystal orientations corrosion resistance is different.The MEMS cavitys wafer formed after corrosion into
Product, the requirement covered before gettering layer is that surface is substantially smooth, through over cleaning.
The air-breathing Rotating fields 4 of 2 inner surface of cavity wafer or the covering of 1 surface of device wafers in cavity 3, cavity wafer 2
It there are bonded layer 5 between device wafers 1；Its bonding technology is metal eutectic bonding, anode linkage, and high temperature is bonded, low temperature
Bonding, metal solder bonds, glass paste bonding one of them or its combination, bond wire include and be not limited to it is following it is several it
One or its combination：Gold, chromium, aluminium, tin, indium, aluminium, germanium.Bonded layer 5 also serves as barrier layer, in the design of two-chamber or multi-chamber,
For covering getter layer 4 in low vacuum chamber, rough vacuum in holding chamber body.
In all standing getter wafer scale electronic component, cavity 3 is preferably the two-chamber that cavity wafer 2 is corroded to formation
Body；Wherein：Air-breathing Rotating fields 4 are provided with 2 inner side cavity of cavity wafer, 3 inner wall of low pressure chamber；In the cavity wafer 2 of high pressure chest
Air-breathing Rotating fields 4 are provided with 3 inner wall of side chamber body first, the outside of air-breathing Rotating fields 4 is additionally provided with anti-reflection layer 5.
The vacuum packaging method of all standing getter wafer scale electronic component requires as follows：Device wafers 1, cavity are brilliant
Circle 2；It is integrally formed both it by bonding technology bonding, bonding technology is realized by bonded layer 5；In device wafers 1, cavity
Wafer 2 is additionally provided with therebetween cavity 3；2 inner surface of cavity wafer in cavity 3 or whole on 1 surface of device wafers
Covered with one layer of active coating, that is, air-breathing Rotating fields 4；By being thinned or chemical machinery polishing technique removes deep top of chamber
Fall, form opening 12, the partial structurtes to exposing outside wire bond pads 13；Wire bond pads 13 pass through lead key closing process
Plain conductor is drawn, is connected with miscellaneous part.
The present invention can use the method for grinding to open the cavity with gettering layer, this is to utilize wafer thinning technique, will
Cavity 3 is opened, and is exposed inside cavity 3, what this was mainly determined by device architecture.
The general correlation technique that can apply the present invention for requiring device to have Vacuum Package.Such as：MEMS inertia sensings
Device, infrared sensor, absolute pressure pressure sensor, FBAR etc..
The additional explanation of related content of the present invention is described as follows：
The application of gettering layer can reduce sluggishness.Appropriate packaged type can reduce temperature drift and time drift.
One of innovation key of the present invention is：Air-breathing Rotating fields (4) are that (that is, suction is completely covered in continuous layer structure
Gas oxidant layer) and uninterrupted structure.Other method for packing with getter layer are all with the suction with figure in the prior art
Gas oxidant layer.The present invention simplifies getter deposit technique from technique, reduces one of photoetching process, cost reduction.In two-chamber
In encapsulation, since different chamber requires different air pressures (vacuum), the present invention is used while deposited metal bonded layer, by gold
Belong to bonded layer to shelter from the getter layer being not required in the chamber of high vacuum as barrier layer (bonding metal layer), realize high gas
Press (rough vacuum), can equally reduce by one layer of photolithography plate, reduce photoetching, etch process flow, simplification of flowsheet, reduces
Production cost；We using reduction process while integral device thickness is reduced, by using different depth dual cavity or
Multiple chamber design, exposes bonding region metal by chamber opening to realize, and other products be all by increasing by one of cutting technique,
The chamber roof for needing to be open is opened.In contrast, we while thinned die (thinned die is necessary technique), just
Bonding region metal is exposed, reduces technological process, avoids some chippings in cutting process, dicing lane etching is asked
Topic.
Brief description of the drawings
Below in conjunction with the accompanying drawings and embodiment the present invention is described in further detail：
Fig. 1 is typical dual cavity difference vacuum wafer-level vacuum packaged electronic component structure simplified schematic diagram；
Fig. 2 is absolute pressure pressure sensor (all standing getter wafer-level vacuum packaged) structure schematic diagram；
Fig. 3 is infrared sensor (all standing getter wafer-level vacuum packaged) structure schematic diagram；
Fig. 4 is different depth two-chamber all standing getter wafer-level vacuum packaged structure schematic diagram；
Fig. 5 is different depth two-chamber all standing getter wafer-level vacuum packaged structure schematic diagram.
Embodiment
Reference numeral implication is as follows：Device wafers 1, cavity wafer 2, cavity 3, air-breathing Rotating fields 4, anti-reflection layer 5, sealing ring
6。
In Fig. 4, pad has to expose, and using different depth chamber design, while chip thinning is done, will weld
The chamber of disk top is opened, and reduces technological process, is opened avoiding after with the mode cut, and chipping occurs, offset, chip fly
Go out, the defects of blue film is cut through, yield rate can be effectively improved.Fig. 5 is different depth two-chamber all standing getter wafer scale vacuum
Encapsulating structure simplified schematic diagram, it opens high chamber, exposed pad by reduction process.
Embodiment 1
A kind of all standing getter wafer scale electronic component, its basic Component units include following several parts：Device is brilliant
Circle 1, cavity wafer 2；It is integrally formed both it by bonding technology bonding, bonding technology is realized by bonded layer 5；In device
Wafer 1, cavity wafer 2 are additionally provided with therebetween cavity 3；2 inner surface of cavity wafer in cavity 3 or brilliant in device
1 surface of circle is all covered with one layer of active coating, that is, air-breathing Rotating fields 4；The component of air-breathing Rotating fields 4 includes and unlimited
Combination and its oxide in following several elements：Ti, Co, Zr, Fe；The thickness range of air-breathing Rotating fields 4 is in 500nm-2um；
Following physical vapour deposition (PVD) (PVD) technique of the application and preparations of air-breathing Rotating fields 4：Sputtering, the combination of evaporation.Evaporation
Refer to the process of the vacuum evaporation in semiconductor devices production, so-called vacuum evaporation is exactly to put material to be plated and by plated substrate in true
In empty room, material to be plated is heated using resistance heating or electron beam, is allowed to evaporate or distils, and flies and is coagulated to plated substrate surface
It is polymerized to the technique of film.Under vacuum film forming can reduce the evaporation atom of material, molecule during flight substrate with gas
Intermolecular collision, reduces the bioactive molecule in gas and evaporation material and the chemical reaction of evaporation source material key (such as aoxidizes
Deng), and reduce gas molecule in film forming procedure and enter in film the amount for becoming impurity, so as to improve the consistency of film, pure
Degree, sedimentation rate and the adhesive force with substrate.Sputtering refers to high energy particle (being typically the cation by electric field acceleration) bombardment
The surface of solids, the atom of the surface of solids, molecule show after exchanging kinetic energy with incident high energy particle from what the surface of solids sputtered
As being known as sputtering.The atom (or atomic group) sputtered out has certain energy, they redeposited can condense upon solid
Film is formed on substrate surface, is known as sputtered film.Gas ionization usually is produced using gas discharge, its cation is made in electric field
With lower high velocity bombardment cathode targets, the atom or molecule of cathode targets are hit, plated substrate surface is flown to and is deposited into film.Sputtering
Mode generally has d.c. sputtering；Magnetron sputtering；Radio-frequency sputtering；Reactive sputtering etc..
Different devices has different requirements to the vacuum (air pressure) of dual cavity or multi-chamber.Heretofore described air-breathing
Rotating fields 4 are whole cover types, according to the design requirement of different components, can choose whether there is bonding metal layer in the chamber
5, for example, dual cavity design is in Inertial Measurement Unit device primarily directed to design, Inertial Measurement Unit by 3 axis gyroscopes with
3 axis accelerometers form, and wherein gyroscope part needs condition of high vacuum degree chamber, and condition of high vacuum degree is not required in accelerometer part,
So this patent first deposits the getter layer 4 of all standing, but when bonded layer 5 are deposited, using bonded layer 5 as barrier layer
To have blocked the getter layer in high pressure (rough vacuum) chamber so that accelerometer chamber has rough vacuum；Thus keep away
Exempt to remove the getter layer in high pressure chest (rough vacuum) also needing to photoetching process after depositing getter layer.Simplify
Technological process, saves cost, there is provided yield.
The deposition position of getter layer includes but not limited to 2 internal layer surface of cavity wafer, is needed not for different devices
Same position, such as：Inertial Measurement Unit is mainly the deposited inside in cavity wafer 2, and pressure sensor (Fig. 2), infrared biography
Sensor (Fig. 3) is deposited in non-device wafer segment.
And sealant is not air-breathing Rotating fields, and sealing ring belongs to likewise, belonging to bonded layer 5.
Cavity 3 is specially to corrode the single-chamber body of formation either dual chamber or Multicarity on cavity wafer 2；When for two-chamber
Each cavity 3 can be same depth cavity or different depth cavity when body or Multicarity；Caustic solution using wet etching,
Both dry etchings combined method etches.
Silicon Wafer, due to different crystal orientations corrosion resistance difference, can form different etching pattern in KOH or TMAH solution.
The MEMS cavity wafer finished products formed after corrosion, the requirement covered before gettering layer is that surface is substantially smooth, through over cleaning.
Wet etching mainly utilizes the anisotropic properties of silicon, and being that a kind of body silicon of common manufacture micro mechanical structure is micro- adds
Work technology, because it realizes relatively easy, cost also relative moderate.Anisotropy refers to corrosion of all alkaline etchings to silicon
All it is anisotropic, etch-rate depends on crystal orientation.Most fast erosional surface is typically (100), and (111) rate of corrosion is most
Low, its decomposition rate is limited to Chemical Kinetics.For isotropic etchant, decompose by with semiconductor react from
The diffusion rate of son determines.Anisotropy can be clearly viewed by surface profile.If silicon wafer surface (100) is by etching
Mask patterning, erosional surface are limited by (111), and the shape of final eroded crater is a V-shaped groove or an inverted pyramid.Corrosion
Side is alignd with (110), unrelated with the original shape of etching mask.
Due to anisotropy, the structure size on (100) silicon is always limited by minimum dimension.<100>With<111>It
Between angle be 54.74 °.Therefore, dell depth A its minimum widith of an etching is 2A/tan (54.74 °).Use (110)
Silicon Wafer may can improve the low depth-width ratio of wet etching.Since (111) face to provide constraints is perpendicular to (110) face.Cause
This, the angle between the side wall of etch pit and surface is 90 °.Most common corrosive agent be ethylene diamine pyrocatechol (EDP), hydrazine,
KOH solution and tetramethylammonium hydroxide (TMAH).The above two are hypertoxic, are needed in processing procedure especially careful.In contrast, rear two
Person is more favourable.
The air-breathing Rotating fields 4 of 2 inner surface of cavity wafer or the covering of 1 surface of device wafers in cavity 3, cavity wafer 2
It there are bonded layer 5 between device wafers 1；Its bonding technology is one of the following or a combination thereof：Metal eutectic bonding, sun
Pole be bonded, high temperature bonding, low-temperature bonding, metal solder bonds, glass paste bonding, bond wire for gold, chromium, aluminium, tin, indium,
Two combination at least within such as aluminium, germanium.
Bonded layer 5 also serves as barrier layer, in the design of two-chamber or multi-chamber, is inhaled for being covered in low vacuum chamber
Gas oxidant layer 4, rough vacuum in holding chamber body.
Bonding technology refers to utilize pressure, temperature, electrostatic or chemical method so that the skill that two wafers are bonded together
Art.Wafer scale bonding techniques refer to by chemically and physically acting on that silicon chip and silicon chip, silicon chip and glass or other materials is close
The method that ground combines.Wafer bonding is often combined with surface silicon processing and silicon bulk fabrication, used in the processing technology of MEMS
In.Common wafer scale bonding techniques include anode linkage, metal bonding and glass solder sintering etc..Anode linkage technology can be with
Glass any binding agent is not had into together with metal, alloy or bonding semiconductor.This bonding temperature is low, bonded interface is firm
Gu, long-time stability it is good.Metal bonding technology can generally be divided into two classes：Non-melt type diffusion method and self-planarization are (molten
Change) eutectic reaction.When with both technologies, it can choose what is be adapted to respectively according to desirable technical parameter and requirement
Metal system.
In all standing getter wafer scale electronic component, cavity 3 is specially the two-chamber that cavity wafer 2 is corroded to formation
Body；Wherein：Air-breathing Rotating fields 4 are provided with 2 inner side cavity of cavity wafer, 3 inner wall of low pressure chamber；In the cavity wafer 2 of high pressure chest
Air-breathing Rotating fields 4 are provided with 3 inner wall of side chamber body first, the outside of air-breathing Rotating fields 4 is additionally provided with bonded layer 5.Low pressure chamber is used for
Arrange MEMS gyroscope, high pressure chest is used to arrange mems accelerometer；It is collectively forming dedicated Inertial Measurement Unit.
In all standing getter wafer scale electronic component, using the method or two of grinding chemical machinery polishing
The method of person's combination, deep top of chamber is removed, and is formed opening 12, is exposed wire bond pads 13.Herein using different height
Cavity design, it is during being thinned that solder tray local is exposed.(this way saves technological process, and common practices needs first to subtract
It is thin, then pad portion is opened by way of cutting, we use the cavity design of different height, will during being thinned
Pad exposes, and pad is that certain needs expose, it is necessary to do technique again on pad.)
The present embodiment uses reduction process while integral device thickness is reduced, by using the dual cavity of different depth
Or multiple chamber design, chamber opening is exposed into bonding region metal to realize, and other products are all by increasing by one of cutter
Skill, it would be desirable to which the chamber roof of opening is opened.In contrast, (thinned die is necessary to the present embodiment while thinned die
Technique), just bonding region metal is exposed, reduces technological process, avoids some chippings in cutting process, dicing lane is carved
The problem of erosion.Improve the yield rate of product.This patent can be with simplification of flowsheet, and reducing photoetching number, (photoetching process is micro-
Most crucial technique in electronic technology, and most complicated technique, generally represent complex process degree with photoetching number, reduce one
Road photoetching means to reduce many techniques, and gluing, front baking, exposes, and development, post bake, etching, removes photoresist, cleaning etc.), simplify
Cost (including Master Cost, machine loss, labour cost etc.) is decreased while technological process, reducing flow can also add
Fast product manufacturing speed so that monthly output increase, monthly income also increases, in electronics market with keen competition, into
This it is particularly important that.
Key is additionally provided between device wafers 1 and cavity wafer 2 in all standing getter wafer scale electronic component
Close layer 5, its concrete application bond wire or welding compound；Bond wire is one of the following or a combination thereof：Gold, chromium, aluminium,
Tin, indium, aluminium, germanium, copper；Use low-temperature bonding；Welding compound is specially photoetching welding compound；Cavity wafer 2 is specifically infrared fileter；
Its material is silicon, germanium or the combination both it.
The vacuum packaging method of all standing getter wafer scale electronic component as described above.
The basic Component units of all standing getter wafer scale electronic component include following several parts：Device wafers
1st, cavity wafer 2；Fixing assembling is integrated both it, is additionally provided with cavity 3 between；Cavity wafer 2 in cavity 3
Surface covers one layer of active coating, that is, air-breathing Rotating fields 4；The component of air-breathing Rotating fields 4 is certain of following several elements
Combination：Ti, Co, Zr, Fe；The thickness range of air-breathing Rotating fields 4 is in 500nm-2um.
The following physical vapour deposition (PVD) PVD process of the application and preparations of air-breathing Rotating fields 4：Sputtering or evaporation or the group of the two
Close；Bombardment target is specifically deflected under magnetic field using electron beam heating or electron beam, by evaporation of metal or pounds,
It is attached to crystal column surface.Sputtering, evaporation belong to physical vapour deposition (PVD) PVD methods.
Cavity 3 is specially that cavity wafer 2 is corroded the single-chamber body of formation either dual chamber or Multicarity.For cavity 3
Caustic solution specifically using wet etching, dry etching either the two combined method etching.Silicon Wafer is molten in KOH or TMAH
Liquid can form different etching pattern since different crystal orientations corrosion resistance is different.The MEMS cavitys wafer formed after corrosion into
Product, the requirement covered before gettering layer is that surface is substantially smooth, through over cleaning.
The air-breathing Rotating fields 4 of 2 inner surface of cavity wafer or the covering of 1 surface of device wafers in cavity 3, cavity wafer 2
It there are bonded layer 5 between device wafers 1；Its bonding technology is metal eutectic bonding, anode linkage, and high temperature is bonded, low temperature
Bonding, metal solder bonds, glass paste bonding one of them or its combination, bond wire include and be not limited to it is following it is several it
One or its combination：Gold, chromium, aluminium, tin, indium, aluminium, germanium.Bonded layer 5 also serves as barrier layer, in the design of two-chamber or multi-chamber,
For covering getter layer 4 in low vacuum chamber, rough vacuum in holding chamber body.
In all standing getter wafer scale electronic component, cavity 3 is the dual chamber that cavity wafer 2 is corroded to formation；
Wherein：Air-breathing Rotating fields 4 are provided with 2 inner side cavity of cavity wafer, 3 inner wall of low pressure chamber；The inner side of cavity wafer 2 of high pressure chest
Air-breathing Rotating fields 4 are provided with 3 inner wall of cavity first, the outside of air-breathing Rotating fields 4 is additionally provided with anti-reflection layer 5.
The vacuum packaging method of all standing getter wafer scale electronic component requires as follows：Device wafers 1, cavity are brilliant
Circle 2；It is integrally formed both it by bonding technology bonding, bonding technology is realized by bonded layer 5；In device wafers 1, cavity
Wafer 2 is additionally provided with therebetween cavity 3；2 inner surface of cavity wafer in cavity 3 or whole on 1 surface of device wafers
Covered with one layer of active coating, that is, air-breathing Rotating fields 4；By being thinned or chemical machinery polishing technique removes deep top of chamber
Fall, form opening 12, the partial structurtes to exposing outside wire bond pads 13；Wire bond pads 13 pass through lead key closing process
Plain conductor is drawn, is connected with miscellaneous part.
The present embodiment can use the method for grinding to open the cavity with gettering layer, this is to utilize wafer thinning technique,
Cavity 3 is opened, is exposed inside cavity 3, what this was mainly determined by device architecture.
The general correlation technique that can apply the present invention for requiring device to have Vacuum Package.Such as：MEMS inertia sensings
Device, infrared sensor, absolute pressure pressure sensor, FBAR etc..
The additional explanation of the present embodiment related content is described as follows：
The application of gettering layer can reduce sluggishness.Appropriate packaged type can reduce temperature drift and time drift.
One of innovation key of the present embodiment is：Air-breathing Rotating fields 4 are that (that is, suction is completely covered in continuous layer structure
Gas oxidant layer) and uninterrupted structure.Other method for packing with getter layer are all with the suction with figure in the prior art
Gas oxidant layer.The present embodiment simplifies getter deposit technique from technique, reduces one of photoetching process, cost reduction.Double
In chamber encapsulation, since different chamber requires different air pressures (vacuum), the present embodiment is used while deposited metal bonded layer,
The getter layer being not required in the chamber of high vacuum is sheltered from using metal bonding layer as barrier layer (bonding metal layer), is realized
Hyperbar (rough vacuum), can equally reduce by one layer of photolithography plate, reduce photoetching, etch process flow, simplification of flowsheet,
Reduce production cost；Using reduction process while integral device thickness is reduced, by using different depth dual cavity or
Multiple chamber design, exposes bonding region metal by chamber opening to realize, and other products be all by increasing by one of cutting technique,
The chamber roof for needing to be open is opened.In contrast, (thinned die is necessary work to the present embodiment while thinned die
Skill), just bonding region metal is exposed, reduces technological process, avoids some chippings in cutting process, dicing lane etching
The problem of.
Embodiment 2
A kind of all standing getter wafer scale electronic component, its basic Component units include following several parts：Device is brilliant
Circle 1, cavity wafer 2；It is integrally formed both it by bonding technology bonding, bonding technology is realized by bonded layer 5；In device
Wafer 1, cavity wafer 2 are additionally provided with therebetween cavity 3；It is characterized in that：2 inner surface of cavity wafer in cavity 3 or
It is all covered with one layer of active coating i.e. air-breathing Rotating fields 4 on 1 surface of device wafers；The component of air-breathing Rotating fields 4
Including and be not limited to one of following several elements：Ti, Co, Zr, Fe；The thickness range of air-breathing Rotating fields 4 is in 500nm-2um；Inhale
Following physical vapour deposition (PVD) (PVD) technique of the application and preparation of gas-bearing formation structure 4：Sputtering or evaporation.
The deposition position of getter layer includes but not limited to 2 internal layer surface of cavity wafer, is needed not for different devices
Same position, such as：Inertial Measurement Unit is mainly the deposited inside in cavity wafer 2, and pressure sensor (Fig. 2), infrared biography
Sensor (Fig. 3) is deposited in non-device wafer segment.
And sealant is not air-breathing Rotating fields, and sealing ring belongs to likewise, belonging to bonded layer 5.
Cavity 3 is specially to corrode the single-chamber body of formation either dual chamber or Multicarity on cavity wafer 2；When for two-chamber
Each cavity 3 can be same depth cavity or different depth cavity when body or Multicarity；Caustic solution using wet etching,
Dry etching either the two combined method etching.
The air-breathing Rotating fields 4 of 2 inner surface of cavity wafer or the covering of 1 surface of device wafers in cavity 3, cavity wafer 2
It there are bonded layer 5 between device wafers 1；Its bonding technology is following one of several：Metal eutectic bonding, anode linkage,
High temperature is bonded, low-temperature bonding, metal solder bonds, and glass paste bonding, bond wire is gold, chromium, aluminium, tin, indium, aluminium, germanium etc.
One of them.
Bonded layer 5 also serves as barrier layer, in the design of two-chamber or multi-chamber, is inhaled for being covered in low vacuum chamber
Gas oxidant layer 4, rough vacuum in holding chamber body.
Bonding technology refers to utilize pressure, temperature, electrostatic or chemical method so that the skill that two wafers are bonded together
Art.Wafer scale bonding techniques refer to by chemically and physically acting on that silicon chip and silicon chip, silicon chip and glass or other materials is close
The method that ground combines.Wafer bonding is often combined with surface silicon processing and silicon bulk fabrication, used in the processing technology of MEMS
In.Common wafer scale bonding techniques include anode linkage, metal bonding and glass solder sintering etc..Anode linkage technology can be with
Glass any binding agent is not had into together with metal, alloy or bonding semiconductor.This bonding temperature is low, bonded interface is firm
Gu, long-time stability it is good.Metal bonding technology can generally be divided into two classes：Non-melt type diffusion method and self-planarization are (molten
Change) eutectic reaction.When with both technologies, it can choose what is be adapted to respectively according to desirable technical parameter and requirement
Metal system.
In all standing getter wafer scale electronic component, cavity 3 is specially the two-chamber that cavity wafer 2 is corroded to formation
Body；Wherein：Air-breathing Rotating fields 4 are provided with 2 inner side cavity of cavity wafer, 3 inner wall of low pressure chamber；In the cavity wafer 2 of high pressure chest
Air-breathing Rotating fields 4 are provided with 3 inner wall of side chamber body first, the outside of air-breathing Rotating fields 4 is additionally provided with bonded layer 5.Low pressure chamber is used for
Arrange MEMS gyroscope, high pressure chest is used to arrange mems accelerometer；It is collectively forming dedicated Inertial Measurement Unit.
In all standing getter wafer scale electronic component, using the method or two of grinding chemical machinery polishing
The method of person's combination, deep top of chamber is removed, and is formed opening 12, is exposed wire bond pads 13.Herein using different height
Cavity design, it is during being thinned that solder tray local is exposed.(this way saves technological process, and common practices needs first to subtract
It is thin, then pad portion is opened by way of cutting, we use the cavity design of different height, will during being thinned
Pad exposes, and pad is that certain needs expose, it is necessary to do technique again on pad.)
The present embodiment uses reduction process while integral device thickness is reduced, by using the dual cavity of different depth
Or multiple chamber design, chamber opening is exposed into bonding region metal to realize, and other products are all by increasing by one of cutter
Skill, it would be desirable to which the chamber roof of opening is opened.In contrast, (thinned die is necessary to the present embodiment while thinned die
Technique), just bonding region metal is exposed, reduces technological process, avoids some chippings in cutting process, dicing lane is carved
The problem of erosion.Improve the yield rate of product.The present embodiment can be with simplification of flowsheet, and reducing photoetching number, (photoetching process is
Most crucial technique in microelectronic technique, and most complicated technique, generally represent complex process degree with photoetching number, reduce
One of photoetching means to reduce many techniques, and gluing, front baking, exposes, and development, post bake, etching, removes photoresist, cleaning etc.), simplify
Cost (including Master Cost, machine loss, labour cost etc.) is decreased while technological process, reducing flow can also
Accelerate product manufacturing speed so that monthly output increase, monthly income also increases, in electronics market with keen competition,
It is particularly important that cost.
Key is additionally provided between device wafers 1 and cavity wafer 2 in all standing getter wafer scale electronic component
Close layer 5, its concrete application bond wire or welding compound；Bond wire is one of the following or a combination thereof：Gold, chromium, aluminium,
Tin, indium, aluminium, germanium, copper；Use low-temperature bonding；Welding compound is specially photoetching welding compound；Cavity wafer 2 is specifically infrared fileter；
Its material is silicon, germanium or the combination both it.
The present embodiment further relates to the vacuum packaging method of all standing getter wafer scale electronic component, all standing air-breathing
The basic Component units of agent wafer scale electronic component include following several parts：Device wafers 1, cavity wafer 2；It is fixed both it
Assembling is integrated, and is additionally provided with cavity 3 between；It is characterized in that：2 surface of cavity wafer covering one in cavity 3
Active coating, that is, air-breathing the Rotating fields 4 of layer；The component of air-breathing Rotating fields 4 is one or a combination set of following several elements：Ti,
Co, Zr, Fe；The thickness range of air-breathing Rotating fields 4 is in 500nm-2um.
The following physical vapour deposition (PVD) PVD process of the application and preparations of air-breathing Rotating fields 4：Sputtering or evaporation；Specifically utilize
Electron beam heats or electron beam deflects bombardment target under magnetic field, by evaporation of metal or pounds, is attached to wafer table
Face.Sputtering, evaporation belong to physical vapour deposition (PVD) PVD methods.
Cavity 3 is specially that cavity wafer 2 is corroded the single-chamber body of formation either dual chamber or Multicarity.For cavity 3
Caustic solution specifically using wet etching, dry etching either the two combined method etching.Silicon Wafer is molten in KOH or TMAH
Liquid can form different etching pattern since different crystal orientations corrosion resistance is different.The MEMS cavitys wafer formed after corrosion into
Product, the requirement covered before gettering layer is that surface is substantially smooth, through over cleaning.
The air-breathing Rotating fields 4 of 2 inner surface of cavity wafer or the covering of 1 surface of device wafers in cavity 3, cavity wafer 2
It there are bonded layer 5 between device wafers 1；Its bonding technology is metal eutectic bonding, anode linkage, and high temperature is bonded, low temperature
Bonding, metal solder bonds, glass paste bonding one of them, bond wire includes and is not limited to following one of several：Gold,
Chromium, aluminium, tin, indium, aluminium, germanium.Bonded layer 5 also serves as barrier layer, in the design of two-chamber or multi-chamber, in low vacuum chamber
Getter layer 4 is covered in room, rough vacuum in holding chamber body.
In all standing getter wafer scale electronic component, cavity 3 is preferably the two-chamber that cavity wafer 2 is corroded to formation
Body；Wherein：Air-breathing Rotating fields 4 are provided with 2 inner side cavity of cavity wafer, 3 inner wall of low pressure chamber；In the cavity wafer 2 of high pressure chest
Air-breathing Rotating fields 4 are provided with 3 inner wall of side chamber body first, the outside of air-breathing Rotating fields 4 is additionally provided with anti-reflection layer 5.
The vacuum packaging method of all standing getter wafer scale electronic component requires as follows：Device wafers 1, cavity are brilliant
Circle 2；It is integrally formed both it by bonding technology bonding, bonding technology is realized by bonded layer 5；In device wafers 1, cavity
Wafer 2 is additionally provided with therebetween cavity 3；2 inner surface of cavity wafer in cavity 3 or whole on 1 surface of device wafers
Covered with one layer of active coating, that is, air-breathing Rotating fields 4；By being thinned or chemical machinery polishing technique removes deep top of chamber
Fall, form opening 12, the partial structurtes to exposing outside wire bond pads 13；Wire bond pads 13 pass through lead key closing process
Plain conductor is drawn, is connected with miscellaneous part.
The present embodiment can use the method for grinding to open the cavity with gettering layer, this is to utilize wafer thinning technique,
Cavity 3 is opened, is exposed inside cavity 3, what this was mainly determined by device architecture.
The general correlation technique that can apply the present invention for requiring device to have Vacuum Package.Such as：MEMS inertia sensings
Device, infrared sensor, absolute pressure pressure sensor, FBAR etc..
The additional explanation of the present embodiment related content is described as follows：
The application of gettering layer can reduce sluggishness.Appropriate packaged type can reduce temperature drift and time drift.
One of innovation key of the present embodiment is：Air-breathing Rotating fields (4) are that continuous layer structure (that is, is completely covered
Getter layer) and uninterrupted structure.Other method for packing with getter layer are all with figure in the prior art
Getter layer.The present embodiment simplifies getter deposit technique from technique, reduces one of photoetching process, cost reduction.
In two-chamber encapsulation, since different chamber requires different air pressures (vacuum), the present embodiment is used in the same of deposited metal bonded layer
When, the getter layer being not required in the chamber of high vacuum is sheltered from using metal bonding layer as barrier layer (bonding metal layer),
Realize hyperbar (rough vacuum), can equally reduce by one layer of photolithography plate, reduce photoetching, etch process flow, simplify technique
Flow, reduces production cost；We use reduction process while integral device thickness is reduced, by using different depth
Dual cavity or multiple chamber design, expose bonding region metal by chamber opening to realize, and other products are all by one of increase
Cutting technique, it would be desirable to which the chamber roof of opening is opened.In contrast, we (thinned die is must while thinned die
Want technique), just bonding region metal is exposed, reduces technological process, avoids some chippings in cutting process, dicing lane
The problem of etching.
Claims (10)
1. a kind of all standing getter wafer scale electronic component, its basic Component units includes following several parts：Device wafers
(1), cavity wafer (2)；It is integrally formed both it by bonding technology bonding, bonding technology is realized by bonded layer (5)；
Device wafers (1), cavity wafer (2) are additionally provided with therebetween cavity (3)；It is characterized in that：Cavity in cavity (3) is brilliant
Justify (2) inner surface or on device wafers (1) surface all covered with one layer of active coating, that is, air-breathing Rotating fields (4)；
The component of air-breathing Rotating fields (4) includes and is not limited to one or a combination set of following several elements and its oxide：Ti, Co, Zr,
Fe；The thickness range of air-breathing Rotating fields (4) is in 500nm-2um；
The following physical gas-phase deposition of the application and preparations of air-breathing Rotating fields (4)：Sputtering or evaporation or combination.
2. according to all standing getter wafer scale electronic component described in claim 1, it is characterised in that：Cavity (3) specially exists
Corrode the single-chamber body of formation either dual chamber or Multicarity on cavity wafer (2)；When for dual chamber or Multicarity when it is each
Cavity (3) is same depth cavity or different depth cavity；Caustic solution is using wet etching, dry etching either the two group
Conjunction method etches.
3. according to all standing getter wafer scale electronic component of claim 1 or 2, it is characterised in that：Chamber in cavity (3)
Body wafer (2) inner surface or the air-breathing Rotating fields (4) of device wafers (1) surface covering, cavity wafer (2) and device wafers
(1) it there are bonded layer (5) between；Its bonding technology is one of the following or a combination thereof：Metal eutectic bonding, anode key
Close, high temperature bonding, low-temperature bonding, metal solder bonds, glass paste bonding, bond wire is gold, chromium, aluminium, tin, indium, aluminium, germanium
Deng one of them or its combination.
4. according to all standing getter wafer scale electronic component described in claim 3, it is characterised in that：The all standing getter
In wafer scale electronic component, cavity (3) is specially the dual chamber for forming cavity wafer (2) corrosion；Wherein：The cavity of low pressure chamber
On the inside of wafer (2) air-breathing Rotating fields (4) are provided with cavity (3) inner wall；On the inside of the cavity wafer (2) of high pressure chest in cavity (3)
Air-breathing Rotating fields (4) are provided with wall first, bonded layer (5) is additionally provided with the outside of air-breathing Rotating fields (4).
5. according to all standing getter wafer scale electronic component described in claim 4, it is characterised in that：The all standing getter
In wafer scale electronic component, using the method for the method or the two combination of grinding chemical machinery polishing, by deep top of chamber
Remove, form opening (12), expose wire bond pads (13)；Using the cavity design of different height, during being thinned
Pad is exposed；
Key is additionally provided between device wafers (1) and cavity wafer (2) in all standing getter wafer scale electronic component
Close layer (5), its concrete application bond wire or welding compound；Bond wire is one of the following or a combination thereof：Gold, chromium, aluminium,
Tin, indium, aluminium, germanium, copper etc.；Use low-temperature bonding；Welding compound is specially photoetching welding compound；Cavity wafer (2) is specifically infrared absorption filter
Mating plate；Its material is silicon, germanium or the combination both it.
6. the vacuum packaging method of all standing getter wafer scale electronic component described in a kind of claim 1, all standing is inhaled
The basic Component units of gas agent wafer scale electronic component include following several parts：Device wafers (1), cavity wafer (2)；Secondly
Person's fixing assembling is integrated, and is additionally provided with cavity (3) between；It is characterized in that：Cavity wafer in cavity (3)
(2) surface covering one layer of active coating, that is, air-breathing Rotating fields (4)；The component of air-breathing Rotating fields (4) is following several members
One or a combination set of element：Ti, Co, Zr, Fe；The thickness range of air-breathing Rotating fields (4) is in 500nm-2um.
7. according to the vacuum packaging method of all standing getter wafer scale electronic component described in claim 6, it is characterised in that：Inhale
Following physical vapour deposition (PVD) (PVD) technique of the application and preparation of gas-bearing formation structure (4)：Sputtering or evaporation or combination；Specifically
It is that bombardment target is deflected under magnetic field using electron beam heating or electron beam, by evaporation of metal or pounds, be attached to
Crystal column surface.Sputtering, evaporation belong to physical vapour deposition (PVD) (PVD) method.
8. according to the vacuum packaging method of all standing getter wafer scale electronic component described in claim 7, it is characterised in that：Chamber
Body (3) is specially the single-chamber body for forming cavity wafer (2) corrosion either dual chamber or Multicarity.For the corruption of cavity (3)
Etching method is specifically using wet etching, dry etching either the two combined method etching.
9. according to the vacuum packaging method of all standing getter wafer scale electronic component described in claim 8, it is characterised in that：Chamber
The air-breathing Rotating fields (4) of cavity wafer (2) inner surface or the covering of device wafers (1) surface in body (3), cavity wafer (2)
It there are bonded layer (5) between device wafers (1)；Its bonding technology is metal eutectic bonding, anode linkage, and high temperature is bonded,
Low-temperature bonding, metal solder bonds, glass paste bonding one of them or its combination, bond wire is gold, chromium, aluminium, tin, indium,
One of aluminium, germanium etc. or its combination.
10. according to the vacuum packaging method of all standing getter wafer scale electronic component described in claim 8, it is characterised in that：
In all standing getter wafer scale electronic component, cavity (3) is specially the dual chamber for forming cavity wafer (2) corrosion；
Wherein：On the inside of the cavity wafer (2) of low pressure chamber air-breathing Rotating fields (4) are provided with cavity (3) inner wall；The cavity wafer of high pressure chest
(2) air-breathing Rotating fields (4) are provided with cavity (3) inner wall of inner side first, bonded layer is additionally provided with the outside of air-breathing Rotating fields (4)
(5)；
The vacuum packaging method of all standing getter wafer scale electronic component requires as follows：Device wafers (1), cavity wafer
(2)；It is integrally formed both it by bonding technology bonding, bonding technology is realized by bonded layer (5)；Device wafers (1),
Cavity wafer (2) is additionally provided with therebetween cavity (3)；Cavity wafer (2) inner surface in cavity (3) or brilliant in device
Circle (1) surface is all covered with one layer of active coating, that is, air-breathing Rotating fields (4)；By being thinned or chemical machinery polishing work
Skill removes deep top of chamber, forms opening (12), the partial structurtes to exposing outside wire bond pads (13)；Wire bond pads
(13) plain conductor is drawn by lead key closing process, be connected with miscellaneous part.
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