CN107949188A - Connect the circuit board processing method in hole with NPTH - Google Patents
Connect the circuit board processing method in hole with NPTH Download PDFInfo
- Publication number
- CN107949188A CN107949188A CN201711139713.6A CN201711139713A CN107949188A CN 107949188 A CN107949188 A CN 107949188A CN 201711139713 A CN201711139713 A CN 201711139713A CN 107949188 A CN107949188 A CN 107949188A
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- CN
- China
- Prior art keywords
- hole
- npth
- base material
- circuit board
- processing method
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- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Classifications
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/42—Plated through-holes or plated via connections
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/09654—Shape and layout details of conductors covering at least two types of conductors provided for in H05K2201/09218 - H05K2201/095
- H05K2201/09672—Superposed layout, i.e. in different planes
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- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
Abstract
The present invention relates to a kind of circuit board processing method for connecting hole with NPTH, including step：1) datum hole is shaped on base material；2) heavy copper, plate electricity and printed wire are carried out to base material；3) with anti-plate film covering datum hole, graphic plating is carried out to base material；4) anti-plate film is removed, and base material is etched；5) hole being connected with datum hole is shaped on base material, connects hole to form NPTH.The above-mentioned circuit board processing method for connecting hole with NPTH, only first processing NPTH connect the datum hole in hole, do not shape first and entirely connect hole, lead to after printed wire and state anti-plate film covering datum hole, avoid forming layers of copper and protective layer in datum hole.Step is being etched to base material and then the hole being connected with datum hole is shaped on base material, is connecting hole to form NPTH.In this way, NPTH is connected hole is divided into datum hole and hole two parts, and processed respectively in different processes, the burr of the junction in the company of avoiding hole, which easily punctures anti-plate film, causes even have copper in hole, and not increase manufacture cost.
Description
Technical field
The present invention relates to printed circuit board (PCB) manufacturing technology field, adds more particularly to a kind of circuit board for connecting hole with NPTH
Work method.
Background technology
With the high speed development of electronics industry, so as to promote the design of printed circuit board (PCB) to light, thin, small and multifunctional direction
Development.Required precision for the location hole or mounting hole of printed circuit board (PCB) is higher and higher.However, have in location hole or mounting hole
Copper, when installation, can then seriously affect the positioning accuracy of printed circuit board (PCB), even result in and scrap.Therefore, it is necessary to will be solid after location hole
Determine hole machined Cheng Wuchen copper hole (i.e. NPTH holes), and usually need to use NPTH and connect hole, i.e., the hole wall in two NPTH holes intersect and
Connection.
The method that traditional processing NPTH connects hole is first to carry out Drilling operation, drills out two holes, then to printed circuit board (PCB)
Carry out covering even hole by anti-plate film in the processing step of figure electricity, prevent in the processing step plating solution infiltration into even hole
It is interior, avoid the layers of copper in hole from thickening and plate protection tin layers.However, since drilling machine precision is not high, even the junction in hole is easy
Burr is produced, and is difficult to remove.Lian Kongshi is covered in anti-plate film, burr is easy to puncture anti-plate film so that in figure electricity
Processing step in the layers of copper that connects in hole be thickened and electroplate and gone up protection tin layers, be very difficult to remove, so as to cause NPTH to connect in hole
There is heavy copper.
At present, when solving the above problems, using two methods：First, the work that increase by two is bored after heavy copper is even formed in hole
Skill step.However, this method increase technological process, manufacture cost is added；Second, using thicker dry film, prevent from being pierced
Wear.Thick dry film price is high, serious increase manufacture cost.
The content of the invention
Based on this, it is necessary to which the burr formed for the junction for connecting hole in traditional processing method easily punctures anti-plate
Film, causing NPTH to connect in hole has heavy copper, the technical problem of increase manufacture cost, there is provided one kind can ensure that even does not have copper and system in hole
Cause this low circuit board processing method that there is NPTH to connect hole.
Connect the circuit board processing method in hole, including step with NPTH：
1) datum hole is shaped on base material；
2) heavy copper, plate electricity and printed wire are carried out to the base material；
3) datum hole is covered using anti-plate film, graphic plating is carried out to the base material；
4) the anti-plate film is removed, and the base material is etched；
5) hole being connected with the datum hole is shaped on the substrate, connects hole to form the NPTH.
It is above-mentioned to connect the circuit board processing method in hole with NPTH, the NPTH is only processed first connects the datum hole in hole,
Do not shape first and entirely connect hole, the datum hole is covered by the anti-plate film after the circuit is printed, is avoided
The layers of copper and the protective layer are formed in the datum hole.Step is being etched and then in the base material to the base material
It is upper to shape the hole being connected with the datum hole, connect hole to form the NPTH.In this way, by the NPTH connect hole be divided into it is described
Datum hole and described hole two parts, and processed respectively in different processes, avoid the burr of the even junction in hole
Easily puncturing the anti-plate film causes have copper in the company hole, and increase manufacture cost.
In one embodiment, the datum hole is shaped using drilling method in the step 1).
In one embodiment, the step 5) further includes：
Shape the base material gabarit.
In one embodiment, the hole and the base material gabarit are shaped using milling method in the step 5).
In this way, the hole machined is added in the process of the base material sharp processing shaping, do not increase new process additionally, so that
Reduce cost.
In one embodiment, carrying out graphic plating to the base material in the step 3) includes：
Plating forms layers of copper, and the electro-cladding in the layers of copper on the substrate.In this way, avoid to base material into
Row subsequent handling is corroded or destroys when processing.
In one embodiment, the protective layer is tin layers or golden nickel layer.
In one embodiment, step is further included between the step 4) and step 5)：
Solder mask is shaped in the substrate surface.
In one embodiment, step is further included after the step of substrate surface forms solder mask：
Print character on the substrate.
In one embodiment, step is further included after the step 5)：
Electrical testing is carried out to the circuit.
In one embodiment, the circuit is being carried out to further include step after electrical testing step：
Final inspection is carried out to the base material.
Brief description of the drawings
Fig. 1 is to have the circuit board processing method flow chart that NPTH connects hole in an embodiment of the present invention；
Fig. 2 is the structure of each step rear substrate of middle execution of the circuit board processing method for connecting hole with NPTH shown in Fig. 1
Schematic diagram.
Embodiment
For the ease of understanding the application, the application is described more fully below with reference to relevant drawings.In attached drawing
Give the preferred embodiment of the application.But the application can realize in many different forms, however it is not limited to herein
Described embodiment.On the contrary, the purpose for providing these embodiments is to make the understanding to the disclosure more saturating
It is thorough comprehensive.
It should be noted that when element is referred to as " being fixed on " another element, it can be directly on another element
Or there may also be element placed in the middle.When an element is considered as " connection " another element, it can be directly connected to
To another element or it may be simultaneously present centering elements.Term as used herein " vertical ", " horizontal ", " left side ",
" right side " and similar statement are for illustrative purposes only.
Unless otherwise defined, all of technologies and scientific terms used here by the article and the technical field of the application is belonged to
The normally understood implication of technical staff is identical.The term used in the description of the present application is intended merely to description tool herein
The purpose of the embodiment of body, it is not intended that in limitation the application.Term as used herein " and/or " include one or more phases
The arbitrary and all combination of the Listed Items of pass.
As shown in Figures 1 and 2, there is the circuit board processing method that NPTH connects hole, including step in one embodiment of the invention
Suddenly：
S101：Datum hole 10 is shaped on base material.
S102：Heavy copper, plate electricity and printed wire are carried out to base material.To form heavy copper 12 and circuit in substrate surface.
S103：Datum hole 10 is covered using anti-plate film 14, graphic plating is carried out to base material.
S104：Anti-plate film 14 is removed, and base material is etched, to remove the heavy copper in datum hole 10.
S105：The hole 18 being connected with datum hole is shaped on base material, connects hole to form NPTH (figure is not marked).
The above-mentioned circuit board processing method for connecting hole with NPTH, only first processing NPTH connect the datum hole 10 in hole, not first
Shape and entirely connect hole, the datum hole 10 is covered by anti-plate film 14 after printed wire, avoid being formed in the datum hole 10
Layers of copper and protective layer.Step is being etched to base material and then the hole 18 being connected with datum hole 10 is shaped on base material, with shape
Connect hole into NPTH.In this way, NPTH is connected hole is divided into 18 two parts of datum hole 10 and hole, and process, keep away in different processes respectively
The burr for having exempted from the even junction in hole easily punctures anti-plate film and causes even have copper in hole, and increase manufacture cost.
Further, datum hole 10 is shaped on base material using drilling method.
In one embodiment, further included in step S105：
Shape base material gabarit.
Further, using milling method shaped hole 18 and base material gabarit.In this way, since datum hole 10 is processed
Good, the cutter of Milling Process can be carried out Milling Process by datum hole 10 and then shape even hole 18.Hole machined is added to base material shape
In the process shaped, do not increase new process additionally, so as to reduce cost.
In one embodiment, graphic plating is carried out to base material in step S103 to specifically include：
Plating forms layers of copper 16, and the electro-cladding (not shown) in layers of copper 16 on base material, for protecting layers of copper 16,
It is corroded or destroys to avoid when carries out subsequent handling processing to base material.Wherein, datum hole 10 is covered by anti-plate film 14 so that
To base material carry out graphic plating when, avoid for shape NPTH holes datum hole 10 in be plated upper layers of copper and protective layer.Can be with
Understand, if necessary to shape edge PTH hole 20 (i.e. heavy copper hole), then the datum hole for being used to shape edge PTH hole 10 is avoided the need for anti-electricity
Plated film covers.
Further, which can be tin layers or golden nickel layer.
Further, anti-plate film 14 can be dry film or wet film.
In one embodiment, base material is etched in step S104 and specifically included：
The copper corrosion in the layers of copper 16 at logicalnot circuit position and datum hole 10 is removed using chemical reaction method.
In one embodiment, step S110 is further included between step S104 and step S105：
Solder mask is formed in substrate surface.
Further, step S120 is further included after step silo：
In printing on substrates character.
In one embodiment, step S130 is further included after step S105：
Electrical testing is carried out to circuit.Wherein, the base material of electrical testing qualification enters subsequent processing；The underproof base material of electrical testing
Corresponding process is back to reprocess.
In one embodiment, step S140 is further included after step s 130：
Final inspection is carried out to base material.Specifically, overall inspection carries out base material by range estimation.
In one embodiment, step S150 is further included after step s 140：
One layer of anti oxidation layer is shaped in the exposed layers of copper 16 for not covering solder mask, to protect layers of copper to be not easy to be aoxidized, from
And ensure that there is good welding performance.Specific in one embodiment, which can be tin layers.
Each technical characteristic of embodiment described above can be combined arbitrarily, to make description succinct, not to above-mentioned reality
Apply all possible combination of each technical characteristic in example to be all described, as long as however, the combination of these technical characteristics is not deposited
In contradiction, the scope that this specification is recorded all is considered to be.
Embodiment described above only expresses the several embodiments of the present invention, its description is more specific and detailed, but simultaneously
Cannot therefore it be construed as limiting the scope of the patent.It should be pointed out that come for those of ordinary skill in the art
Say, without departing from the inventive concept of the premise, various modifications and improvements can be made, these belong to the protection of the present invention
Scope.Therefore, the protection domain of patent of the present invention should be determined by the appended claims.
Claims (10)
1. connect the circuit board processing method in hole with NPTH, it is characterised in that including step：
1) datum hole is shaped on base material；
2) heavy copper, plate electricity and printed wire are carried out successively to the base material；
3) datum hole is covered using anti-plate film, graphic plating is carried out to the base material；
4) the anti-plate film is removed, and the base material is etched；
5) hole being connected with the datum hole is shaped on the substrate, connects hole to form the NPTH.
2. the circuit board processing method according to claim 1 for connecting hole with NPTH, it is characterised in that in the step 1)
The datum hole is shaped using drilling method.
3. the circuit board processing method according to claim 1 for connecting hole with NPTH, it is characterised in that the step 5) is also
Including：
Shape the base material gabarit.
4. the circuit board processing method according to claim 3 for connecting hole with NPTH, it is characterised in that in the step 5)
The hole and the base material gabarit are shaped using milling method.
5. the circuit board processing method according to claim 1 for connecting hole with NPTH, it is characterised in that in the step 3)
Carrying out graphic plating to the base material includes：
Plating forms layers of copper, and the electro-cladding in the layers of copper on the substrate.
6. according to claim 5 connect the circuit board processing method in hole with NPTH, it is characterised in that the protective layer is
Tin layers or golden nickel layer.
7. according to claim 1 connect the circuit board processing method in hole with NPTH, it is characterised in that the step 4) with
Step is further included between step 5)：
Solder mask is shaped in the substrate surface.
8. the circuit board processing method according to claim 7 for connecting hole with NPTH, it is characterised in that in the base material table
Face further includes step after forming the step of solder mask：
Print character on the substrate.
9. the circuit board processing method according to claim 1 for connecting hole with NPTH, it is characterised in that in the step 5)
Step is further included afterwards：
Electrical testing is carried out to the circuit.
10. the circuit board processing method according to claim 1 for connecting hole with NPTH, it is characterised in that to the line
Road carries out further including step after electrical testing step：
Final inspection is carried out to the base material.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201711139713.6A CN107949188A (en) | 2017-11-16 | 2017-11-16 | Connect the circuit board processing method in hole with NPTH |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201711139713.6A CN107949188A (en) | 2017-11-16 | 2017-11-16 | Connect the circuit board processing method in hole with NPTH |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN107949188A true CN107949188A (en) | 2018-04-20 |
Family
ID=61932668
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201711139713.6A Pending CN107949188A (en) | 2017-11-16 | 2017-11-16 | Connect the circuit board processing method in hole with NPTH |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN107949188A (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108770207A (en) * | 2018-06-05 | 2018-11-06 | 江西旭昇电子有限公司 | PTH connects the processing method of hole burr burr |
| CN108901135A (en) * | 2018-07-13 | 2018-11-27 | 深圳市景旺电子股份有限公司 | A kind of production method of non-metallic macropore |
| CN113905521A (en) * | 2021-09-17 | 2022-01-07 | 胜宏科技（惠州）股份有限公司 | Method for manufacturing circuit board with two different hole copper thicknesses |
Citations (3)
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|---|---|---|---|---|
| EP1198000A1 (en) * | 1994-04-28 | 2002-04-17 | Fujitsu Limited | Semiconductor device and assembly board |
| CN104640380A (en) * | 2013-11-13 | 2015-05-20 | 北大方正集团有限公司 | Non-plating through hole with hole ring making method and printed circuit board manufacturing method |
| CN104883820A (en) * | 2015-05-20 | 2015-09-02 | 深圳崇达多层线路板有限公司 | Manufacturing method for external layer line of asymmetric backboard with warped structure |
-
2017
- 2017-11-16 CN CN201711139713.6A patent/CN107949188A/en active Pending
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP1198000A1 (en) * | 1994-04-28 | 2002-04-17 | Fujitsu Limited | Semiconductor device and assembly board |
| CN104640380A (en) * | 2013-11-13 | 2015-05-20 | 北大方正集团有限公司 | Non-plating through hole with hole ring making method and printed circuit board manufacturing method |
| CN104883820A (en) * | 2015-05-20 | 2015-09-02 | 深圳崇达多层线路板有限公司 | Manufacturing method for external layer line of asymmetric backboard with warped structure |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108770207A (en) * | 2018-06-05 | 2018-11-06 | 江西旭昇电子有限公司 | PTH connects the processing method of hole burr burr |
| CN108770207B (en) * | 2018-06-05 | 2021-05-04 | 江西旭昇电子有限公司 | Processing method of PTH connecting hole flash burrs |
| CN108901135A (en) * | 2018-07-13 | 2018-11-27 | 深圳市景旺电子股份有限公司 | A kind of production method of non-metallic macropore |
| CN108901135B (en) * | 2018-07-13 | 2020-12-11 | 深圳市景旺电子股份有限公司 | Method for manufacturing non-metallized macropores |
| CN113905521A (en) * | 2021-09-17 | 2022-01-07 | 胜宏科技（惠州）股份有限公司 | Method for manufacturing circuit board with two different hole copper thicknesses |
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| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
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Application publication date: 20180420 |