CN107943183A - A kind of voltage reference circuit of super low-power consumption - Google Patents
A kind of voltage reference circuit of super low-power consumption Download PDFInfo
- Publication number
- CN107943183A CN107943183A CN201711272727.5A CN201711272727A CN107943183A CN 107943183 A CN107943183 A CN 107943183A CN 201711272727 A CN201711272727 A CN 201711272727A CN 107943183 A CN107943183 A CN 107943183A
- Authority
- CN
- China
- Prior art keywords
- voltage
- tube
- drain electrode
- nmos tube
- pmos tube
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
- G05F1/10—Regulating voltage or current
- G05F1/46—Regulating voltage or current wherein the variable actually regulated by the final control device is dc
- G05F1/56—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices
- G05F1/561—Voltage to current converters
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Electromagnetism (AREA)
- General Physics & Mathematics (AREA)
- Radar, Positioning & Navigation (AREA)
- Automation & Control Theory (AREA)
- Control Of Electrical Variables (AREA)
Abstract
The invention belongs to electronic circuit technology field, particularly relates to a kind of voltage reference circuit of super low-power consumption.A kind of the problem of present invention cannot be operated in ultra-low operating voltage for existing band-gap reference, it is proposed that new super low-power consumption voltage reference circuit for being operated in 0.45V.The technical scheme is that a kind of ultralow pressure super low-power consumption voltage reference circuit for being operated in 0.45V, including bias current module, high and low gate source voltage generation module and voltage subtraction module.The present invention utilizes voltage subtraction module output voltage benchmark, and by the selection of field-effect transistor structure parameter, reduces the temperature coefficient of voltage reference.A kind of ultralow pressure super low-power consumption voltage reference circuit for being operated in 0.45V proposed by the present invention, it can be operated under very low supply voltage, power consumption is only several nanowatts, any kind of bipolar transistor need not be used, integrated circuit can be made using standard CMOS process, so that its scope of application and flexibility significantly improve.
Description
Technical field
The invention belongs to electronic circuit technology field, particularly relates to a kind of ultralow pressure for being operated in 0.45V and surpasses
Low power consumption voltage reference circuit.
Background technology
Voltage reference circuit is a part indispensable in all electronic systems, not only in some special environment
Ask the voltage that voltage reference circuit produces not change with the change of supply voltage and temperature, while also require it with extremely low power dissipation
It is operated under ultra-low power supply voltage.Traditional band-gap reference is most widely used, but is limited by its cut-in voltage, it is impossible to works
Under ultra-low power supply voltage.
The content of the invention
The problem of cannot being operated in ultra-low operating voltage the purpose of the present invention is to solve existing band-gap reference, it is proposed that
A kind of new super low-power consumption voltage reference circuit for being operated in 0.45V.
Technical scheme, can be operated in the super low-power consumption voltage reference circuit of 0.45V, including bias current mould
Block, high and low gate source voltage generation module and voltage subtraction module；
The bias current module includes the first PMOS tube MP1, the second PMOS tube MP2, the first NMOS tube MN1, second
NMOS tube MN2 and resistance R；The source electrode of the first PMOS tube MP1 connects power supply, its grid connects the drain electrode of the second PMOS tube MP2；The
The source electrode of two PMOS tube MP2 connects power supply, its grid and drain interconnection；The grid and drain interconnection of first NMOS tube MN1, it drains
Connect the drain electrode of the first PMOS tube MP1, the source electrode ground connection of the first NMOS tube MN1；The drain electrode of 2nd NOMS pipes MN2 connects the second PMOS tube
The drain electrode of MP2, the grid of the 2nd NOMS pipes MN2 connect the drain electrode of the first PMOS tube MP1, and the source electrode of the 2nd NOMS pipes MN2 passes through electricity
It is grounded after resistance R；Wherein, the first PMOS tube MP1 grids, the second PMOS tube MP2 grids and the tie point of drain electrode are bias current mould
The output terminal of block, output bias voltage VB1；
The height gate source voltage generation module includes the 3rd PMOS tube MP3, the 4th PMOS tube MP4, Low threshold NMOS tube
MNLV and high threshold NMOS tube MNHV；The source electrode of the 3rd PMOS tube MP3 connects power supply, its grid meets bias voltage VB1；It is described
The source electrode of 4th PMOS tube MP4 connects power supply, its grid meets bias voltage VB1；The drain electrode of the Low threshold NMOS tube MNLV connects
The drain electrode of three PMOS tube MP3, the grid and drain interconnection of Low threshold NMOS tube MNLV, its source electrode ground connection；The high threshold NMOS
The drain electrode of pipe MNHV connects the drain electrode of the 4th PMOS tube MP4, the grid and drain interconnection of high threshold NMOS tube MNHV, its source electrode connects
Ground；
The voltage subtraction module includes the 5th PMOS tube MP5, the 3rd NMOS tube MN3, the 4th NMOS tube MN4；Described
The source electrode of five PMOS tube MP5 connects power supply, its grid meets bias voltage VB1；The drain electrode of the 3rd NMOS tube MN3 meets the 5th PMOS
The drain electrode of pipe MP5, the drain electrode of the 3rd NMOS tube MN3 connect the drain electrode of the 4th PMOS tube MP4；The drain electrode of the 4th NMOS tube MN4
The source electrode of the 3rd NMOS tube MN3 is connect, the grid of the 4th NMOS tube MN4 meets the drain electrode of the 3rd PMOS tube MP3, the 4th NMOS tube MN4
Source electrode ground connection；The 3rd NMOS tube MN3 source electrodes are the defeated of voltage reference circuit with the tie point that the 4th NMOS tube MN4 drains
Outlet, output reference voltage VREF..
The super low-power consumption voltage reference circuit for being operated in 0.45V of the present invention can be used for being fabricated to integrated circuit, described
Integrated circuit is made of standard CMOS process.
Beneficial effects of the present invention are a kind of super low-power consumption voltage reference circuit for being operated in 0.45V of the invention, with
Existing band-gap reference is compared, and in terms of minimum operating voltage, its minimum voltage that can be worked reaches 0.45V；Realizing process aspect,
It can be realized using standard CMOS process；In terms of power consumption, its power consumption is only several nanowatts, well below traditional band-gap reference
Power consumption.
Brief description of the drawings
Fig. 1 circuit structure block diagrams of the present invention；
Bias current modular circuit structure chart proposed by the invention Fig. 2；
High and low gate source voltage generation module circuit structure diagram proposed by the invention Fig. 3；
Fig. 4 voltage subtraction modular circuit structure charts proposed by the invention.
Embodiment
The embodiment of the present invention is described below in conjunction with the accompanying drawings
A kind of new super low-power consumption voltage reference circuit structure for being operated in 0.45V of the present invention is as shown in Figure 1, by inclined
Put current module, height gate source voltage generation module and voltage subtraction module composition.The circuit structure of describing module separately below
And connection relation.
As shown in Fig. 2, bias current modular circuit structure includes PMOS tube MP1, PMOS tube MP2, NMOS tube MN1, NMOS
Pipe MN2 and resistance R.MN1 and MN2 are operated in sub-threshold region, and the difference of their gate source voltage is one directly proportional to temperature
The voltage of (PTAT, Proportional to absolute temperature), the difference of the gate source voltage just act on electricity
Hinder on R, this PTAT voltage is converted into PTAT current IBIAS.
In bias current module, the specific connection relation of circuit is as shown in Figure 2.The source electrode connection supply voltage of PMOS tube MP1
VDD, the drain electrode of drain electrode connection NMOS tube MN1 and NMOS tube MN1, the grid of NMOS tube MN2；The source electrode connection electricity of PMOS tube MP2
Source voltage VDD, grid and drain electrode, which are connected, exports bias voltage VB1, and connects the grid and NMOS tube MN2 of PMOS tube MP1
Drain electrode；The source electrode connection ground potential VSS of NMOS tube MN1；The upper end of the source electrode connection resistance R of NMOS tube MN2；The lower end of resistance R
Connect ground potential VSS.
As shown in figure 3, high and low gate source voltage generation module include PMOS tube MP3, PMOS tube MP4, NMOS tube MNLV and
NMOS tube MNHV.MP3 and MP4 is used to provide electric current, and MNLV is Low threshold NMOS tube, its threshold voltage is VTH1, and MNHV is height
Threshold value NMOS, its threshold voltage are that VTH2, MNLV and MNHV are operated in sub-threshold region, are inversely proportional for producing two with temperature
Gate source voltage VGS1, the VGS2 of (CTAT, Complementary to absolute temperature)：
Wherein m is the sub-threshold slope factor, VTIt is hot spot pressure, μnIt is electron mobility, k1, k2It is that MP3 and MP4 are carried respectively
The electric current of confession and the multiple of bias current, (W/L)1、(W/L)2The breadth length ratio of respectively MNLV and MNHV.
In high and low gate source voltage generation module, circuit connecting relation is as shown in Figure 3.The source electrode connection power supply of PMOS tube MP3
Voltage VDD, the grid of drain electrode connection NMOS tube MNLV and drain electrode, and output voltage VGS1, grid connect with bias voltage VB1
Connect；The source electrode connection supply voltage VDD of PMOS tube MP4, the grid of drain electrode connection NMOS tube MNHV and drain electrode, and output voltage
VGS2；The drain electrode connection ground potential VSS of NMOS tube MNLV；The drain electrode connection ground potential VSS of NMOS tube MNHV.
As shown in figure 4, voltage subtraction module includes PMOS tube MP5, NMOS tube MN3, NMOS tube MN4.MP5 is used to provide electricity
Stream.MN3 and MN4 is Low threshold NMOS tube, works in sub-threshold region.Circuit connecting relation is as shown in figure 4, PMOS tube MP5
Source electrode connection supply voltage VDD, the drain electrode of drain electrode connection NMOS tube MN3, grid connection bias voltage VB1；NMOS tube MN3 grid
Pole connects voltage VGS2, the drain electrode of source electrode connection NMOS tube MN4, and output reference voltage VREF；The source electrode connection ground of NMOS
Current potential VSS, grid connection voltage VGS1.
The gate source voltage VGS3 of MN3 is represented by：
The gate source voltage VGS4 of MN4 is represented by：
It can obtain：
Substituting into VGS1, VGS2 can obtain：
Since threshold voltage can be expressed as：
VTH1 (T)=VTH1 (T0)+Kth1(T-T0)
VTH2 (T)=VTH2 (T0)+Kth2(T-T0)
Then further abbreviation obtains：
First derivative is asked to obtain it：
Above formula is chosen suitable0 can be made it equal to, that is, obtains temperature-independent electricity
Pressure.Wherein K is Boltzmann's constant, and equal to 1.38 × 10^-23J/K, q is unit charge amount, equal to 1.6 × 10C；VTH1(T0)、
VTH2(T0) it is respectively MNLV and MNHV in temperature T0When threshold voltage, Kth2、Kth1The respectively temperature coefficient of VTH1, VTH2,
Above parameter can be found in workshop manual.VTH1 (T in the present invention0)、VTH2(T0) it is respectively 292mV and 455mV, k1,
k2Respectively 2 and 5, (W/L)1、(W/L)2It is 2 μm/10 μm, (W/L)3、(W/L)4Respectively 2 μm/10 μm and 3.5 μm/10 μm.
A kind of super low-power consumption voltage reference circuit for being operated in 0.45V proposed by the invention, passes through Hspice
Emulation shows, in temperature range from -40 DEG C to 150 DEG C, VREF temperatures coefficient are only 47ppm/ DEG C under tt corner.Typical feelings
Under condition (tt corner, 27 DEG C), supply voltage VDD=0.45V, total current drain is 21nA, total power consumption 9.45nW.
It in summary it can be seen, a kind of super low-power consumption voltage reference circuit for being operated in 0.45V proposed by the present invention can work
Make under the low supply voltage of 0.45V, power consumption is only 9.45nW, and operating temperature range is -40 DEG C to 150 DEG C so that it is applicable in
Scope and flexibility significantly improve.
Claims (1)
1. a kind of voltage reference circuit of super low-power consumption, including bias current module, height gate source voltage generation module and voltage
Subtraction block, it is characterised in that：
The bias current module includes the first PMOS tube MP1, the second PMOS tube MP2, the first NMOS tube MN1, the second NMOS tube
MN2 and resistance R；The source electrode of the first PMOS tube MP1 connects power supply, its grid connects the drain electrode of the second PMOS tube MP2；2nd PMOS
The source electrode of pipe MP2 connects power supply, its grid and drain interconnection；The grid and drain interconnection of first NMOS tube MN1, its drain electrode connect first
The drain electrode of PMOS tube MP1, the source electrode ground connection of the first NMOS tube MN1；The drain electrode of 2nd NOMS pipes MN2 connects the second PMOS tube MP2's
Drain electrode, the grid of the 2nd NOMS pipes MN2 connect the drain electrode of the first PMOS tube MP1, after the source electrode of the 2nd NOMS pipes MN2 is by resistance R
Ground connection；Wherein, the first PMOS tube MP1 grids, the second PMOS tube MP2 grids and the tie point of drain electrode are the defeated of bias current module
Outlet, output bias voltage VB1；
The height gate source voltage generation module includes the 3rd PMOS tube MP3, the 4th PMOS tube MP4, Low threshold NMOS tube MNLV
With high threshold NMOS tube MNHV；The source electrode of the 3rd PMOS tube MP3 connects power supply, its grid meets bias voltage VB1；Described 4th
The source electrode of PMOS tube MP4 connects power supply, its grid meets bias voltage VB1；The drain electrode of the Low threshold NMOS tube MNLV connects the 3rd
The drain electrode of PMOS tube MP3, the grid and drain interconnection of Low threshold NMOS tube MNLV, its source electrode ground connection；The high threshold NMOS tube
The drain electrode of MNHV connects the drain electrode of the 4th PMOS tube MP4, the grid and drain interconnection of high threshold NMOS tube MNHV, its source electrode ground connection；
The voltage subtraction module includes the 5th PMOS tube MP5, the 3rd NMOS tube MN3, the 4th NMOS tube MN4；Described 5th
The source electrode of PMOS tube MP5 connects power supply, its grid meets bias voltage VB1；The drain electrode of the 3rd NMOS tube MN3 connects the 5th PMOS tube
The drain electrode of MP5, the drain electrode of the 3rd NMOS tube MN3 connect the drain electrode of the 4th PMOS tube MP4；The drain electrode of the 4th NMOS tube MN4 connects
The source electrode of 3rd NMOS tube MN3, the grid of the 4th NMOS tube MN4 connect the drain electrode of the 3rd PMOS tube MP3, the 4th NMOS tube MN4's
Source electrode is grounded；The tie point of 3rd NMOS tube MN3 source electrodes and the 4th NMOS tube the MN4 drain electrode is the output of voltage reference circuit
End, output reference voltage VREF.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201711272727.5A CN107943183A (en) | 2017-12-06 | 2017-12-06 | A kind of voltage reference circuit of super low-power consumption |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201711272727.5A CN107943183A (en) | 2017-12-06 | 2017-12-06 | A kind of voltage reference circuit of super low-power consumption |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN107943183A true CN107943183A (en) | 2018-04-20 |
Family
ID=61944881
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201711272727.5A Pending CN107943183A (en) | 2017-12-06 | 2017-12-06 | A kind of voltage reference circuit of super low-power consumption |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN107943183A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109491432A (en) * | 2018-11-16 | 2019-03-19 | 电子科技大学 | A kind of voltage reference circuit of ultralow pressure super low-power consumption |
| CN110502056A (en) * | 2019-08-22 | 2019-11-26 | 成都飞机工业（集团）有限责任公司 | A kind of threshold voltage reference circuit |
Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20070221996A1 (en) * | 2006-03-27 | 2007-09-27 | Takashi Imura | Cascode circuit and semiconductor device |
| CN104049671A (en) * | 2014-07-03 | 2014-09-17 | 中国科学院微电子研究所 | Zero-temperature coefficient reference voltage generating circuit for three-dimensional storage |
| CN105786081A (en) * | 2016-03-30 | 2016-07-20 | 上海华虹宏力半导体制造有限公司 | Reference voltage source circuit |
| CN107066024A (en) * | 2017-03-22 | 2017-08-18 | 长沙景美集成电路设计有限公司 | A kind of low power consumption high-precision non-bandgap reference voltage source |
| CN107272819A (en) * | 2017-08-09 | 2017-10-20 | 电子科技大学 | A kind of low-power consumption Low Drift Temperature CMOS subthreshold value reference circuits |
| CN107305403A (en) * | 2016-04-19 | 2017-10-31 | 上海和辉光电有限公司 | A kind of low power consumption voltage generation circuit |
-
2017
- 2017-12-06 CN CN201711272727.5A patent/CN107943183A/en active Pending
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20070221996A1 (en) * | 2006-03-27 | 2007-09-27 | Takashi Imura | Cascode circuit and semiconductor device |
| CN104049671A (en) * | 2014-07-03 | 2014-09-17 | 中国科学院微电子研究所 | Zero-temperature coefficient reference voltage generating circuit for three-dimensional storage |
| CN105786081A (en) * | 2016-03-30 | 2016-07-20 | 上海华虹宏力半导体制造有限公司 | Reference voltage source circuit |
| CN107305403A (en) * | 2016-04-19 | 2017-10-31 | 上海和辉光电有限公司 | A kind of low power consumption voltage generation circuit |
| CN107066024A (en) * | 2017-03-22 | 2017-08-18 | 长沙景美集成电路设计有限公司 | A kind of low power consumption high-precision non-bandgap reference voltage source |
| CN107272819A (en) * | 2017-08-09 | 2017-10-20 | 电子科技大学 | A kind of low-power consumption Low Drift Temperature CMOS subthreshold value reference circuits |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109491432A (en) * | 2018-11-16 | 2019-03-19 | 电子科技大学 | A kind of voltage reference circuit of ultralow pressure super low-power consumption |
| CN110502056A (en) * | 2019-08-22 | 2019-11-26 | 成都飞机工业（集团）有限责任公司 | A kind of threshold voltage reference circuit |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN106527572B (en) | A kind of low-power consumption Low Drift Temperature CMOS subthreshold value reference circuits | |
| CN107390757B (en) | A kind of low-power consumption Low Drift Temperature CMOS subthreshold value reference circuits | |
| CN107340796B (en) | A kind of non-resistance formula high-precision low-power consumption a reference source | |
| CN107272819B (en) | A kind of low-power consumption Low Drift Temperature CMOS subthreshold value reference circuits | |
| CN105786081B (en) | Reference voltage source circuit | |
| CN107992156B (en) | A kind of subthreshold value low-power consumption non-resistance formula reference circuit | |
| CN105468085B (en) | A kind of CMOS reference voltage sources without Bipolar transistors | |
| CN205375264U (en) | CMOS reference voltage source of no bipolar transistor | |
| CN107608441A (en) | A kind of high-performance reference voltage source | |
| CN103294100B (en) | Reference current source circuit compensating resistor temperature drift coefficient | |
| CN104156026B (en) | Non-bandgap reference source is repaid in the full temperature compensation of a kind of non-resistance | |
| CN105955391A (en) | Band-gap reference voltage generation method and circuit | |
| CN108415503A (en) | A kind of low-voltage and low-power dissipation reference circuit | |
| CN104076856B (en) | A kind of super low-power consumption non-resistance non-bandgap reference source | |
| CN207352505U (en) | A kind of non-resistance formula high-precision low-power consumption a reference source | |
| CN107992145A (en) | A kind of voltage reference circuit with super low-power consumption characteristic | |
| CN106020322A (en) | Low-power CMOS reference source circuit | |
| CN107943183A (en) | A kind of voltage reference circuit of super low-power consumption | |
| CN208061059U (en) | A kind of reference voltage generating circuit of super low-power consumption | |
| CN107066006A (en) | A kind of new band-gap reference circuit structure | |
| CN107908216B (en) | A kind of non-bandgap non-resistance a reference source | |
| CN104216458B (en) | A kind of temperature curvature complimentary reference source | |
| CN109491432A (en) | A kind of voltage reference circuit of ultralow pressure super low-power consumption | |
| CN105224006B (en) | Low-voltage CMOS reference source | |
| CN107479606A (en) | Super low-power consumption low pressure bandgap voltage reference |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| WD01 | Invention patent application deemed withdrawn after publication |
Application publication date: 20180420 |
|
| WD01 | Invention patent application deemed withdrawn after publication |