CN107942351A - A kind of Big Dipper RDSS radio frequency transmissions detection devices - Google Patents
A kind of Big Dipper RDSS radio frequency transmissions detection devices Download PDFInfo
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- CN107942351A CN107942351A CN201711130652.7A CN201711130652A CN107942351A CN 107942351 A CN107942351 A CN 107942351A CN 201711130652 A CN201711130652 A CN 201711130652A CN 107942351 A CN107942351 A CN 107942351A
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01S—RADIO DIRECTION-FINDING; RADIO NAVIGATION; DETERMINING DISTANCE OR VELOCITY BY USE OF RADIO WAVES; LOCATING OR PRESENCE-DETECTING BY USE OF THE REFLECTION OR RERADIATION OF RADIO WAVES; ANALOGOUS ARRANGEMENTS USING OTHER WAVES
- G01S19/00—Satellite radio beacon positioning systems; Determining position, velocity or attitude using signals transmitted by such systems
- G01S19/01—Satellite radio beacon positioning systems transmitting time-stamped messages, e.g. GPS [Global Positioning System], GLONASS [Global Orbiting Navigation Satellite System] or GALILEO
- G01S19/13—Receivers
- G01S19/23—Testing, monitoring, correcting or calibrating of receiver elements
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01S—RADIO DIRECTION-FINDING; RADIO NAVIGATION; DETERMINING DISTANCE OR VELOCITY BY USE OF RADIO WAVES; LOCATING OR PRESENCE-DETECTING BY USE OF THE REFLECTION OR RERADIATION OF RADIO WAVES; ANALOGOUS ARRANGEMENTS USING OTHER WAVES
- G01S19/00—Satellite radio beacon positioning systems; Determining position, velocity or attitude using signals transmitted by such systems
- G01S19/01—Satellite radio beacon positioning systems transmitting time-stamped messages, e.g. GPS [Global Positioning System], GLONASS [Global Orbiting Navigation Satellite System] or GALILEO
- G01S19/13—Receivers
- G01S19/35—Constructional details or hardware or software details of the signal processing chain
- G01S19/37—Hardware or software details of the signal processing chain
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- Engineering & Computer Science (AREA)
- Radar, Positioning & Navigation (AREA)
- Remote Sensing (AREA)
- Computer Networks & Wireless Communication (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Signal Processing (AREA)
- Transceivers (AREA)
Abstract
The invention discloses a kind of Big Dipper RDSS radio frequency transmissions detection devices, Big Dipper RDSS units including host, for receiving Big Dipper RDSS satellite datas, and for receiving the Big Dipper RNSS/GPS units of Big Dipper RNSS navigation satellite datas and GPS satellite data, Power Management Unit is used for for Big Dipper RDSS units, Big Dipper RNSS/GPS units, host supplying power, the radio-frequency receiving-transmitting frequency conversion chip for receiving low noise amplifier output signal is further included, the medium frequency output end and an IF input terminal of radio-frequency receiving-transmitting frequency conversion chip are connected with an intermediate-frequency filter.The present invention is in detection radiofrequency signal parameter, while such as power, frequency accuracy, modulation error, Digital Signal Processing is realized by built-in ADC module and FPGA, the information of modulation can be accurately demodulated, the diagnostic function of RDSS subscriber computers transmitting link is realized, substantially reduces inspection cost, it is convenient and efficient, checkability is greatly improved, not only can be with unrestricted choice analog if signal and digital medium-frequency signal, but also can easily adjust clock output frequency.
Description
Technical field
The present invention relates to the technical field of communication, more particularly to a kind of Big Dipper RDSS radio frequency transmissions detection devices.
Background technology
Triones navigation system is the Global Satellite Navigation System that China voluntarily develops, by space segment, ground segment and user segment
Three parts form, and system has two kinds of business models of RDSS and RNSS concurrently.RDSS belongs to active location system, has short message communication concurrently
Business is, it is necessary to which user launches signal；RNSS belongs to passive type navigation positioning system, launches signal without user.RDSS and RNSS
Two kinds of business have good complementarity.GPS satellite navigation system is the Global Satellite Navigation System that the U.S. establishes, and has more than 30
The developing history in year, technology maturation, is widely used, and occupies leading position in current satellite navigation system market.The Big Dipper is defended
The RDSS services that star navigation system provides need subscriber computer to navigation satellite launch L-band radiofrequency signal, its signal RF signal ginseng
The success rate of the parameter direct relation RDSS services such as number and modulation data, these are also to weigh Big Dipper generation subscriber computer key performance
Index, metering is detected when subscriber computer is produced by producer by special equipment such as power meter, spectrum analyzer etc..RDSS is used
After family machine uses a period of time, due to electronic device aging, its RF signal power launched, frequency accuracy etc. exist certain
The change of degree, influences subscriber computer performance, possibly can not be used when serious, at this moment if be also detected using special equipment,
Then testing cost is too high, inefficiencies, lacks such universal portable detection device at present, to reduce detection maintenance cost.
The content of the invention
For above-mentioned deficiency of the prior art, the technical problems to be solved by the invention are to provide a kind of Big Dipper RDSS
Radio frequency transmissions detection device, can detect the performance parameter such as radiofrequency signal parameter and modulation data, automatic decision performance indicator
Whether meet the requirements, it is convenient and efficient, it can be widely applied to the Beidou navigation communications field.
In order to solve the above-mentioned technical problem, the present invention proposes a kind of Big Dipper RDSS radio frequency transmissions detection devices, bag
Host, the Big Dipper RDSS units for receiving Big Dipper RDSS satellite datas are included, and for receiving Big Dipper RNSS aeronautical satellite numbers
According to the Big Dipper RNSS/GPS units with GPS satellite data, the Big Dipper RDSS units, Big Dipper RNSS/GPS units with the master
Two-way communication link between machine, Power Management Unit are used for for Big Dipper RDSS units, Big Dipper RNSS/GPS units, host supplying power；
The host includes receiving channel, ADC module, FPGA, interface circuit and power module, the receiving channel it is defeated
Enter end and output terminal to be connected with the output terminal of electromagnetic horn and the input terminal of ADC module respectively, the input terminal of the FPGA and defeated
Outlet is connected with the output terminal of ADC module and the output terminal of interface circuit respectively, the power circuit respectively with electromagnetic horn, connect
Receive passage, ADC module, FPGA, interface circuit connection；
The Big Dipper RDSS units include the first low noise amplifier circuit, lower frequency changer circuit, the first baseband processing circuitry, on
Frequency changer circuit and power amplification circuit, the signal input part connection Big Dipper RDSS satellite numbers of first low noise amplifier circuit
According to, the signal input part of the signal output part connection lower frequency changer circuit of the first low noise amplifier circuit, the lower frequency changer circuit
Signal output part connects the signal input part of up-converter circuit, the signal of the up-converter circuit by the first baseband processing circuitry
Output terminal connects the signal input part of power amplification circuit, two-way communication company between first baseband processing circuitry and host
Connect；
Further include the radio-frequency receiving-transmitting frequency conversion chip for receiving low noise amplifier output signal, the radio-frequency receiving-transmitting frequency conversion
A medium frequency output end and an IF input terminal for chip is connected with an intermediate-frequency filter, the letter of the radio-frequency receiving-transmitting frequency conversion chip
The signal output part of number input terminal connection power-switching circuit, the signal input part connection crystal of the radio-frequency receiving-transmitting frequency conversion chip
The signal output part of oscillator, the clock phase-locked loop of the radio-frequency receiving-transmitting frequency conversion chip are connected with phase-locked loop filter, institute
The transmission channel local oscillator phase-locked loop for stating radio-frequency receiving-transmitting frequency conversion chip is connected with transmitting phase-locked loop filter, the radio-frequency receiving-transmitting
The receiving channel local oscillator phase-locked loop of frequency conversion chip is connected with receiving phase-locked loop filter, the radio-frequency receiving-transmitting frequency conversion chip
SPI interface is connected with microcontroller.
Preferably, the host further includes DDR modules, and the DDR modules are connected with FPGA, it includes at least a piece of DDR2
Chip, for being cached to the data in FPGA.
In the one of the present invention implements, the host further includes clock distribution block, it includes comparator circuit and clock
62MHz sinusoidal clock signals are obtained square clock signal and defeated by distributor circuit, the comparator circuit after treatment
Go out to clock distribution circuit, the clock distribution circuit is used to square clock signal being divided into two-way by work(, all the way
To FPGA, another way is exported to ADC for output.
In the one of the present invention implements, the Big Dipper RNSS/GPS units include the second low noise amplifier circuit and second
Baseband processing circuitry, the signal input part connection Big Dipper RNSS navigation satellite datas and GPS of second low noise amplifier circuit
Satellite data, the signal output part of the second low noise amplifier circuit connects the signal input part of the second baseband processing circuitry, described
Two-way communication link between second baseband processing circuitry and host.
Further, the power-switching circuit includes power conversion chip, the model of the power conversion chip
LT17633；The pin 8 of the power conversion chip, pin 5 with capacitance C1, the positive terminal of capacitance C3 and+5V power supply phases
Even, the negative pole end ground connection of the capacitance C1, capacitance C3；The pin 1 of the power conversion chip, pin 2 with capacitance C2 and electricity
The positive terminal for holding C4 is connected, the negative pole end ground connection of the capacitance C2 and capacitance C4, the pin 2 and pin of the power conversion chip
Capacitance C5, the signal input part phase of the signal output part and radio-frequency receiving-transmitting frequency conversion chip of the power conversion chip are connected between 4
Even.
Further, the transmitting phase-locked loop filter includes resistance R14, resistance R16, capacitance C48, capacitance C49, electricity
Hold C50；The pin 24 of the radio-frequency receiving-transmitting frequency conversion chip connects resistance R14, one end of capacitance C48 respectively, the resistance R14's
The other end connects one end of capacitance C49, one end of resistance R16, the pin 25 of radio-frequency receiving-transmitting frequency conversion chip, the capacitance respectively
The other end of C49 and the other end of capacitance C48 are grounded, one end of the other end connection capacitance C50 of the resistance R166, described
The other end ground connection of capacitance C50.
Further, the pin 1 of the microcontroller connects one end of resistance R1, the other end connection electricity of the resistance R1
Source, the pin 8 of the microcontroller connect capacitance C6, one end of resistance R2, the other end ground connection of the capacitance C6, the electricity respectively
The other end connection power supply of R2 is hindered, pin 5, pin 6, pin 7, the pin 2 of the microcontroller become with the radio-frequency receiving-transmitting respectively
Pin 22, pin 21, pin 20, the pin 19 of frequency chip are connected.
Implement the present invention, have the advantages that：
The Big Dipper RDSS radio frequency transmissions detection device of the present invention can effectively reduce the power consumption of complete machine, small, collection
It is high, low in energy consumption into spending, the low-power consumption of user and the requirement of portability are met, and reduce to the integrated circuit that FPGA is core
Circuit scale, realizes that miniaturization is integrated；Reduce design complexity, reduce link calibration process, strengthen hardware link reliability；
While detection radiofrequency signal parameter, such as power, frequency accuracy, modulation error, pass through built-in ADC module and FPGA
Realize Digital Signal Processing, can accurately demodulate the information of modulation, realize the diagnostic function of RDSS subscriber computers transmitting link, significantly
Inspection cost is reduced, it is convenient and efficient, checkability is greatly improved, not only can be with unrestricted choice analog if signal and digital intermediate frequency
Signal, and can easily adjust clock output frequency.
Brief description of the drawings
Fig. 1 is the integrated circuit composition structure diagram of Big Dipper RDSS radio frequency transmissions detection devices provided by the invention.
Fig. 2 is the circuit of the radio-frequency receiving-transmitting frequency conversion chip of Big Dipper RDSS radio frequency transmissions detection devices provided by the invention
Composition frame chart.
Embodiment
Below in conjunction with the attached drawing in the embodiment of the present invention, the technical solution in the embodiment of the present invention is carried out clear, complete
Site preparation describes, it is clear that described embodiment is only part of the embodiment of the present invention, instead of all the embodiments.It is based on
Embodiment in the present invention, those of ordinary skill in the art are obtained every other without creative efforts
Embodiment, belongs to the scope of protection of the invention.
It is the schematic diagram of Big Dipper RDSS radio frequency transmissions detection devices provided by the invention referring to Fig. 1 to Fig. 2.This hair
Bright Big Dipper RDSS radio frequency transmissions detection device includes being used for the Big Dipper RDSS units 10 for receiving Big Dipper RDSS satellite datas,
And for receiving the Big Dipper RNSS/GPS units 20 of Big Dipper RNSS navigation satellite datas and GPS satellite data, the Big Dipper
RDSS units 10, Big Dipper RNSS/GPS units 20 two-way communication link between host 30, Power Management Unit 40 is for being
Big Dipper RDSS units 10, Big Dipper RNSS/GPS units 20, host 30 are powered.The host 30 has data fusion and protocol conversion
Function, user can be merged Big Dipper RDSS units 10 and 20 serial data of Big Dipper RNSS/GPS units, be converted to user
Peculiar agreement output.
The Big Dipper RDSS units 10 include the first low noise amplifier circuit 11, lower frequency changer circuit 12, the first Base-Band Processing
Circuit 13, up-converter circuit 14 and power amplification circuit 15, the signal input part of first low noise amplifier circuit 11 connect
Connect Big Dipper RDSS satellite datas, the signal input of the signal output part connection lower frequency changer circuit 12 of the first low noise amplifier circuit 11
End, the signal output part of the lower frequency changer circuit 12 are defeated by the signal of the first baseband processing circuitry 13 connection up-converter circuit 14
Enter end, the signal input part of the signal output part connection power amplification circuit 15 of the up-converter circuit 14, first base band
Two-way communication link between process circuit 13 and host 30.First low noise amplifier circuit 11 and lower frequency changer circuit 12 form
Receiver module, the up-converter circuit 14 and power amplification circuit 15 form transmitter module.
The Big Dipper RNSS/GPS units 20 include the second low noise amplifier circuit 21 and the second baseband processing circuitry 22,
The signal input part connection Big Dipper RNSS navigation satellite datas and GPS satellite data of second low noise amplifier circuit 21, the
The signal output part of two low noise amplifier circuits 21 connects the signal input part of the second baseband processing circuitry 22, second base band
Two-way communication link between process circuit 22 and host 30.
First baseband processing circuitry 13 includes the first baseband chip, the model of first baseband chip
BM3005MQ；Second baseband processing circuitry, 22 second baseband chip, the model STA8090FGBTR of second baseband chip；
The host 30 includes signal processing chip, the model Energy Micro companies production of the signal processing chip
EFM32G210F128.The Big Dipper RDSS units 10, Big Dipper RNSS/GPS units 20, host 30, Power Management Unit 40 are all provided with
It is placed on same pcb board, is isolated in respectively by shielding case in airtight cavity alone, beneficial to the system integration, there is good electricity
Magnetic compatibility.
After the Big Dipper RDSS units 10 of the present invention receive RDSS satellite-signals, filtered through the first low noise amplifier circuit 11,
Sent after amplification to lower frequency changer circuit 12, amplified RDSS satellite-signals under the frequency conversion chip two-stage of lower frequency changer circuit 12 by becoming
Intermediate-freuqncy signal is converted to after frequency, after RDSS satellite-signals carry out intermediate frequency amplification, filtering, sampling, is sent to the first baseband processing circuitry
13 are handled；The baseband chip of first baseband processing circuitry 13 exports BPSK modulated signals to up-converter circuit 14, up-conversion
After circuit 14 carries out shaping, filtering, modulation to signal, sent out after the amplification of power amplification circuit 15.Second low noise amplification electricity
Road 21 receives Big Dipper RNSS navigation satellite datas and GPS satellite data, signal amplify, filter by the second low noise amplifier circuit 21
Send to the second baseband processing circuitry 22 and handled after ripple, host 30 is by Big Dipper RDSS units 10 and Big Dipper RNSS/GPS units 20
Serial data is merged, and is converted to the peculiar agreement output of user.Power Management Unit 40 provides required work for whole circuit
Power supply.
Host in the present invention includes receiving channel, ADC module, FPGA, interface circuit and power module, and described receive is led to
The input terminal and output terminal in road are connected with the output terminal of electromagnetic horn and the input terminal of ADC module respectively, the input of the FPGA
End and output terminal be connected respectively with the output terminal of ADC module and the output terminal of interface circuit, the power circuit respectively with loudspeaker
Antenna, receiving channel, ADC module, FPGA, interface circuit connection.The host further includes DDR modules, the DDR modules with
FPGA connections, it includes at least a piece of DDR2 chips, for being cached to the data in FPGA.Described every appearance of DDR2 chips
2Gb is measured, is connected respectively to FPGA, each DDR2 chip is separate, controls, is independent of each other respectively.The DDR2 chip powers
Input as 1.8V, two panels DDR2 chips use same power input, consider it is distant during two panels chip layout, on PCB
Need to consider power voltage-drop, therefore the tantalum electrolytic capacitor of one large capacity of concatenation is required near each chip.The host
Configuration circuit is further included, realizes the loading that powers on of FPGA, load mode is serial loading.It is a piece of by being mounted outside FPGA
SPI FLASH chips realize configuration, and SPI FLASH chips capacity is 64Mbit, and operating clock is up to 50MHz, matching somebody with somebody after integrating
Put file and be less than 5MB.The FPGA includes DDR2 chip controllers, and control DDR2 chips cache data.The master
Machine further includes frequency synthesizer, it is used to produce local oscillation signal and 62MHz sinusoidal clocks after local 10MHz reference signals are integrated
Signal.The host further includes clock distribution block, it includes comparator circuit and clock distribution circuit, the comparator circuit
62MHz sinusoidal clock signals are obtained into square clock letter by amplifier, voltage follower, voltage zero-cross comparison circuit successively
Number and export to clock distribution circuit, the clock distribution circuit is used to square clock signal being divided into two by work(
Road, exports to FPGA, another way is exported to ADC all the way.The ADC module completes the analog if signal of receiving channel output
Digitized process, FPGA is directly output to after analog signal is quantified and carries out data acquisition, data buffer storage, Digital Down Convert etc.
Processing, is made of the twin-channel ADC chips of two panels, and chip resolution is 8bi t, and maximum sample rate is 80MSPS, AD sample rates
For 62MSPS.In addition, the Big Dipper RDSS radio frequency transmissions detection devices of the present invention are further included for receiving low-noise amplifier
Export the radio-frequency receiving-transmitting frequency conversion chip 1 of signal, the medium frequency output end and an IF input terminal of the radio-frequency receiving-transmitting frequency conversion chip 1
It is connected with an intermediate-frequency filter 2, the letter of the signal input part connection power-switching circuit 3 of the radio-frequency receiving-transmitting frequency conversion chip 1
Number output terminal, the signal output part of the reference frequency input terminal connection crystal oscillator 5 of the radio-frequency receiving-transmitting frequency conversion chip 1, institute
The clock phase-locked loop for stating radio-frequency receiving-transmitting frequency conversion chip 1 is connected with phase-locked loop filter 4, the radio-frequency receiving-transmitting frequency conversion chip 1
Transmission channel local oscillator phase-locked loop with transmitting phase-locked loop filter 6 be connected, the reception of the radio-frequency receiving-transmitting frequency conversion chip 1 is led to
Road local oscillator phase-locked loop is connected with receiving phase-locked loop filter 7, the SPI interface and monolithic of the radio-frequency receiving-transmitting frequency conversion chip 1
Machine 8 is connected.The 1 model BG7812EA chips of radio-frequency receiving-transmitting frequency conversion chip, the pin 3 of the radio-frequency receiving-transmitting frequency conversion chip 1
It is connected with one end of resistance R3, the other end of the resistance R3 is connected with capacitance C27, capacitance C28 one end, the capacitance C27's
The other end is grounded, and the other end of the capacitance C28 is connected with the output signal end of exterior low-noise amplifier；The radio-frequency receiving-transmitting
The pin 11 of frequency conversion chip 1 is connected with one end of capacitance C39, inductance L5, capacitance C38, the other end, the inductance of the capacitance C39
The other end of L5 connects+3.3V power supplys respectively, and the capacitance C38 is connected with TXIN signals, the radio-frequency receiving-transmitting frequency conversion chip 1
Pin 13 is connected with resistance R15 one end, the exterior TEN transmitting enable signals end of other end connection of the resistance R15, the radio frequency
The pin 16 of transmitting-receiving frequency conversion chip 1 connects exterior BPSK modulated signals, pin 32, the pin of the radio-frequency receiving-transmitting frequency conversion chip 1
33 difference linker band digital intermediate frequency parts, pin 35, the pin 37 of the radio-frequency receiving-transmitting frequency conversion chip 1 connect capacitance respectively
One end, one end of capacitance C17 of C26, the other end, the other end of capacitance C17 of the capacitance C26 are grounded；The radio frequency is received
The connection baseband portion analog intermediate frequency input port of pin 40 of hair frequency conversion chip 1, the pin 1 of the radio-frequency receiving-transmitting frequency conversion chip 1,
Pin 2, pin 5, pin 6, pin 8, pin 10, pin 12, pin 14, pin 17, pin 18, pin 23, pin 26, pin
28th, pin 31, pin 34, pin 36, pin 38, pin 39, pin 43, the power input of pin 44 are+3.3V power supplys.
One intermediate-frequency filter, 2 chip model is the sound surface bandpass filter of TB0939A；The IN of one intermediate-frequency filter 2 draws
Foot connects inductance L1, one end of inductance L2 respectively, and the inductance L1, the other end of inductance L2 connect radio-frequency receiving-transmitting frequency conversion core respectively
One medium frequency output end of piece 1；The OUT pins of one intermediate-frequency filter 2 connect inductance L3, one end of inductance L4 respectively, described
Inductance L3, the other end of inductance L4 connect an IF input terminal of radio-frequency receiving-transmitting frequency conversion chip 1 respectively；One intermediate-frequency filter
2 other pins ground connection.The power-switching circuit 3 includes power conversion chip 31, the model of the power conversion chip 31
For LT17633；The pin 8 of the power conversion chip 31, pin 5 with capacitance C1, the positive terminal of capacitance C3 and+5V power supplys
It is connected, the capacitance C1, the negative pole end ground connection of capacitance C3；The pin 1 of the power conversion chip 31, pin 2 with capacitance C2
It is connected with the positive terminal of capacitance C4, the negative pole end ground connection of the capacitance C2 and capacitance C4, the pin 2 of the power conversion chip 31
Capacitance C5, the signal output part of the power conversion chip 31 and the signal of radio-frequency receiving-transmitting frequency conversion chip 1 are connected between pin 4
Input terminal is connected.The phase-locked loop filter 4 includes resistance R5, capacitance C31, capacitance C32；The radio-frequency receiving-transmitting frequency conversion chip
1 clock phase-locked loop is connected with one end of resistance R5, capacitance C31, and the one of the other end connection capacitance C32 of the resistance R5
End, the other end of the capacitance C32 are grounded with the other end of capacitance C31.The crystal oscillator 5 includes crystal oscillator 51, described
One end of the signal output part connection capacitance C35 of crystal oscillator 51, the other end connection radio-frequency receiving-transmitting frequency conversion chip 1 of the capacitance C35
Reference frequency input terminal.It is described transmitting phase-locked loop filter 6 include resistance R14, resistance R16, capacitance C48, capacitance C49,
Capacitance C50；The pin 24 of the radio-frequency receiving-transmitting frequency conversion chip 1 connects resistance R14, one end of capacitance C48, the resistance respectively
The other end of R14 connects one end of capacitance C49, one end of resistance R16, the pin 25 of radio-frequency receiving-transmitting frequency conversion chip 1 respectively, described
The other end of capacitance C49 and the other end of capacitance C48 are grounded, one end of the other end connection capacitance C50 of the resistance R166,
The other end ground connection of the capacitance C50.The reception phase-locked loop filter 7 includes resistance R4, resistance R6, capacitance C30, capacitance
C33, capacitance C34；The pin 7 of the radio-frequency receiving-transmitting frequency conversion chip 1 connects resistance R4, one end of capacitance C30, the resistance respectively
The other end of R4 connects one end of capacitance C33, one end of resistance R6, the pin 9 of radio-frequency receiving-transmitting frequency conversion chip 1, the electricity respectively
One end of the other end connection capacitance C34 of R6 is hindered, the capacitance C30, capacitance C33, the other end of capacitance C34 are grounded.
Further, the model ATtiny25V-10SU of the microcontroller 8, the pin 1 of the microcontroller 8 connect resistance
One end of R1, the other end connection power supply of the resistance R1, the pin 8 of the microcontroller 8 connect capacitance C6, resistance R2 respectively
One end, the other end ground connection of the capacitance C6, the other end connection power supply of the resistance R2, the pin 5 of the microcontroller 8, draw
Pin 22, pin 21, pin 20, the pin 19 of foot 6, pin 7, pin 2 respectively with the radio-frequency receiving-transmitting frequency conversion chip 1 are connected.
The Big Dipper RDSS radio frequency transmissions detection device of the present invention can effectively reduce the power consumption of complete machine, small, collection
It is high, low in energy consumption into spending, the low-power consumption of user and the requirement of portability are met, and reduce to the integrated circuit that FPGA is core
Circuit scale, realizes that miniaturization is integrated；Reduce design complexity, reduce link calibration process, strengthen hardware link reliability；
While detection radiofrequency signal parameter, such as power, frequency accuracy, modulation error, pass through built-in ADC module and FPGA
Realize Digital Signal Processing, can accurately demodulate the information of modulation, realize the diagnostic function of RDSS subscriber computers transmitting link, significantly
Inspection cost is reduced, it is convenient and efficient, greatly improve checkability.
The above is the preferred embodiment of the present invention, it is noted that for those skilled in the art
For, without departing from the principle of the present invention, some improvement and deformation can also be made, these are improved and deformation is also considered as
Protection scope of the present invention.
Claims (7)
1. a kind of Big Dipper RDSS radio frequency transmissions detection devices, including host, the north for receiving Big Dipper RDSS satellite datas
Struggle against RDSS units, and for receiving the Big Dipper RNSS/GPS units of Big Dipper RNSS navigation satellite datas and GPS satellite data, institute
State Big Dipper RDSS units, two-way communication link, Power Management Unit are used for Big Dipper RNSS/GPS units between the host
For Big Dipper RDSS units, Big Dipper RNSS/GPS units, host supplying power；
The host includes receiving channel, ADC module, FPGA, interface circuit and power module, the input terminal of the receiving channel
It is connected respectively with the output terminal of electromagnetic horn and the input terminal of ADC module with output terminal, the input terminal and output terminal of the FPGA
It is connected respectively with the output terminal of ADC module and the output terminal of interface circuit, the power circuit is logical with electromagnetic horn, reception respectively
Road, ADC module, FPGA, interface circuit connection；
The Big Dipper RDSS units include the first low noise amplifier circuit, lower frequency changer circuit, the first baseband processing circuitry, up-conversion
Circuit and power amplification circuit, the signal input part connection Big Dipper RDSS satellite datas of first low noise amplifier circuit,
The signal input part of the signal output part connection lower frequency changer circuit of first low noise amplifier circuit, the signal of the lower frequency changer circuit
Output terminal connects the signal input part of up-converter circuit, the signal output of the up-converter circuit by the first baseband processing circuitry
The signal input part of end connection power amplification circuit, two-way communication link between first baseband processing circuitry and host；
Further include the radio-frequency receiving-transmitting frequency conversion chip for receiving low noise amplifier output signal, the radio-frequency receiving-transmitting frequency conversion chip
A medium frequency output end and an IF input terminal be connected with an intermediate-frequency filter, the signal of the radio-frequency receiving-transmitting frequency conversion chip is defeated
Enter the signal output part of end connection power-switching circuit, the signal input part connection crystal oscillation of the radio-frequency receiving-transmitting frequency conversion chip
The signal output part of device, the clock phase-locked loop of the radio-frequency receiving-transmitting frequency conversion chip is connected with phase-locked loop filter, described to penetrate
The transmission channel local oscillator phase-locked loop of frequency transmitting-receiving frequency conversion chip is connected with transmitting phase-locked loop filter, the radio-frequency receiving-transmitting frequency conversion
The receiving channel local oscillator phase-locked loop of chip is connected with receiving phase-locked loop filter, the SPI of the radio-frequency receiving-transmitting frequency conversion chip
Interface is connected with microcontroller.
2. Big Dipper RDSS radio frequency transmissions detection devices as claimed in claim 1, it is characterised in that the host further includes
DDR modules, the DDR modules are connected with FPGA, it includes at least a piece of DDR2 chips, for delaying to the data in FPGA
Deposit.
3. Big Dipper RDSS radio frequency transmissions detection devices as claimed in claim 1, it is characterised in that the host further includes
Clock distribution block, it includes comparator circuit and clock distribution circuit, and the comparator circuit is by 62MHz sinusoidal clock signals
Obtain square clock signal after treatment and export to clock distribution circuit, the clock distribution circuit to be used for square wave
Form clock signal is divided into two-way by work(, exports all the way to FPGA, another way is exported to ADC.
4. Big Dipper RDSS radio frequency transmissions detection devices as claimed in claim 1, it is characterised in that the Big Dipper RNSS/
GPS unit includes the second low noise amplifier circuit and the second baseband processing circuitry, the letter of second low noise amplifier circuit
Number input terminal connection Big Dipper RNSS navigation satellite datas and GPS satellite data, the signal output part of the second low noise amplifier circuit
Connect the signal input part of the second baseband processing circuitry, two-way communication link between second baseband processing circuitry and host.
5. Big Dipper RDSS radio frequency transmissions detection devices as claimed in claim 1, it is characterised in that the power supply conversion electricity
Road includes power conversion chip, the model LT17633 of the power conversion chip；The pin 8 of the power conversion chip, draw
Foot 5 is connected with capacitance C1, the positive terminal of capacitance C3 and+5V power supplys, the capacitance C1, the negative pole end ground connection of capacitance C3；Institute
State the positive terminal of the pin 1, pin 2 of power conversion chip with capacitance C2 and capacitance C4 to be connected, the capacitance C2 and capacitance C4
Negative pole end ground connection, between the pin 2 and pin 4 of the power conversion chip connect capacitance C5, the power conversion chip
Signal output part is connected with the signal input part of radio-frequency receiving-transmitting frequency conversion chip.
6. Big Dipper RDSS radio frequency transmissions detection devices as claimed in claim 1, it is characterised in that the transmitting phaselocked loop
Path filter includes resistance R14, resistance R16, capacitance C48, capacitance C49, capacitance C50；The radio-frequency receiving-transmitting frequency conversion chip draws
Foot 24 connects resistance R14, one end of capacitance C48 respectively, and the other end of the resistance R14 connects one end of capacitance C49, electricity respectively
One end, the pin 25 of radio-frequency receiving-transmitting frequency conversion chip of R16 is hindered, the other end of the capacitance C49 connects with the other end of capacitance C48
Ground, one end of the other end connection capacitance C50 of the resistance R166, the other end ground connection of the capacitance C50.
7. Big Dipper RDSS radio frequency transmissions detection devices as claimed in claim 1, it is characterised in that the microcontroller draws
Foot 1 connects one end of resistance R1, the other end connection power supply of the resistance R1, and the pin 8 of the microcontroller connects capacitance respectively
One end of C6, resistance R2, the other end ground connection of the capacitance C6, the other end connection power supply of the resistance R2, the microcontroller
Pin 5, pin 6, pin 7, pin 2 respectively the pin 22 with the radio-frequency receiving-transmitting frequency conversion chip, pin 21, pin 20, draw
Foot 19 is connected.
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| CN111667680A (en) * | 2020-06-03 | 2020-09-15 | 贵州电网有限责任公司 | Data transmission method, RDSS communication terminal and storage medium |
| CN111856523A (en) * | 2020-08-06 | 2020-10-30 | 成都微能铁信科技有限公司 | Portable GPS big dipper antenna measurement recorder |
| CN114362784A (en) * | 2021-12-22 | 2022-04-15 | 北京融为科技有限公司 | Portable satellite measurement and control data transmission integrated terminal |
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