CN107942168A - A kind of replaceable digital and analog equipment for monitoring power quality and method - Google Patents
A kind of replaceable digital and analog equipment for monitoring power quality and method Download PDFInfo
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- CN107942168A CN107942168A CN201711188623.6A CN201711188623A CN107942168A CN 107942168 A CN107942168 A CN 107942168A CN 201711188623 A CN201711188623 A CN 201711188623A CN 107942168 A CN107942168 A CN 107942168A
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- G—PHYSICS
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- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
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Abstract
Present invention relates particularly to a kind of replaceable digital and analog equipment for monitoring power quality and method, described device to include:SV sampling plates, analog sampling plate, FPGA controlling of sampling chip, DSP computing chips and core processing module.FPGA controlling of sampling chips are responsible for controlling and read 92 messages of IEC61850 of SV sampling plate optical ports processing board parsing, reading analog sampling plate gives DSP through the transformed digital signals of A/D, and by upp sequential, pass through GPIO mouthfuls of interrupt modes after sending and remind DSP.Carry DOM disks realize storage data in EMIF buses, and nandFlash realizes the file system of carry linux operations, and w5300 realizes ethernet communication function.Iic bus carry CAT9555 realizes button, input and output function, and RX8025T realizes clock timing function.The digital and analog compatible equipment for monitoring power quality of the present invention can monitor 6 circuits at the same time(3 phase voltage, 3 phase current is included per primary Ioops)The analog acquisition or digital data acquisition of totally 36 passages.
Description
Technical field
The present invention relates to electric energy quality monitoring field, and in particular to a kind of replaceable digital and analog power quality prison
Survey device and method.
Background technology
The access of a large amount of nonlinear-loads, new energy, the monitoring of power quality index are related to the security of operation of power networks
And economy.With the popularization of intelligent substation, equipment for monitoring power quality is broadly divided into digital and two kinds analog, difference
Suitable for monitoring intelligent substation and the power quality index of traditional substation.For current intelligent substation and traditional substation
The different device of two hardware of generally use carries out electric energy quality monitoring, is respectively digital electric power quality monitoring device and simulation
Formula equipment for monitoring power quality.Digital device generally access reaches electric energy through merging the IEC61850-9-2 agreements of cell translation
The function of quality-monitoring, analog type device through conventional voltage transformer, current transformer take secondary circuit voltage value, current value into
Row electric energy quality monitoring, can not be compatible on both hardware, on software, causes the waste of resource to a certain extent.It is in addition, digital
Formula and it is analog had differences on technical solution is realized, especially digital device need solve digital signal frequency-tracking and
The problems such as frequency analysis time-frequency spectrum leaks.Therefore need a kind of device not only to can be adapted for digital signal and carry out energy monitor, but also
It can be adapted for equipment for monitoring power quality and method that analog signal carries out energy monitor.
The content of the invention
1st, technical problem to be solved:
In view of the problems of the existing technology, it is a kind of suitable for becoming it is an object of the invention to be provided for electric energy quality monitoring field
The replaceable digital and analog equipment for monitoring power quality and method in power station, the present apparatus have high degree of compatibility, it is pluggable,
The advantages that replaceable, this method can either realize the access of digital signal, can also realize the access of analog signal;Solve
The problem of frequency-tracking and frequency analysis time-frequency spectrum during digital signal access leak.
2nd, technical solution:
A kind of replaceable digital and analog equipment for monitoring power quality, applied to traditional substation and intelligent substation, its
It is characterized in that, including:
SV sampling plates:It is responsible for the digital signal of input being converted into the digital signal of default standard, and transformed numeral is believed
Number send to FPGA controlling of sampling chips.
Analog sampling plate:Be responsible for by the analog signal received be converted into default standard digital signal and will be transformed
Digital signal is sent to FPGA controlling of sampling chips;The analog sampling plate is hardware mode frequency-tracking sample circuit, tracking
Sample rate per 512 points and 1024 points of cycle;
FPGA controlling of sampling chips:It is responsible for the control simultaneously digital sampled signal of synchronously simulating sampling plate or SV sampling plates, and will adopts
Sample signal is sent to DSP computing chips;
DSP computing chips:Under analog sampling mode, the DSP computing chips are responsible for receiving FPGA controlling of sampling chip transmission
Whole 10 cycle data calculate effective value, and calculate other power quality indexs;During SV sample modes, the DSP
Computing chip is responsible for receiving the sampled value of the fixed intervals of FPGA controlling of sampling chip transmission, calculate frequency values and frequency analysis and
Other power quality indexs;The DSP computing chips send the information calculated to core processing module;
Core processing module:It is responsible for obtaining 10 cycle data, transient information, the flickering data of DSP computing chips;So as to carry out electricity
Statistical analysis, storage, displaying, the communication of energy qualitative data, and signal transmission is entered into IEC61850 station levels;
The SV sampling plates output terminal is connected with the IO of FPGA sampling control modules;Analog sampling plate output terminal is through data/address bus
It is connected with FPGA controlling of sampling chip input terminals;The output terminal of the FPGA controlling of sampling chip and the input of DSP computing chips
End is connected;The DSP computing chips output terminal is connected with the input terminal of core processing module.
SV sampling plates can be installed in circuit at the same time with analog sampling plate in this programme, can also be according to transmission signal
Concrete condition select one of those to be connected into circuit, signal is acquired.
Compared with prior art, the beneficial effects of the present invention are:The method that the present invention uses is by SV sampling plates, simulation
Sampling plate is arranged in pairs or groups with FPGA controlling of sampling chips, so as to ensure the uniformity of two kinds of sampling harden structures, the one of hardware interface
The uniformity of cause property and software interface, so as to ensure the interchangeability of two kinds of sampling plates.DSP computing chip energy is used in the present apparatus
Power quality index under enough while compatible two kinds of sample modes calculates.
Further, the core processing module is dual core processor OMAP138.
Further, circuit signal is conveyed into analog sampling plate samples by 40K precision resistances successively, 2mA/2mA electricity
Current transformer is isolated, and electric current is changed through 5A/2mA current transformers, finally by being exported after 16 AD7706 analog-to-digital conversions.
A kind of method of replaceable digital and analog electric energy quality monitoring, comprises the following steps:
Step 1:Signal sampling:The signal of sampling is numeral and/or analog signal;Sampled digital signal receives for SV sampling plates
The message signals for the combining unit transmitted by Ethernet, and message signals are converted to the digital signal of default standard;Sampling
Analog signal is that analog sampling plate receiving voltage current signal passes through resistance sampling, current transformer isolation and mutual inductance respectively, is led to
Cross the digital signal that AD analog-to-digital conversions are converted into default standard.
Step 2:Signal controls;The digital data transmission people FPGA for the default standard being converted into step 1 is sampled into control
Coremaking piece;Specially:FPGA controlling of sampling chip receives the digital signal of SV sampling plates transmission, FPGA sampling controls through data/address bus
Coremaking piece restarts through controlling bus control SV sampling modules, asks for configuration information, issues configuration information;FPGA controlling of sampling chips
The sampled data of analog sampling plate is received through data/address bus, and receives the count value of the frequency sampling circuit of analog sampling plate, together
Step calculates real-time frequency value;Sampled signal is sent DSP computing chips and core processing module by FPGA controlling of sampling chip.
Step 3:DSP is calculated:DSP computing chips receive the sampled signal that FPGA controlling of sampling chips transmit;DSP
Computing module receives sampled data with UPP mechanism, and SV sampled datas are calculated using " comparison method based on Hanning window function " method
Frequency values and harmonic value;The DSP computing modules calculate the harmonic value of non-2N time using interpolation method, under compatible different sample rates
Harmonics Calculation and its harmonic spectrum leakage problem.
Step 4:Core processing module is handled;The core processing module uses dual core processor OMP138, with double
Core communication mechanism obtains 10 cycle data, transient information, the flickering data of DSP computing modules, and core processing module carries out electric energy
Statistical analysis, storage, displaying, the communication of qualitative data, support the access of IEC61850 station levels.
Further, the analog sampling is sampled by hardware frequency tracking mode, samples per cycle at 512 points or 1024 points;
Mode samples at regular intervals for SV samplings, sample rate 4k/s or 12.8k/s.
3rd, beneficial effect:
The digital and analog compatible equipment for monitoring power quality of the present invention can monitor 6 circuits at the same time(3 phases are included per primary Ioops
3 phase current of voltage)The analog acquisition or digital data acquisition of totally 36 passages.
Brief description of the drawings
Fig. 1 is the overall layering block diagram of the present invention;
Fig. 2 is equipment for monitoring power quality hardware system structure and composition figure;
Fig. 3 is the software architecture block diagram of the present invention;
Fig. 4 is power quality device start-up course flow chart;
Fig. 5 is power quality device signal sampling process flow diagram flow chart.
Embodiment
The present invention will be described below in conjunction with the accompanying drawings.
It is as shown in Figure 1 the overall layering block diagram of the present invention, the overall layering of equipment for monitoring power quality is illustrated in figure
Block diagram and its intermodule interface graph of a relation.In it can be seen from the figure that:Hardware layer host CPU intends the omap138 platforms using TI, periphery
Device mainly includes:DDR, Ethernet, UPP parallel interfaces, USB port, LCD display interfaces, NandFlash+ outsides solid state hard disc
Storage, RS232 serial line interfaces etc..System layer is using linux as master operating system.Application layer software is based on linux operations system
System developed, according to apparatus function demand, software module can be divided into raw data acquisition, power quality data operation,
Human-computer interaction and data display, power quality data storage, pass through stipulations and the several parts of agreement transmission data.
It is illustrated in figure 2 the equipment for monitoring power quality hardware system structure and composition figure of the present invention.Can from figure
Going out the present apparatus includes:SV sampling plates, analog sampling plate, FPGA controlling of sampling chip, DSP computing chips and core processing module.
FPGA controlling of sampling chips be responsible for controlling and read SV sampling plates through optical port Ethernet receive parsing IEC61850-9-2 messages,
Read analog sampling plate and give DSP through the transformed digital signals of A/D, and by upp sequential, pass through GPIO mouthfuls of interruption sides after sending
Formula reminds DSP.Carry DOM disks realize storage data in EMIF buses, and nandFlash realizes the file of carry linux operation
System, w5300 realize ethernet communication function.Iic bus carry CAT9555 realizes button, input and output function,
RX8025T realizes clock timing function.
Such as the software general frame block diagram that Fig. 3 is the present invention.SV sampling plates are responsible for the packet receiving of IEC61850-9-2 messages, solution
Bag and the transmission that internal agreement is carried out in a manner of bus;Analog sampling plate is responsible for network voltage current waveform after A/D
Transmitted with bus mode;FPGA controlling of sampling chips are responsible for reception and the framing of sampled data, are carried out by controlling bus to SV
The configuration of sampling plate, and send sampled data by upp sequential in a manner of down trigger and give DSP computing chips;DSP computing chips
Steady-state quantity calculating, transient state judgement, flickering calculating are mainly responsible for, core processing module, that is, ARM modules are mainly responsible for power quality and refer to
Target statistical analysis, SV safeguard the functions such as configuration, man-machine interface, communication.
The power quality device start-up course flow chart of the present invention is illustrated in figure 4, core processing module, that is, ARM modules are led to
Double-core process initiation DSP computing chips are crossed, it is synchronous into synchronization of row addresses and clock, to reach the same of power quality index calculated value
Step.Core processing module, that is, ARM modules control FPGA controlling of sampling chip to the restarting of SV sampling modules, rope by iic bus
Want configuration information, issue configuration information.
It is illustrated in figure 5 power quality device signal sampling process flow diagram flow chart.SV sampling plates receive combining unit
IEC61850-9-2 messages, through packet receiving, unpacking, framing, are stored in bus cache area, and FPGA sampling controls are notified in a manner of I O trigger
Coremaking piece;FPGA controlling of sampling chip receives the sampled data in bus cache area, notifies DSP to connect in a manner of down trigger after framing
Receive data;DSP computing chips receive the group bag data of FPGA controlling of sampling chips by UPP modes, and carry out data calculating, and
10 cycle data, flickering data, transient information are sent to core processing module i.e. ARM modules in a manner of Dual-Core Communication;Core
Processing module, that is, the statistics of ARM modules progress data, storage, displaying, communication.
Although the present invention disclosed as above with preferred embodiment, they be not for limit the present invention, it is any ripe
This those skilled in the art is practised, without departing from the spirit and scope of the invention, can make various changes or retouch from working as, therefore the guarantor of the present invention
Shield scope should be subject to what claims hereof protection domain was defined.
Claims (5)
1. a kind of replaceable digital and analog equipment for monitoring power quality, applied to traditional substation and intelligent substation,
It is characterised in that it includes:
SV sampling plates:It is responsible for the digital signal of input being converted into the digital signal of default standard, and transformed numeral is believed
Number send to FPGA controlling of sampling chips;
Analog sampling plate:It is responsible for the analog signal received being converted into the digital signal of default standard and by transformed numeral
Signal is sent to FPGA controlling of sampling chips;The analog sampling plate is hardware mode frequency-tracking sample circuit, and tracking is weekly
The sample rate that 512 points and 1024 points of ripple;
FPGA controlling of sampling chips:It is responsible for control and the transformed digital sample of synchronously simulating sampling plate or SV sampling plates is believed
Number, and sampled signal is sent to DSP computing chips;
DSP computing chips:Under analog sampling mode, the DSP computing chips are responsible for receiving FPGA controlling of sampling chip transmission
Whole 10 cycle data calculate effective value, and calculate other power quality indexs;During SV sample modes, the DSP
Computing chip is responsible for receiving the sampled value of the fixed intervals of FPGA controlling of sampling chip transmission, calculate frequency values and frequency analysis and
Other power quality indexs;The DSP computing chips send the information calculated to core processing module;
Core processing module:It is responsible for obtaining 10 cycle data, transient information, the flickering data of DSP computing chips;So as to carry out electricity
Statistical analysis, storage, displaying, the communication of energy qualitative data, and signal transmission is entered into IEC61850 station levels;
The SV sampling plates output terminal is connected with the IO of FPGA sampling control modules;Analog sampling plate output terminal is through data/address bus
It is connected with FPGA controlling of sampling chip input terminals;The output terminal of the FPGA controlling of sampling chip and the input of DSP computing chips
End is connected;The DSP computing chips output terminal is connected with the input terminal of core processing module.
A kind of 2. replaceable digital and analog equipment for monitoring power quality described in accordance with the claim 1, it is characterised in that:
The core processing module is dual core processor OMAP138.
A kind of 3. replaceable digital and analog equipment for monitoring power quality described in accordance with the claim 1, it is characterised in that:
Circuit signal is conveyed into analog sampling plate to be sampled by 40K precision resistances successively, the isolation of 2mA/2mA current transformers, electric current
Changed through 5A/2mA current transformers, finally by being exported after 16 AD7706 analog-to-digital conversions.
4. a kind of method of replaceable digital and analog electric energy quality monitoring, will using such as any rights of claim 1-3
Seek the device, it is characterised in that:Comprise the following steps:
Step 1:Signal sampling:The signal of sampling is numeral and/or analog signal;Sampled digital signal receives for SV sampling plates
The message signals for the combining unit transmitted by Ethernet, and message signals are converted to the digital signal of default standard;Sampling
Analog signal is that analog sampling plate receives [M1] respectively by resistance sampling, current transformer isolation and mutual inductance, passes through AD moduluses
It is converted into the digital signal of default standard;
Step 2:Signal controls;By the digital data transmission people's FPGA controlling of sampling cores for the default standard being converted into step 1
Piece;Specially:FPGA controlling of sampling chip receives the digital signal of SV sampling plates transmission, FPGA controlling of sampling cores through data/address bus
Piece restarts through controlling bus control SV sampling modules, asks for configuration information, issues configuration information;FPGA controlling of sampling chips are through number
The sampled data of analog sampling plate is received according to bus, and receives the count value of the frequency sampling circuit of analog sampling plate, synchronometer
Calculate real-time frequency value;Sampled signal is sent DSP computing chips by FPGA controlling of sampling chip;
Step 3:DSP is calculated:DSP computing chips receive the sampled signal that FPGA controlling of sampling chips transmit;DSP is calculated
Module receives sampled data with UPP mechanism, and SV sampled data frequencies are calculated using " comparison method based on Hanning window function " method
Value and harmonic value;The DSP computing modules calculate the harmonic value of non-2N time using interpolation method, humorous under compatible different sample rates
Ripple calculates and its harmonic spectrum leakage problem;
Step 4:Core processing module is handled;The core processing module uses dual core processor OMP138, is led to double-core
News mechanism obtains 10 cycle data, transient information, the flickering data of DSP computing modules, and core processing module carries out power quality
Statistical analysis, storage, displaying, the communication of data, support the access of IEC61850 station levels.
5. according to a kind of method of replaceable digital and analog electric energy quality monitoring as claimed in claim 4, its feature
It is:The analog sampling is sampled by hardware frequency tracking mode, samples per cycle at 512 points or 1024 points;SV samplings are by fixation
Interval mode samples, sample rate 4k/s or 12.8k/s.
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CN109742721A (en) * | 2019-03-15 | 2019-05-10 | 国网江苏省电力有限公司 | A kind of combining unit data error-proof device |
CN110376433A (en) * | 2019-08-07 | 2019-10-25 | 国家电网有限公司 | Back-to-back DC power transmission engineering converter station energy-consumption monitoring device, system and method |
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CN111275608A (en) * | 2020-01-20 | 2020-06-12 | 桂林电子科技大学 | Remote sensing image orthorectification parallel system based on FPGA |
CN111769641A (en) * | 2020-06-29 | 2020-10-13 | 水木源华电气有限公司 | Intelligent terminal of power distribution internet of things |
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CN108776263A (en) * | 2018-05-02 | 2018-11-09 | 三峡大学 | Harmonic detecting method based on the peaceful self-convolution window of the high-order Chinese and improvement interpolation algorithm |
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CN112988271A (en) * | 2021-03-19 | 2021-06-18 | 四川航天神坤科技有限公司 | System and method for dynamically configuring FPGA (field programmable Gate array) in passive SelectMAP (selectable MAP) mode |
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