CN107911110A - level shift circuit based on input control diode - Google Patents
level shift circuit based on input control diode Download PDFInfo
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- CN107911110A CN107911110A CN201711006129.3A CN201711006129A CN107911110A CN 107911110 A CN107911110 A CN 107911110A CN 201711006129 A CN201711006129 A CN 201711006129A CN 107911110 A CN107911110 A CN 107911110A
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- diode
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- shift circuit
- level shift
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/0175—Coupling arrangements; Interface arrangements
- H03K19/0185—Coupling arrangements; Interface arrangements using field effect transistors only
- H03K19/018507—Interface arrangements
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/0175—Coupling arrangements; Interface arrangements
- H03K19/017509—Interface arrangements
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- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- Mathematical Physics (AREA)
- Logic Circuits (AREA)
Abstract
The present invention relates to analogue layout, to propose a kind of novel topological structure based on input control diode.In the structure shown here, the introducing of diode circuit can ensure the normal operation of level shift circuit in the case where turning off ource electric current, and effectively reduce the standby power of WCMLS.The present invention, based on the level shift circuit of input control diode, V is met by N-type MOS device MN1~MN4, p-type MOS device MP1, MP2, diode Di, a low pressure reverser and two high pressure reverser compositions, MP1, MP2 sourcesDDH, grid end, which connects together, is connected to the drain terminal of MN1, forms current source structure；MN1 sources connect MN3 drain terminals, MN3 sources ground connection；The drain terminal of MN1 is connected to the upper end of diode Di, diode lower end connection MN4 drain terminals, MN4 sources ground connection at the same time.Present invention is mainly applied to analogue layout occasions that manufacture.
Description
Technical field
The present invention relates to analogue layout field, especially complex SOC device field.Concretely relate to be based on
The level shift circuit of input control diode.
Background technology
In wireless sensor network, the system-on-chip applied with fields such as Minitype health care equipment and environmental monitoring systems
(systems on chips, SOCs) becomes to become increasingly complex, and whole system power consumption if high-tension circuit is used is excessive, and adopts
It is difficult to meet performance requirement again with the speed of low-voltage circuit.Best solution is to provide different voltages in disparate modules, high
Fast circuit provides high pressure, and low-speed circuits provide low pressure.Therefore the proposition of level shift (level shifter, LS) circuit
It is of great significance.
There are two kinds of mainstream level shift circuit structures at present：Cross coupling structure and current-mirror structure.Shown in Fig. 1 is base
In the level shift circuit structure of cross coupling structure.In this mechanism, low level signal VDDLAnd between MN1, MN2
Phase inverter makes node Q and QbVoltage unbalance, and the difference that cross-couplings PMOS device then increases between Q and Qb again reaches
VDDH.The shortcomings that structure, is, works as VDDLWhen smaller, the grid voltage of MN1, MN2 are too small, and level shift is then relatively difficult to achieve.This
Kind problem is resolved by increasing the size of NMOS, but can cause the problems such as power consumption is big, delay is big.
Shown in Fig. 2 is the level shift circuit structure based on current-mirror structure.This structure is low, fast with input voltage
The advantages that degree is fast, area is small.Upper pull portion in this structure and drop-down part are almost without overlapping, but the electrostatic of MN1 and MP2
Stream will increase standby power.
In structure based on current mirror, level shift circuit (the Wilson current of wilson current mirror structure
Mirror based level shifter, WCMLS) it is a kind of more outstanding structure.Fig. 3 show WCMLS structure charts, it
Feedback transistor MP3 flows through the quiescent current of MN1 and MP1 after turning off switching, can effectively reduce level shift circuit
Standby power.But after the structure ource electric current is cut off, B node voltage can rise, the grid end overtension of MP2 can make to flow through MP2
Electric current substantially reduce, cause the voltage at node A to decline.Although voltage drop can increase source current by feedback control,
But electric current increase is smaller, the voltage of node A can not be retracted VDDH, it is final to stablize less than VDDHVoltage, behind this can increase
The quiescent current and standby power of reverser.
The content of the invention
For overcome the deficiencies in the prior art, the problem of rising for the B node voltage occurred in above WCMLS, this hair
It is bright to be directed to a kind of novel topological structure based on input control diode.In the structure shown here, the introducing of diode circuit can
To ensure the normal operation of level shift circuit in the case where turning off ource electric current, and effectively reduce the standby power of WCMLS.This
The technical solution that invention uses is, based on the level shift circuit of input control diode, by N-type MOS device MN1~MN4, P
Type MOS device MP1, MP2, diode Di, a low pressure reverser and two high pressure reverser compositions, MP1, MP2 sources connect
VDDH, grid end, which connects together, is connected to the drain terminal of MN1, forms current source structure；MN1 sources connect MN3 drain terminals, and MN3 sources connect
Ground；The drain terminal of MN1 is connected to the upper end of diode Di, diode lower end connection MN4 drain terminals, MN4 sources ground connection at the same time；Input letter
Number connection MN1, MN4 grid end and low pressure inverter input, low pressure inverter output connection MN2 grid ends.MP2 drain terminals, MN2
Drain terminal connects, and is directly connected to first high pressure inverter input, MN2 sources ground connection.Two high pressure reversers are connected in series
Export high voltage level.
First high pressure inverter input is A nodes, and output terminal is D nodes, and the grid of MP1 and MP2 are B node, low
Pressure inverter input is C nodes, when input signal IN by low level to during high level saltus step, MN1 and MN4 conductings, go out in MP1
Existing electric current；MP2 replicates MP1 electric currents to charge to node A by current-mirror structure, and input control diode Di will after being activated
Make the reduction of node B voltages.A nodes are charged to after high level, make D nodes be low level by reverser, MN3 shut-offs, are closed
The MP1 branches of current source, reduce the standby power of level shift circuit；In level shifter, input control diode Di and
The PM1 of diode connection will form divider, and to ensure that the voltage B at node is less than VDDH, the grid end voltage for being MP2, which leaves, to be filled
The surplus of foot；Upper tensile strength enough will be kept at node A under this state and eliminate voltage drop, effectively reduced in reverser
Quiescent current.
When input IN by high level to low transition when, MN1, MN2 and MN4 will be turned off, level shift circuit
It is closed.
The features of the present invention and beneficial effect are：
The work of WCMLS can be effectively ensured in level shifter circuit in the present invention, the application of input control diode
State, reduces the standby current of reverser, and compared with traditional WCMLS circuit arrangements, the circuit stability proposed is high, power consumption
It is low.
Brief description of the drawings：
Level shift circuit structures of the Fig. 1 based on cross coupling structure.
Level shift circuit structures of the Fig. 2 based on current-mirror structure.
The level shift circuit structure of Fig. 3 wilson current mirror structures.
Level shift circuit structures of the Fig. 4 based on input control diode.
Embodiment
It is contemplated that on WCMLS circuit structures basis, there is provided a kind of low-power consumption level shift circuit, the present invention propose
Technical solution circuit diagram it is as shown in Figure 4.Learnt from figure, the circuit is by WCMLS circuit structures and input control diode group
Into the structure can effectively reduce the standby power of WCMLS circuit structures.Company in the level shift circuit between each transistor
It is as follows to connect mode：
The circuit is reverse by N-type MOS device MN1~MN4, p-type MOS device MP1, MP2, diode Di, a low pressure
Device and two high pressure reverser compositions.MP1, MP2 source meet VDDH, grid end, which connects together, is connected to the drain terminal of MN1, forms electricity
Flow source structure.MN1 sources connect MN3 drain terminals, MN3 sources ground connection.The drain terminal of MN1 is connected to the upper end of diode Di at the same time, and two
Pole pipe lower end connects MN4 drain terminals, MN4 sources ground connection.Input signal connects MN1, MN4 grid end and low pressure inverter input,
Low pressure inverter output connects MN2 grid ends.MP2 drain terminals, MN2 drain terminals connection, it is defeated to be directly connected to first high pressure reverser
Enter end, MN2 sources ground connection.Two high pressure reversers are connected in series output high voltage level.For more preferable principle of specification, it is assumed that first
High pressure inverter input is A nodes, and output terminal is D nodes, and the grid of MP1 and MP2 is B node, low pressure inverter input
For C nodes.
In the structure, when input signal IN by low level to during high level saltus step, there is electricity in MP1 in MN1 and MN4 conductings
Stream.MP2 replicates MP1 electric currents to charge to node A by current-mirror structure, and input control diode Di will envoy after being activated
Point B voltages reduce.A nodes are charged to after high level, make D nodes be low level by reverser, MN3 shut-offs, close electric current
The MP1 branches in source, reduce the standby power of level shift circuit.In level shifter in this patent, input control two
The PM1 that pole pipe Di is connected with diode will form divider, to ensure that the voltage B at node is less than VDDH, the grid end electricity for being MP2
Pressure leaves the surplus of abundance.Upper tensile strength enough will be kept at node A under this state and eliminate voltage drop, effectively reduced
Quiescent current in reverser.
When input IN by high level to low transition when, MN1, MN2 and MN4 will be turned off, level shift circuit
It is closed.
To become apparent from the object, technical solutions and advantages of the present invention, implementation of the present invention is provided below in conjunction with example
The specific descriptions of mode.On the basis of 0.18 micron process, the optimum size of transistor is as follows：
When input signal is 0.3V, and output voltage is 3.3V, power consumption 1.02nW, realizes the excellent of low-power consumption
Performance.
Claims (3)
1. a kind of level shift circuit based on input control diode, it is characterized in that, by N-type MOS device MN1~MN4, p-type
MOS device MP1, MP2, diode Di, a low pressure reverser and two high pressure reverser compositions, MP1, MP2 sources connect
VDDH, grid end, which connects together, is connected to the drain terminal of MN1, forms current source structure；MN1 sources connect MN3 drain terminals, and MN3 sources connect
Ground；The drain terminal of MN1 is connected to the upper end of diode Di, diode lower end connection MN4 drain terminals, MN4 sources ground connection at the same time；Input letter
Number connection MN1, MN4 grid end and low pressure inverter input, low pressure inverter output connection MN2 grid ends.MP2 drain terminals, MN2
Drain terminal connects, and is directly connected to first high pressure inverter input, MN2 sources ground connection.Two high pressure reversers are connected in series
Export high voltage level.
2. the level shift circuit as claimed in claim 1 based on input control diode, it is characterized in that, first high pressure is anti-
It is A nodes to device input terminal, output terminal is D nodes, and the grid of MP1 and MP2 are B node, and low pressure inverter input is C sections
Point, when input signal IN by low level to during high level saltus step, there is electric current in MP1 in MN1 and MN4 conductings；MP2 passes through electric current
Mirror structure replication MP1 electric currents charge to node A, and input control diode Di will make the reduction of node B voltages after being activated.A
Node is charged to after high level, makes D nodes be low level by reverser, MN3 shut-offs, close the MP1 branches of current source, drop
The low standby power of level shift circuit；In level shifter, PM1 that input control diode Di is connected with diode is by shape
Voltage divider, to ensure that the voltage B at node is less than VDDH, the surplus of abundance is left for the grid end voltage of MP2；Under this state
Upper tensile strength enough will be kept at node A and eliminate voltage drop, effectively reduce the quiescent current in reverser.
3. the level shift circuit as claimed in claim 1 based on input control diode, it is characterized in that, when input IN is by height
When level is to low transition, MN1, MN2 and MN4 will be turned off, and level shift circuit is closed.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201711006129.3A CN107911110A (en) | 2017-10-25 | 2017-10-25 | level shift circuit based on input control diode |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201711006129.3A CN107911110A (en) | 2017-10-25 | 2017-10-25 | level shift circuit based on input control diode |
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| Publication Number | Publication Date |
|---|---|
| CN107911110A true CN107911110A (en) | 2018-04-13 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201711006129.3A Pending CN107911110A (en) | 2017-10-25 | 2017-10-25 | level shift circuit based on input control diode |
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| CN (1) | CN107911110A (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2020057138A1 (en) * | 2018-09-20 | 2020-03-26 | 北京嘉楠捷思信息技术有限公司 | Full swing voltage conversion circuit and operation unit, chip, hashboard, and computing device using same |
| CN111478693A (en) * | 2020-05-07 | 2020-07-31 | 北京中科芯蕊科技有限公司 | Near-threshold level converter |
| CN113541676A (en) * | 2021-08-10 | 2021-10-22 | 宜矽源半导体南京有限公司 | Low-power consumption high-voltage level shift circuit |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR20130131070A (en) * | 2012-05-23 | 2013-12-03 | 한양대학교 에리카산학협력단 | Voltage level shifter |
| CN103856208A (en) * | 2012-11-29 | 2014-06-11 | 英飞凌科技奥地利有限公司 | System and Method for Level Shifter |
| CN105958994A (en) * | 2016-04-25 | 2016-09-21 | 深圳大学 | Subthreshold level shifter having wide input voltage range |
| US9673821B1 (en) * | 2014-10-28 | 2017-06-06 | University Of South Florida | Wide operating level shifters |
-
2017
- 2017-10-25 CN CN201711006129.3A patent/CN107911110A/en active Pending
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR20130131070A (en) * | 2012-05-23 | 2013-12-03 | 한양대학교 에리카산학협력단 | Voltage level shifter |
| CN103856208A (en) * | 2012-11-29 | 2014-06-11 | 英飞凌科技奥地利有限公司 | System and Method for Level Shifter |
| US9673821B1 (en) * | 2014-10-28 | 2017-06-06 | University Of South Florida | Wide operating level shifters |
| CN105958994A (en) * | 2016-04-25 | 2016-09-21 | 深圳大学 | Subthreshold level shifter having wide input voltage range |
Non-Patent Citations (1)
| Title |
|---|
| JUN ZHOU等: "An Ultra-Low Voltage Level Shifter Using Revised Wilson Current Mirror for Fast and Energy-Efficient Wide-Range Voltage Conversion from Sub-Threshold to I/O Voltage", 《IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I: REGULAR PAPERS》 * |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2020057138A1 (en) * | 2018-09-20 | 2020-03-26 | 北京嘉楠捷思信息技术有限公司 | Full swing voltage conversion circuit and operation unit, chip, hashboard, and computing device using same |
| US11409314B2 (en) | 2018-09-20 | 2022-08-09 | Canaan Creative Co., Ltd. | Full swing voltage conversion circuit and operation unit, chip, hash board, and computing device using same |
| CN111478693A (en) * | 2020-05-07 | 2020-07-31 | 北京中科芯蕊科技有限公司 | Near-threshold level converter |
| CN113541676A (en) * | 2021-08-10 | 2021-10-22 | 宜矽源半导体南京有限公司 | Low-power consumption high-voltage level shift circuit |
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