CN107886920B - Method and system for obtaining correct Mura compensation data - Google Patents

Method and system for obtaining correct Mura compensation data Download PDF

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CN107886920B
CN107886920B CN201711218894.1A CN201711218894A CN107886920B CN 107886920 B CN107886920 B CN 107886920B CN 201711218894 A CN201711218894 A CN 201711218894A CN 107886920 B CN107886920 B CN 107886920B
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mura compensation
compensation data
current
circuit board
data
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CN107886920A (en
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肖光星
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TCL China Star Optoelectronics Technology Co Ltd
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Shenzhen China Star Optoelectronics Technology Co Ltd
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    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3607Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals for displaying colours or for displaying grey scales with a specific pixel layout, e.g. using sub-pixels
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00Control of display operating conditions
    • G09G2320/02Improving the quality of display appearance
    • G09G2320/0271Adjustment of the gradation levels within the range of the gradation scale, e.g. by redistribution or clipping

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  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Liquid Crystal Display Device Control (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)

Abstract

The invention discloses a system for obtaining correct Mura compensation data, which comprises a first circuit board, a second circuit board, a third circuit board, a switching board and an upper computer, wherein: the first circuit board is connected with the liquid crystal panel and is provided with a first memory; the third circuit board is used for obtaining test gray scale image data from the upper computer; the second circuit board is provided with a time schedule controller which is used for receiving the test gray-scale image data and the current Mura compensation data to obtain the corrected test image data and outputting the test image data to the liquid crystal panel for displaying; the switch board comprises a CPLD chip module and a second memory for temporarily storing the current Mura compensation data; and the upper computer is used for sending commands to the switching board and the third circuit board so as to control the current Mura compensation data to be detected on line. The invention also discloses a corresponding method. The invention can realize the detection of the current Mura compensation data on the line, can improve the detection precision and efficiency, and can reduce the burning times of the first memory.

Description

Method and system for obtaining correct Mura compensation data
Technical Field
The invention relates to the field of display, in particular to a method and a system for obtaining correct Mura compensation data.
Background
Due to defects in the manufacturing process of Liquid Crystal Displays (LCDs), the brightness of the Liquid Crystal panels (panels) of the produced LCDs is often non-uniform, and various Mura (Mura refers to the phenomenon of various traces caused by non-uniform brightness of the displays) is formed. In order to improve the uniformity of the brightness of the liquid crystal panel, a Mura form of 3-5 gray-scale pictures (pure white pictures with different brightness) can be shot by a camera, and the brightness difference between the peripheral area and the central position is calculated by comparing the brightness of the central position of the panel, so that Mura compensation data (gray-scale data) is obtained. Wherein, the area brighter than the central position reduces the gray scale data to reduce the brightness; the area darker than the center position increases the gray scale data to increase the brightness. And then, the Mura compensation data is burnt into a memory of the liquid crystal panel by the data burner. Then, when the liquid crystal display is powered on, the time sequence controller (TCON) reads the Mura compensation data from the memory, and displays the picture with consistent brightness after Mura compensation on the liquid crystal panel after operation with the input original gray-scale image data.
In practical application, the Mura compensation data can be stored all the time after being burned into the memory, and the TCON can read the Mura compensation data and perform Mura compensation after being electrified every time. At this time, if the compensated frame is still abnormal, the Mura compensation data is considered to be incorrect. However, in the prior art, the above-mentioned determination process is generally determined by human observation, for example, the effect of the compensated panel in a pure gray scale (such as at gray level 60) is observed by human eyes, and if the brightness is observed to have non-uniformity, the current Mura compensation data is considered to be incorrect. However, this manual determination method is not accurate enough, and to obtain accurate Mura compensation data, many times new Mura compensation data needs to be replaced for verification, so that the memory needs to be burned many times, and the efficiency is very low. Moreover, the work of burning the memory repeatedly is needed, so that the whole analysis process is too complicated.
Disclosure of Invention
The invention aims to solve the technical problem that the invention discloses a method and a system for obtaining correct Mura compensation data, which can realize online detection of the current Mura compensation data, improve the detection precision and efficiency and reduce the burning times of a first memory.
In order to solve the above technical problem, an aspect of the embodiments of the present invention provides a system for obtaining correct Mura compensation data, where the system includes a first circuit board, a second circuit board, a third circuit board, a switch board, and an upper computer, the first circuit board is connected to a liquid crystal panel of a liquid crystal display, the first circuit board and the second circuit board are respectively connected to the upper computer through the switch board, the second circuit board is connected to the first circuit board, and the third circuit board is connected to the upper computer;
the switching board is used for analyzing current Mura compensation data or correct Mura compensation data from the control signal after receiving the control signal from the upper computer, and establishing connection between the second circuit board and a second memory of the switching board according to the control signal or establishing connection between the second circuit board and the first circuit board;
the third circuit board is used for obtaining a plurality of groups of test gray scale image data associated with the current Mura compensation data from the control signal after receiving the control signal from the upper computer and transmitting the test gray scale image data to the second circuit board;
the second circuit board is provided with a time schedule controller, the time schedule controller is used for receiving the test gray scale image data, performing calculation processing on the test gray scale image data and the current Mura compensation data obtained from the switching board to obtain corrected test image data, and outputting the corrected test image data to the liquid crystal panel through the first circuit board for display;
the upper computer is used for generating current Mura compensation data and test gray scale image data associated with the current Mura compensation data and sending control signals to the switching board and the third circuit board; and the gray scale data acquisition unit is used for acquiring gray scale data of a display image corresponding to the corrected test image displayed on the liquid crystal panel and analyzing the gray scale data to determine whether the current Mura compensation data is correct or not so as to acquire correct Mura compensation data; and is used for sending the correct Mura compensation data to the first circuit board through the switching board;
and the first circuit board is provided with a first memory, and the first memory is used for obtaining correct Mura compensation data from an upper computer from the switching board and storing the Mura compensation data.
The system further comprises a conversion board, the conversion board is arranged between the upper computer and the switching board and connected with the third circuit board, the conversion board is used for converting a control signal from the upper computer into an IIC signal or an SPI signal, the SPI signal is transmitted to the switching board, the IIC signal is transmitted to the third circuit board, and the SPI signal comprises a burning first memory instruction and a Mura compensation data detection instruction.
The switching board comprises a CPLD chip module and a second memory, the second memory is used for temporarily storing current Mura compensation data in a control signal from an upper computer, and the CPLD chip module is used for switching the connection between the second circuit board and the first memory or the second memory.
Wherein, the CPLD chip module further comprises an SPI analysis module and an SPI interface conversion module, wherein:
the SPI analyzing module is used for analyzing the SPI signal from the conversion board, and when the SPI signal is analyzed to be a command for burning the first memory, Mura compensation data contained in the SPI signal are burnt to the first memory as correct Mura compensation data; when the SPI signal is analyzed to be a Mura compensation data detection command, the Mura compensation data contained in the SPI signal is taken as the current Mura compensation data to be burnt into a second memory, and the second circuit board is connected with the second memory in an SPI mode;
the SPI interface conversion module is used for writing the signals analyzed by the SPI analysis module into the first memory or the second memory; or for reading data from the first memory or the second memory.
The upper computer obtains correct Mura compensation data through the following modes:
generating a plurality of groups of test gray scale image data associated with the current Mura compensation data;
carrying out gray processing and histogram statistics on an image displayed on a liquid crystal panel after each group of test gray scale image data is corrected by current Mura compensation data;
determining whether the brightness of the picture of the displayed image data is uniform according to the histogram statistics so as to determine whether the current Mura compensation data is correct, and determining the current Mura compensation data as a correct Mura compensation number when the brightness of the picture is uniform; otherwise, determining that the current Mura compensation data is incorrect, regenerating new current Mura compensation data and sending the new current Mura compensation data to the switching board, generating test gray-scale image data corresponding to the new current Mura compensation data and sending the test gray-scale image data to a third circuit board, and continuously detecting the new current Mura compensation data until correct current Mura compensation data is finally obtained.
Correspondingly, the embodiment of the present invention further includes a method for obtaining correct Mura compensation data, which is applied to the system for obtaining correct Mura compensation data, and includes the following steps:
the switching board receives a control signal from the upper computer, stores current Mura compensation data contained in an instruction when the instruction is analyzed as the Mura compensation data detection instruction, and establishes connection with the second circuit board;
the third circuit board receives a control signal from the upper computer, obtains a plurality of groups of test gray scale image data associated with the current Mura compensation data from the control signal, and transmits the test gray scale image data to the second circuit board;
the second circuit board obtains the current Mura compensation data from the switching board, obtains the test gray-scale image data from the third circuit board, sequentially processes each group of test gray-scale image data and the current Mura compensation data to obtain corresponding corrected test image data, and outputs the corrected test image data to the liquid crystal panel through the first circuit board;
and the upper computer obtains gray data of a display image corresponding to the corrected test image data displayed on the liquid crystal panel, and analyzes the gray data to determine whether the current Mura compensation data is correct or not so as to obtain correct Mura compensation data.
Wherein, further include:
the conversion board converts a control signal from an upper computer into an IIC signal or an SPI signal and transmits the SPI signal to the conversion board or transmits the IIC signal to the third circuit board; the SPI signal comprises a first memory burning command and a Mura compensation data detecting command.
Wherein, further include:
the upper computer sends a control signal to the switching board after determining that the current Mura compensation data is correct, wherein the control signal comprises a first memory burning instruction and the current Mura compensation data;
the switching board analyzes a command for burning a first memory and current Mura compensation data from the control signal, burns the current Mura compensation data as correct Mura compensation data into a first memory in a first circuit board, and establishes connection between the second circuit board and the first memory.
The step of obtaining the correct Mura compensation data by the upper computer obtaining the gray scale data of the display image corresponding to the corrected test image data displayed on the liquid crystal panel and analyzing the gray scale data to determine whether the current Mura compensation data is correct or not is specifically:
generating a plurality of groups of test gray scale image data associated with the current Mura compensation data in the upper computer;
carrying out gray processing and histogram statistics on an image which is displayed on a liquid crystal panel after each group of test gray scale image data is corrected by current Mura compensation data;
determining whether the brightness of the picture of the displayed image data is uniform according to the histogram statistics so as to determine whether the current Mura compensation data is correct, and determining the current Mura compensation data as a correct Mura compensation number when the brightness of the picture is uniform; otherwise, determining that the current Mura compensation data is incorrect, regenerating new current Mura compensation data and sending the new current Mura compensation data to the switching board, generating test gray-scale image data corresponding to the new current Mura compensation data and sending the test gray-scale image data to a third circuit board, and continuously detecting the new current Mura compensation data until correct current Mura compensation data is finally obtained.
The step of generating a plurality of groups of test gray scale image data associated with the Mura compensation data in the upper computer comprises the following steps:
obtaining a plurality of corresponding gray scales in the current Mura compensation data;
and selecting pure white images of three gray scales, namely a middle gray scale, a 0 gray scale and a 255 gray scale between two adjacent gray scales in the three gray scales as a plurality of groups of test gray scale image data.
Wherein, the step of performing gray processing and histogram statistics on the image displayed on the liquid crystal panel after each group of test gray scale image data is corrected by the current Mura compensation data further comprises:
for a group of corrected test images, shooting a plurality of images at intervals, and obtaining a gray value corresponding to each pixel of each image;
and eliminating the maximum gray value and the minimum gray value from a plurality of gray values corresponding to each pixel of the plurality of images, and averaging the rest gray values to obtain the final gray value corresponding to each pixel, thereby obtaining the gray data of each group of display images.
Wherein, the step of determining whether the brightness of the image of the display image data is uniform according to the histogram statistics to determine whether the current Mura compensation data is correct comprises:
carrying out histogram statistics on the gray data of each group of display images, and counting the number of pixels corresponding to each gray value;
and counting the maximum value and the number of the absolute values deviating from the target value, and comparing the maximum value and the number with preset comparison threshold values respectively, so as to determine whether the picture of the gray data is uniform or not and determine whether the current Mura compensation data is correct or not.
The embodiment of the invention has the following beneficial effects:
the embodiment of the invention provides a method and a system for obtaining correct Mura compensation data. Controlling the conversion board to be in a Mura compensation data detection mode through the upper computer, storing the current Mura compensation data into a second memory of the second circuit board, selecting a plurality of groups of test gray scale image data associated with the current Mura compensation data, and transmitting the test gray scale image data to the second circuit board; in the second circuit board, processing each group of test gray scale image data and the current Mura compensation data in sequence to obtain corresponding corrected test image data, and outputting the corresponding corrected test image data to a liquid crystal panel for displaying; shooting the corrected test images displayed on the liquid crystal panel through a camera, and obtaining gray data of the display image corresponding to each group of corrected test images; performing histogram statistics on the gray data of all the display images, and determining whether the image brightness of the display image data is uniform according to the histogram statistics so as to determine whether the current Mura compensation data is correct; only after the current Mura compensation data is determined to be correct, the current Mura compensation data is burned into a first memory in a first circuit board. Therefore, the current Mura compensation data can be detected on line, the detection precision and efficiency can be improved, and the burning times of the first memory can be reduced.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the drawings without creative efforts.
FIG. 1 is a schematic diagram of an embodiment of a system for obtaining correct Mura compensation data according to the present invention;
FIG. 2 is a more detailed structure and connection diagram of the switch board of FIG. 1;
fig. 3 is a main flow chart of an embodiment of a method for obtaining correct Mura compensation data according to the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be described clearly and completely with reference to the accompanying drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
It should be noted that, in order to avoid obscuring the present invention with unnecessary details, only the structures and/or processing steps closely related to the scheme according to the present invention are shown in the drawings, and other details not so relevant to the present invention are omitted.
Fig. 1 is a schematic structural diagram illustrating an embodiment of a system for obtaining correct Mura compensation data according to the present invention; referring to fig. 2, in this embodiment, the system for detecting Mura-compensated data anomalies includes: the circuit board comprises a first circuit board 11, a second circuit board 12, a third circuit board 15, a switching board 14 and an upper computer 3; wherein:
the first circuit board 11 is connected with a liquid crystal panel 2 of the liquid crystal display, the first circuit board 11 and the second circuit board 12 are respectively connected with the upper computer 3 through a switching board 14, the second circuit board 12 is connected with the first circuit board 11, and the third circuit board 15 is connected with the upper computer 3;
the switch board 14 is configured to, after receiving a control signal from the upper computer 3, parse current Mura compensation data or correct Mura compensation data from the control signal, and establish connection between the second circuit board 12 and the second memory of the switch board 14 according to the control signal, or establish connection between the second circuit board 12 and the first memory of the first circuit board 11; specifically, the switch board 14 includes a CPLD (Complex Programmable logic device) chip module and a second memory 142, where the second memory 142 is used for temporarily storing current Mura compensation data in a control signal from the upper computer 3, and may be a Static Random Access Memory (SRAM), and the CPLD chip module is used for switching connection between the timing controller 121 in the second circuit board and the first memory 110 or the second memory 142;
the third circuit board 15 is configured to receive a control signal from the upper computer 3, obtain a plurality of groups of test grayscale image data associated with the current Mura compensation data from the control signal, and transmit the test grayscale image data to the second circuit board 12;
the second circuit board 12 is provided with a timing controller 121, the timing controller 121 is configured to perform calculation processing (i.e., compensation calculation) on the test gray-scale image data and the current Mura compensation data obtained from the switch board 14 to obtain modified test image data, and output the modified test image data to the first circuit board 11 through the connection line 13, and output the modified test image data to the liquid crystal panel 2 through the first circuit board 11 for display;
the upper computer 3 is used for generating current Mura compensation data and test gray scale image data associated with the current Mura compensation data, sending control to the switch board 14 and the third circuit board 15, and controlling on-line detection on the current Mura compensation data to obtain correct Mura compensation data. Specifically, the upper computer is configured to obtain gray data of a display image corresponding to the corrected test image displayed on the liquid crystal panel 2, and determine whether the current Mura compensation data is correct by analyzing the gray data, so as to obtain correct Mura compensation data; and is used to send the correct Mura compensation data to the first circuit board 11 through the switch board 14;
the first circuit board 11 is provided with a first memory 110, and the first memory 110 is used for obtaining and storing correct Mura compensation data from the upper computer 3 from the switch board 14.
The device comprises an upper computer 3, a switching board 16, a third circuit board 15 and a conversion board 16, wherein the switching board 16 is arranged between the upper computer 3 and the switching board 16 and connected with the third circuit board 15, the conversion board 16 is used for converting a control signal from the upper computer 3 into an IIC signal or an SPI signal, the SPI signal is transmitted to the switching board 14, the IIC signal is transmitted to the third circuit board 15, and the SPI signal comprises a first memory burning instruction and a Mura compensation data detection instruction.
Wherein, the CPLD chip module further includes an SPI parsing module 141 and an SPI interface conversion module 140, wherein:
the SPI analyzing module 141 is configured to analyze the SPI signal from the conversion board 16, and when detecting that the CS1 port thereof is at a low level, analyze the SPI signal as a command to burn the first memory, and burn the Mura compensation data included in the SPI signal as correct Mura compensation data into the first memory 110; when detecting that the CS2 end is at a low level, analyzing the SPI signal to detect a Mura compensation data command, burning Mura compensation data included in the SPI signal as current Mura compensation data into the second memory 142, establishing SPI connection between the second circuit board 12 and the second memory 142, and reading the current Mura compensation data from the second memory when the timing controller 121 is powered on or reset again;
the SPI interface conversion module 140 is configured to write the signal analyzed by the SPI analysis module 141 into the first memory 110 or the second memory 142; or for reading data from the first memory 110 or the second memory 142.
In addition, it should be noted that, because the SPI interface is used for communication on the conversion board, the communication principle of the SPI is briefly described below, and the SPI is simple to communicate and operates in a master-slave mode, which generally has a master device and one or more slave devices, and requires at least 4 wires, and in fact 3 wires (for example, when used for unidirectional transmission, that is, in a half-duplex mode). Also common to all SPI-based devices are SDI (data in), SDO (data out), SCLK (clock), CS (chip select). The communication mode can be SPI bus host output/slave input or SPI bus host input/slave output; wherein the clock signal SCLK is generated by the master device; the chip select signal CS is a slave enable signal, and is controlled by the master device, and the operation of the chip is enabled only when the chip select signal is a predetermined enable signal (e.g., high). It becomes possible to allow multiple SPI devices to be connected on the same bus.
In one example, the upper computer obtains the correct Mura compensation data by:
generating a plurality of groups of test gray scale image data associated with the current Mura compensation data;
carrying out gray processing and histogram statistics on an image displayed on a liquid crystal panel after each group of test gray scale image data is corrected by current Mura compensation data;
determining whether the brightness of the picture of the displayed image data is uniform according to the histogram statistics so as to determine whether the current Mura compensation data is correct, and determining the current Mura compensation data as a correct Mura compensation number when the brightness of the picture is uniform; otherwise, determining that the current Mura compensation data is incorrect, regenerating new current Mura compensation data and sending the new current Mura compensation data to the switching board, generating test gray-scale image data corresponding to the new current Mura compensation data and sending the test gray-scale image data to a third circuit board, and continuously detecting the new current Mura compensation data until correct current Mura compensation data is finally obtained.
As shown in fig. 3, a main flow chart of an embodiment of a method for obtaining correct Mura compensation data according to an embodiment of the present invention is shown, and it can be understood that the method is implemented in the system shown in fig. 1 and fig. 2, in this embodiment, the method includes the following steps:
step S10, the switch board receives a control signal from the upper computer, and when the control signal is analyzed to be a Mura compensation data detection instruction, the current Mura compensation data contained in the instruction is burnt into a second memory of the CPLD module of the switch board;
step S11, controlling the switch board to establish connection with the second circuit board, so that the second circuit board reads the current Mura compensation data stored in the second memory;
step S12, the third circuit board receives and analyzes a control signal (IIC signal) from the upper computer, obtains a plurality of groups of test gray scale image data associated with the current Mura compensation data, and transmits the test gray scale image data to the second circuit board;
wherein, the method further comprises the steps of generating a plurality of groups of test gray scale image data associated with the Mura compensation data in the upper computer:
obtaining a plurality of corresponding gray scales in the current Mura compensation data;
and selecting three gray scales, wherein the pure white images of the middle gray scale (middle value), the 0 gray scale and the 255 gray scale between two adjacent gray scales in the three gray scales are used as a plurality of groups (namely seven groups) of test gray scale image data.
It is understood that the selection of seven groups in this embodiment is merely an example, and in other embodiments, a different number of groups may be selected;
step S13, the second circuit board obtains the current Mura compensation data from the switch board, obtains the test gray-scale image data from the third circuit board, processes each group of test gray-scale image data and the current Mura compensation data in sequence to obtain corresponding corrected test image data, and outputs the corrected test image data to the liquid crystal panel through the first circuit board;
and step S14, the upper computer obtains the gray data of the display image corresponding to the corrected test image data displayed on the liquid crystal panel, and determines whether the current Mura compensation data is correct or not by analyzing the gray data, so as to obtain the correct Mura compensation data.
Specifically, the method further comprises the following steps:
the conversion board converts a control signal from an upper computer into an IIC signal or an SPI signal and transmits the SPI signal to the conversion board or transmits the IIC signal to the third circuit board; the SPI signal comprises a first memory burning command and a Mura compensation data detecting command.
Specifically, the step S14 further includes:
step S140, generating a plurality of groups of test gray scale image data associated with the current Mura compensation data in an upper computer;
step S141, carrying out gray processing and histogram statistics on the image displayed on the liquid crystal panel after each group of test gray-scale image data is corrected by the current Mura compensation data;
step S142, determining whether the brightness of the image of the displayed image data is uniform according to the histogram statistics so as to determine whether the current Mura compensation data is correct, and determining the current Mura compensation data as the correct Mura compensation number when the brightness of the image is uniform; otherwise, determining that the current Mura compensation data is incorrect, regenerating new current Mura compensation data and sending the new current Mura compensation data to the switching board, generating test gray-scale image data corresponding to the new current Mura compensation data and sending the test gray-scale image data to a third circuit board, and continuously detecting the new current Mura compensation data until correct current Mura compensation data is finally obtained.
The step S141 further includes:
shooting the corrected test images displayed on the liquid crystal panel, and obtaining the gray data of the display image corresponding to each group of corrected test images; specifically, the method comprises the following steps:
for a group of corrected test images, a plurality of images (such as five images) are shot at intervals, and the gray value corresponding to each pixel of each image is obtained;
excluding the maximum gray value and the minimum gray value from a plurality of gray values corresponding to each pixel of the plurality of images, and averaging the remaining gray values to obtain the final gray value corresponding to each pixel, thereby obtaining the gray data of each group of display images, which can be understood that the error caused by shooting can be reduced and the accuracy of the gray data can be improved by the processing;
in this embodiment, since there are seven sets of corrected test images, the gradation data of seven display images is finally obtained;
wherein the step S142 further includes:
carrying out histogram statistics on the gray data of each group of display images, and counting the number of pixels corresponding to each gray value; it is understood that the histogram of the gray scale range [0, L-1] digital image is the discrete function h (rk) ═ Nk; wherein Rk is the k-th gray value, Nk is the number of the gray values Nk in the image, and the number of pixels corresponding to each gray value can be obtained through a histogram function;
and counting the maximum value and the number of the absolute values deviating from the target value, and comparing the maximum value and the number with preset comparison threshold values respectively to determine whether the picture of the gray data is uniform, and if so, determining that the current Mura compensation data is correct Mura compensation data.
It will be appreciated that by taking the form of a histogram and comparing with a comparison threshold, the comparison is more objective, more accurate and more efficient than identification by the human eye.
It is understood that the method further comprises:
after determining that the current Mura compensation data is correct, the upper computer sends a control signal to the switching board, wherein the control signal comprises a first memory burning instruction and the current Mura compensation data;
the switching board analyzes a command for burning a first memory and current Mura compensation data from the control signal, burns the current Mura compensation data as correct Mura compensation data into a first memory in a first circuit board, and establishes connection between the second circuit board and the first memory.
In summary, the embodiments of the present invention provide a method and a system for obtaining correct Mura compensation data. Controlling the conversion board to be in a Mura compensation data detection mode through the upper computer, storing the current Mura compensation data into a second memory of the second circuit board, selecting a plurality of groups of test gray scale image data associated with the current Mura compensation data, and transmitting the test gray scale image data to the second circuit board; in the second circuit board, processing each group of test gray scale image data and the current Mura compensation data in sequence to obtain corresponding corrected test image data, and outputting the corresponding corrected test image data to a liquid crystal panel for displaying; shooting the corrected test images displayed on the liquid crystal panel through a camera, and obtaining gray data of the display image corresponding to each group of corrected test images; performing histogram statistics on the gray data of all the display images, and determining whether the image brightness of the display image data is uniform according to the histogram statistics so as to determine whether the current Mura compensation data is correct; only after the current Mura compensation data is determined to be correct, the current Mura compensation data is burned into a first memory in a first circuit board. Therefore, the current Mura compensation data can be detected on line, the detection precision and efficiency can be improved, and the burning times of the first memory can be reduced.
It is noted that, herein, relational terms such as first and second, and the like may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other identical elements in a process, method, article, or apparatus that comprises the element.
The foregoing is directed to embodiments of the present application and it is noted that numerous modifications and adaptations may be made by those skilled in the art without departing from the principles of the present application and are intended to be within the scope of the present application.

Claims (10)

1. A system for obtaining correct Mura compensation data is characterized by comprising a first circuit board, a second circuit board, a third circuit board, a switching board and an upper computer, wherein the first circuit board is connected with a liquid crystal panel of a liquid crystal display, the first circuit board and the second circuit board are respectively connected with the upper computer through the switching board, the second circuit board is connected with the first circuit board, and the third circuit board is connected with the upper computer;
the switching board is used for analyzing current Mura compensation data or correct Mura compensation data from the control signal after receiving the control signal from the upper computer, and establishing connection between the second circuit board and a second memory of the switching board according to the control signal or establishing connection between the second circuit board and the first circuit board;
the third circuit board is used for obtaining a plurality of groups of test gray scale image data associated with the current Mura compensation data from the control signal after receiving the control signal from the upper computer and transmitting the test gray scale image data to the second circuit board;
the second circuit board is provided with a time schedule controller, the time schedule controller is used for receiving the test gray scale image data, performing calculation processing on the test gray scale image data and the current Mura compensation data obtained from the switching board to obtain corrected test image data, and outputting the corrected test image data to the liquid crystal panel through the first circuit board for display;
the upper computer is used for generating current Mura compensation data and test gray scale image data associated with the current Mura compensation data and sending control signals to the switching board and the third circuit board; and the gray scale data acquisition unit is used for acquiring gray scale data of a display image corresponding to the corrected test image displayed on the liquid crystal panel and analyzing the gray scale data to determine whether the current Mura compensation data is correct or not so as to acquire correct Mura compensation data; and is used for sending the correct Mura compensation data to the first circuit board through the switching board;
and the first circuit board is provided with a first memory, and the first memory is used for obtaining correct Mura compensation data from an upper computer from the switching board and storing the Mura compensation data.
2. The system of claim 1, further comprising a conversion board disposed between the upper computer and the conversion board and connected to the third circuit board, the conversion board being configured to convert a control signal from the upper computer into an IIC signal or an SPI signal, wherein the SPI signal is transmitted to the conversion board, the IIC signal is transmitted to the third circuit board, and the SPI signal includes a burn first memory command and a detect Mura compensation data command.
3. The system of claim 2, wherein the switch board comprises a CPLD chip module and a second memory, the second memory is used for temporarily storing current Mura compensation data in a control signal from an upper computer, and the CPLD chip module is used for switching the connection between the second circuit board and the first memory or the second memory.
4. The system of claim 3, wherein the CPLD chip module further comprises an SPI resolution module and an SPI interface conversion module, wherein:
the SPI analyzing module is used for analyzing the SPI signal from the conversion board, and when the SPI signal is analyzed to be a command for burning the first memory, Mura compensation data contained in the SPI signal are burnt to the first memory as correct Mura compensation data; when the SPI signal is analyzed to be a Mura compensation data detection command, the Mura compensation data contained in the SPI signal is taken as the current Mura compensation data to be burnt into a second memory, and the second circuit board is connected with the second memory in an SPI mode;
the SPI interface conversion module is used for writing the signals analyzed by the SPI analysis module into the first memory or the second memory; or for reading data from the first memory or the second memory.
5. The system of claim 4, wherein the upper computer obtains correct Mura compensation data by:
generating a plurality of groups of test gray scale image data associated with the current Mura compensation data;
carrying out gray processing and histogram statistics on an image displayed on a liquid crystal panel after each group of test gray scale image data is corrected by current Mura compensation data;
determining whether the brightness of the picture of the displayed image data is uniform according to the histogram statistics so as to determine whether the current Mura compensation data is correct, and determining the current Mura compensation data as a correct Mura compensation number when the brightness of the picture is uniform; otherwise, determining that the current Mura compensation data is incorrect, regenerating new current Mura compensation data and sending the new current Mura compensation data to the switching board, generating test gray-scale image data corresponding to the new current Mura compensation data and sending the test gray-scale image data to a third circuit board, and continuously detecting the new current Mura compensation data until correct current Mura compensation data is finally obtained.
6. A method for obtaining correct Mura compensation data, applied to the system for obtaining correct Mura compensation data according to any one of claims 1 to 5, comprising the steps of:
the switching board receives a control signal from an upper computer, stores current Mura compensation data contained in the command when the control signal is analyzed to be a Mura compensation data detection command, and establishes connection with the second circuit board;
the third circuit board receives a control signal from the upper computer, obtains a plurality of groups of test gray scale image data associated with the current Mura compensation data from the control signal, and transmits the test gray scale image data to the second circuit board;
the second circuit board obtains the current Mura compensation data from the switching board, obtains the test gray-scale image data from the third circuit board, sequentially processes each group of test gray-scale image data and the current Mura compensation data to obtain corresponding corrected test image data, and outputs the corrected test image data to the liquid crystal panel through the first circuit board;
and the upper computer obtains gray data of a display image corresponding to the corrected test image data displayed on the liquid crystal panel, and analyzes the gray data to determine whether the current Mura compensation data is correct or not so as to obtain correct Mura compensation data.
7. The method of claim 6, further comprising:
the conversion board converts a control signal from an upper computer into an IIC signal or an SPI signal and transmits the SPI signal to the conversion board or transmits the IIC signal to the third circuit board; the SPI signal comprises a first memory burning command and a Mura compensation data detecting command.
8. The method of claim 6 or 7, further comprising the steps of:
the upper computer sends a control signal to the switching board after determining that the current Mura compensation data is correct, wherein the control signal comprises a first memory burning instruction and the current Mura compensation data;
the switching board analyzes a command for burning a first memory and current Mura compensation data from the control signal, burns the current Mura compensation data as correct Mura compensation data into a first memory in a first circuit board, and establishes connection between the second circuit board and the first memory.
9. The method of claim 8, wherein the step of the upper computer obtaining gray scale data of the display image corresponding to the modified test image data displayed on the liquid crystal panel and obtaining correct Mura compensation data by parsing the gray scale data to determine whether the current Mura compensation data is correct is embodied as:
generating a plurality of groups of test gray scale image data associated with the current Mura compensation data in the upper computer;
carrying out gray processing and histogram statistics on an image which is displayed on a liquid crystal panel after each group of test gray scale image data is corrected by current Mura compensation data;
determining whether the brightness of the picture of the displayed image data is uniform according to the histogram statistics so as to determine whether the current Mura compensation data is correct, and determining the current Mura compensation data as a correct Mura compensation number when the brightness of the picture is uniform; otherwise, determining that the current Mura compensation data is incorrect, regenerating new current Mura compensation data and sending the new current Mura compensation data to the switching board, generating test gray-scale image data corresponding to the new current Mura compensation data and sending the test gray-scale image data to a third circuit board, and continuously detecting the new current Mura compensation data until correct current Mura compensation data is finally obtained.
10. The method of claim 9, wherein the step of generating in the upper computer a plurality of sets of test grayscale image data associated with Mura compensation data comprises:
obtaining a plurality of corresponding gray scales in the current Mura compensation data;
and selecting pure white images of three gray scales, namely a middle gray scale, a 0 gray scale and a 255 gray scale between two adjacent gray scales in the three gray scales as a plurality of groups of test gray scale image data.
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Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111243505B (en) * 2018-11-29 2021-04-23 成都辰显光电有限公司 Pixel driving circuit and display device
CN109509422B (en) * 2018-12-27 2021-08-24 惠科股份有限公司 Display panel drive circuit and display device
CN111381834B (en) * 2018-12-28 2023-09-19 深圳Tcl新技术有限公司 Method for rapidly eliminating Mura of display panel
CN111613157A (en) * 2019-02-22 2020-09-01 咸阳彩虹光电科技有限公司 Mura repair test method of display panel, display panel and display device
CN109637431B (en) * 2019-02-25 2022-04-01 武汉天马微电子有限公司 Display compensation method of display panel
CN110246469A (en) * 2019-07-29 2019-09-17 深圳市华星光电技术有限公司 The demura data application method of unified format
CN111028799B (en) * 2019-12-10 2021-09-03 Tcl华星光电技术有限公司 Driving circuit and driving method of display panel
CN111477168B (en) * 2020-02-27 2021-12-28 京东方科技集团股份有限公司 Compensation method and display method of display panel
CN111554225B (en) * 2020-05-20 2023-02-28 Tcl华星光电技术有限公司 Display device, and speckle eliminating system and speckle eliminating method thereof

Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101017255A (en) * 2006-02-06 2007-08-15 Lg.菲利浦Lcd株式会社 Picture quality controling system
KR101232178B1 (en) * 2006-11-27 2013-02-13 엘지디스플레이 주식회사 Method and Apparatus for Compensating Display Defect of Flat Display
WO2013035635A1 (en) * 2011-09-07 2013-03-14 シャープ株式会社 Image display device and image display method
CN104409066A (en) * 2014-12-10 2015-03-11 深圳市华星光电技术有限公司 Method for acquiring gray-scale compensation value of pixel
CN105244004A (en) * 2015-11-23 2016-01-13 深圳市华星光电技术有限公司 Control board and liquid crystal display with control board
CN106125367A (en) * 2016-08-26 2016-11-16 深圳市华星光电技术有限公司 A kind of method and device detecting Mura offset data exception
CN106228924A (en) * 2016-08-05 2016-12-14 武汉精测电子技术股份有限公司 Mottle compensating image signals generating means, method and color spot failures repair system
CN107221290A (en) * 2017-08-01 2017-09-29 芯颖科技有限公司 Mura compensation display method and device and computer readable storage medium

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI459367B (en) * 2012-06-06 2014-11-01 Innocom Tech Shenzhen Co Ltd Display and driving method thereof

Patent Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101017255A (en) * 2006-02-06 2007-08-15 Lg.菲利浦Lcd株式会社 Picture quality controling system
KR101232178B1 (en) * 2006-11-27 2013-02-13 엘지디스플레이 주식회사 Method and Apparatus for Compensating Display Defect of Flat Display
WO2013035635A1 (en) * 2011-09-07 2013-03-14 シャープ株式会社 Image display device and image display method
CN104409066A (en) * 2014-12-10 2015-03-11 深圳市华星光电技术有限公司 Method for acquiring gray-scale compensation value of pixel
CN105244004A (en) * 2015-11-23 2016-01-13 深圳市华星光电技术有限公司 Control board and liquid crystal display with control board
CN106228924A (en) * 2016-08-05 2016-12-14 武汉精测电子技术股份有限公司 Mottle compensating image signals generating means, method and color spot failures repair system
CN106125367A (en) * 2016-08-26 2016-11-16 深圳市华星光电技术有限公司 A kind of method and device detecting Mura offset data exception
CN107221290A (en) * 2017-08-01 2017-09-29 芯颖科技有限公司 Mura compensation display method and device and computer readable storage medium

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