CN107863970A - Deinterleaving method and de-interweaving method and equipment - Google Patents

Deinterleaving method and de-interweaving method and equipment Download PDF

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Publication number
CN107863970A
CN107863970A CN201610841993.4A CN201610841993A CN107863970A CN 107863970 A CN107863970 A CN 107863970A CN 201610841993 A CN201610841993 A CN 201610841993A CN 107863970 A CN107863970 A CN 107863970A
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China
Prior art keywords
bit
sequence
matrix
value
interleaved sequence
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CN201610841993.4A
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Chinese (zh)
Inventor
王桂杰
张公正
罗禾佳
李榕
张朝龙
乔云飞
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Huawei Technologies Co Ltd
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Huawei Technologies Co Ltd
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Priority to CN201610841993.4A priority Critical patent/CN107863970A/en
Priority to PCT/CN2017/097635 priority patent/WO2018054186A1/en
Publication of CN107863970A publication Critical patent/CN107863970A/en
Pending legal-status Critical Current

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    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/27Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00Arrangements for detecting or preventing errors in the information received
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00Arrangements for detecting or preventing errors in the information received
    • H04L1/004Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056Systems characterized by the type of code used
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00Arrangements for detecting or preventing errors in the information received
    • H04L1/004Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056Systems characterized by the type of code used
    • H04L1/0071Use of interleaving

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  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Physics & Mathematics (AREA)
  • Probability & Statistics with Applications (AREA)
  • Theoretical Computer Science (AREA)
  • Error Detection And Correction (AREA)
  • Detection And Prevention Of Errors In Transmission (AREA)

Abstract

This application discloses deinterleaving method and de-interweaving method and equipment.Methods described includes:Obtain and treat interleaved sequence comprising what k treated interleaving bits;Treat that interleaved sequence fills the matrix element position into interleaver matrix line by line by described, wherein, the interleaver matrix is the matrix of m rows n row;Bit corresponding to each matrix element position in the interleaver matrix is respectively put into sequence location corresponding with matrix element position in output sequence, so as to obtain the first interleaved sequence;Wherein, the output sequence includes n bit section, q-th of sequence location in the output sequence in p-th of bit section and q in the interleaver matrix1The matrix element position of row pth row is corresponding, q1It is corresponding with q bit backward value.Using method and device provided herein, without using constant series, it is possible to generate performance preferably interleaved sequence, thus unnecessary waste of storage space can be reduced.

Description

Deinterleaving method and de-interweaving method and equipment
Technical field
The application is related to wireless communication field, more particularly to deinterleaving method and de-interweaving method and equipment.
Background technology
Polarization code (Polar Code) is can uniquely to prove in theory when code length levels off to infinity so far, Performance can reach the encoding scheme of shannon limit.After being encoded using polarization code to data to be sent, radio communication Equipment needs to use interleaver to treat that interleaved sequence carries out sequence intertexture generation interleaved sequence to coding generation, and coded sequence is entered Row, which interweaves, to be generated interleaved sequence and then is transmitted again, can reduce the data dependence of encoded data sequence, prominent so as to reduce Influence of the error of transmission to decoding is sent out, improves the interference free performance of data transmission procedure.
In actual use, Wireless Telecom Equipment generally can treat interleaved sequence using random interleaving mode and be handed over Knit.It is interleaved due to treating interleaved sequence, it is necessary to use constant series.Therefore when Wireless Telecom Equipment is in off-line state When, treat that interleaved sequence is interleaved if to realize, it is necessary to prestore constant series.Because the length of constant series is with treating The length of interleaved sequence is corresponding, when wait interweave need sequence length it is longer when, the length of constant series accordingly also can be longer, from And more data storage resource can be consumed.
The content of the invention
This application provides deinterleaving method and de-interweaving method and equipment, with reduce treat when interleaved sequence is interleaved because For storage resource consumption caused by constant series need to be stored.
In a first aspect, this application provides a kind of deinterleaving method, this method includes:Obtain and treat interleaving bits comprising k Treat interleaved sequence;Treat that interleaved sequence fills the matrix element position into interleaver matrix line by line by described, wherein, the intertexture square Battle array is the matrix of m rows n row, m, n, and k value is positive integer, and k≤m × n;By each matrix element in the interleaver matrix Bit corresponding to plain position is respectively put into sequence location corresponding with matrix element position in output sequence, so as to obtain One interleaved sequence;Wherein, the output sequence includes n bit section, q-th in the output sequence in p-th of bit section Sequence location and q in the interleaver matrix1The matrix element position of row pth row is corresponding, q1It is relative with q bit backward value Should, p, q, q1It is positive integer, and 0≤q1≤ m-1,0≤q≤m-1,0≤p≤n-1.The deinterleaving method provided, without using Constant series, it is possible to generate performance preferably interleaved sequence, thus unnecessary waste of storage space can be reduced.
With reference in a first aspect, in first aspect in the first possible implementation, q1For q bit backward value.Using This implementation, it can very easily be determined and q-th of sequence location and q when m value is 2 a powers1Between row Corresponding relation.
With reference in a first aspect, in second of possible implementation of first aspect, will be each in the interleaver matrix Bit corresponding to individual matrix element position be respectively put into sequence location corresponding with matrix element position in output sequence it Before, in addition to:Calculate the bit backward value corresponding to each line number of the interleaver matrix;By the bit backward value with ascending order or Descending arranges to obtain backward value sequence, wherein, q1For q position number of the bit backward value in the backward sequence.
With reference to first aspect or the possible implementation any of which of the first to two kind of first aspect, in first aspect In the third possible implementation, obtain and treat that interleaved sequence includes comprising what k treated interleaving bits:Acquisition includes k1Individual bit Original series, wherein, k1< m × n;Filling bit is added in the precalculated position of the original series, so as to generate a length of k's Interleaved sequence is treated, wherein, k=m × n, the value of the filling bit is predetermined value.
With reference to first aspect or the possible implementation any of which of the first to two kind of first aspect, in first aspect In 4th kind of possible implementation, treat that interleaved sequence is filled the matrix element position into interleaver matrix and wrapped line by line by described Include:As k < m × n, treat that interleaved sequence fills the matrix element position into interleaver matrix line by line by described, and in the friendship Knit in the idle matrix element position in matrix and insert filling bit, wherein, the idle matrix element position refers to the friendship Knit in matrix not by the matrix element treated occupied by interleaving bits.
With reference to first aspect the 3rd or the 4th kind of possible implementation, in the 5th kind of possible implementation of first aspect In, methods described also includes:The filling bit in first interleaved sequence is removed, so as to obtain the second interleaved sequence.
Second aspect, present invention also provides a kind of de-interweaving method, this method includes:Acquisition includes k interleaving bits The first interleaved sequence, wherein, first interleaved sequence includes n bit section;By each intertexture in the interleaved sequence Bit is respectively put into matrix element position corresponding with each interleaving bits in interleaver matrix, and the interleaver matrix arranges for m rows n Matrix, m, n, k value is positive integer, and k≤m × n, wherein, in first interleaved sequence in p-th of bit section Q-th of sequence location and q in the interleaver matrix1The matrix element position of row pth row is corresponding, q1With q bit backward value It is corresponding, p, q, q1It is positive integer, and 0≤q1≤ m-1,0≤q≤m-1,0≤p≤n-1;Will be each in the interleaver matrix Individual bit forms de-interleaving sequences according to arrangement mode line by line.
With reference to second aspect, in second aspect in the first possible implementation, obtain and include the first of k interleaving bits Interleaved sequence includes:Acquisition includes k1Second interleaved sequence of individual bit, wherein, k1< m × n;In second interleaved sequence Precalculated position addition filling bit, so as to generate the first interleaved sequence for including k interleaving bits, wherein, k=m × n, institute The value for stating filling bit is predetermined value.
With reference to second aspect, in second of possible implementation of second aspect, as k < m × n, in the intertexture square Filling bit is inserted in idle matrix element position in battle array, wherein, the idle matrix element position refers to the intertexture square Not by the matrix element treated occupied by interleaving bits in battle array.
With reference to second aspect or the possible implementation any of which of the first to two kind of second aspect, in second aspect In the third possible implementation, q1For q bit backward value.
With reference to second aspect or the possible implementation any of which of the first to two kind of second aspect, in second aspect In 4th kind of possible implementation, by each interleaving bits in the interleaved sequence be respectively put into interleaver matrix with it is each Before the corresponding matrix element position of individual interleaving bits, in addition to:Calculate the ratio corresponding to each line number of the interleaver matrix Special backward value;The bit backward value is arranged with ascending order or descending to obtain backward value sequence, wherein, q1For q bit backward It is worth the position number in the backward sequence.
With reference to second aspect, in the 5th kind of possible implementation of second aspect, in addition to:Remove the deinterleaving bit In filling bit position.
The third aspect, present invention also provides a kind of Wireless Telecom Equipment, the Wireless Telecom Equipment can include being used for Perform the unit module module such as the receiving unit of method and step and processing unit in the various implementations of first aspect.
Fourth aspect, present invention also provides another Wireless Telecom Equipment, the Wireless Telecom Equipment can include using In performing the unit module module such as the receiving unit of method and step and processing unit in the various implementations of second aspect.
5th aspect, present invention also provides another communication equipment, including:Processor, memory and transceiver module;Institute The program stored in the memory or instruction can be performed by stating processor, each with first aspect and first aspect so as to realize Deinterleaving method described in kind implementation;Or realize second aspect and the deinterleaving described in the various implementations of second aspect Method.
6th aspect, present invention also provides a kind of storage medium, the computer-readable storage medium can have program stored therein, the journey Sequence can realize the part or all of step in each embodiment of deinterleaving method provided including the application when performing.The application also provides Another storage medium, the computer-readable storage medium can be had program stored therein, and the program can be realized when performing and carried including the application Part or all of step in each embodiment of de-interweaving method of confession.
Brief description of the drawings
In order to illustrate more clearly of the technical scheme of the application, letter will be made to the required accompanying drawing used in embodiment below Singly introduce, it should be apparent that, for those of ordinary skills, without having to pay creative labor, Other accompanying drawings can also be obtained according to these accompanying drawings.
Fig. 1 is the application deinterleaving method one embodiment schematic flow sheet;
Fig. 2 is one structural representation of the application interleaver matrix;
Fig. 3 is that the application treats one structural representation of interleaved sequence;
Fig. 4 is one structural representation of the application initiation sequence;
Fig. 5 is that the application treats another structural representation of interleaved sequence;
Fig. 6 is an effect diagram of the application encoder matrix filling;
Fig. 7 is another effect diagram of the application encoder matrix filling;
Fig. 8 is another effect diagram of the application encoder matrix filling;
Fig. 9 is a schematic diagram of the corresponding relation of the application bit backward value and position number;
Figure 10 is one structural representation of the first interleaved sequence of the application;
Figure 11 is another structural representation of the interleaved sequence of the application first;
Figure 12 is another structural representation of the interleaved sequence of the application first;
Figure 13 is one structural representation of the second interleaved sequence of the application;
Figure 14 is the application de-interweaving method one embodiment schematic flow sheet;
The structural representation of Figure 15 the application Wireless Telecom Equipment one embodiment;
The structural representation of another embodiment of Figure 16 the application Wireless Telecom Equipments;
Figure 17 is the application deinterleaving method and a schematic diagram of random interleaving performance comparison;
Figure 18 is the application deinterleaving method and another schematic diagram of random interleaving performance comparison;
Figure 19 is the application deinterleaving method and another schematic diagram of random interleaving performance comparison;
Figure 20 is the application deinterleaving method and another schematic diagram of random interleaving performance comparison.
Embodiment
Referring to Fig. 1, for the schematic flow sheet of the application deinterleaving method one embodiment, this method comprises the following steps:
Step 101, it is m that Wireless Telecom Equipment, which obtains line number amount, and number of columns is n interleaver matrix.
Wireless Telecom Equipment can obtain interleaver matrix first before interleaved sequence is generated, and the interleaver matrix can be with For the matrix of a m rows n row.Wherein, m and n value is positive integer.To meet that treating interleaved sequence is interleaved demand, m Needed with n product not less than the maximum length for treating interleaved sequence.
If as shown in Fig. 2 when the maximum length of interleaved sequence is 18 bit, the interleaver matrix can be one 6 The matrix that row 3 arranges, i.e., the value that described m value is 6, n is 3, so that the m and n product needs to be not less than 18, its In, the encoder matrix line number can be represented with 0 to 5 respectively, and the matrix column number can then be represented with 0 to 2 respectively;Or Interleaver matrix described in person can also be the matrix of 4 rows 5 row, i.e. the value that the value of the m is 4, n is 5, the coding Matrix line number can represent that the matrix column number can then be represented with 0 to 4 respectively with 0 to 3 respectively.
To simplify the processing procedure of sequence generation, m values can be 2 a powers, wherein, a value is positive integer.Example Such as, m value can be 4,6,8 etc..
The columns of the interleaver matrix can then be determined by treating the length of interleaved sequence.Under normal circumstances, n value can be with Determined by treating the length of interleaved sequence for k.It is for instance possible to use following manner one or mode two determine n value.
For example, n value can be determined with employing mode one, i.e. can set a positive integer h first;Such as h value Can be 3999;If k < 400, then n value can be 1;If 400≤k < h, then n value can beIf h≤k < 21000, then n value can beIf k > 21000, then n value can be
And for example, n value can be determined with employing mode two, i.e. if k < 400, then n value can be 1;If 300 < k≤10100, then n value can be 72;If 10100 < k≤16000, then n value can be 90;Such as Fruit k > 16000, then n value can be
Herein it should be noted that the Wireless Telecom Equipment can only obtain once the interleaver matrix, then every It is secondary into all using same interleaver matrix during interleaved sequence;The Wireless Telecom Equipment can be in generation interleaver matrix every time Before, the interleaver matrix is all obtained once, so as to all use different interleaver matrixs in generation interleaved sequence every time.
Step 102, obtain and treat interleaved sequence comprising what k treated interleaving bits.
Wireless Telecom Equipment can be obtained directly treats interleaved sequence comprising what k treated interleaving bits.Or can also be first Acquisition includes k1The original series of bit, k1< k;Then filling bit is added in the precalculated position of the original series, so as to raw Interleaved sequence is treated into treat interleaving bits comprising k.
For example, Wireless Telecom Equipment can directly obtain length as shown in Figure 3 treats interleaved sequence for 18 bits.Wherein, The each bit treated in interleaved sequence can represent with S0 to S17 respectively, described to treat taking for each bit in interleaved sequence Value can be with 0 or 1.
For another example, Wireless Telecom Equipment can also obtain the initiation sequence that length as shown in Figure 4 is 16 bits first;Then exist The initiation sequence afterbody adds 2 filling bits, and interleaved sequence is treated for 18 bits so as to obtain length as shown in Figure 5, its In, S16 and S17 are filling bit.Wherein, the value X1 and X2 of the filling bit can be predetermined value, for example, be 0 or It is 1.Filling bit is arranged to predetermined value, decoding device can be made directly to determine the bit value of filling bit in decoding For the predetermined value, without being decoded again using complicated decoding process to the filling bit, decoded so as to reduce Resource consumption caused by journey.
Herein it should be noted that to simplify the processing procedure of sequence generation, added when in the precalculated position of original series Filling bit generation when interleaving bits are when interleaved sequence, can make k=m × n comprising k.
Step 103, treat that interleaved sequence is filled to the interleaver matrix line by line by described.
The interleaver matrix and it is described treat that interleaved sequence is all determined after, Wireless Telecom Equipment can be waited to hand over by described Sequence is knitted to be packed into a manner of filling line by line in the interleaver matrix.So that described treat that each in interleaved sequence is waited to hand over It is all corresponding with a matrix element position in the interleaver matrix to knit bit.
It is described to treat that interleaved sequence be fully filled with the interleaver matrix as k=m × n.
For example, as shown in fig. 6, when treating that the length of interleaved sequence be 18 bits, and when the interleaver matrix is 6 rows 3 row, institute State and treat that interleaved sequence just can fill up the interleaver matrix.Wherein, S0 to S17 is respectively used to treat interleaved sequence described in instruction In each bit.
And as k < m × n, treat that interleaved sequence is filled into the interleaver matrix line by line by described, may be in the friendship Knit and some idle matrix element positions are produced in matrix, be not filled by treating any of interleaved sequence in the idle matrix element position Bit.It is that subsequent treatment brings inconvenience to avoid idle matrix element position, can be filled out in the idle matrix element position Enter filling bit.
For example, as shown in fig. 7, when treating that the length of interleaved sequence be 16 bits, and the interleaver matrix is when to be 6 rows 3 arrange, general It is described after interleaved sequence is filled into the interleaver matrix line by line, the 5th row the 1st in interleaver matrix row and the 5th row the 2nd It is classified as idle matrix element position.In the case, Wireless Telecom Equipment can be with each idle matrix element position filling one Individual filling bit.Interleaver matrix after filling can be such as Fig. 8.Wherein, T1 and T2 represents to represent two filling bits respectively.It is described Two filling bit values can represent X3 and X4, and X3 and X4 can also be predetermined value.
Step 104, the bit corresponding to each matrix element position in the interleaver matrix is respectively put into output sequence The sequence location corresponding with matrix element position in row, so as to obtain the first interleaved sequence.
In addition to predetermined encoder matrix, Wireless Telecom Equipment can also predefine the output sequence.Wherein, institute Stating output sequence can be made up of n equal bit section of bit length, and the length of each bit section can be m ratio It is special.
The interleaver matrix and it is described treat that interleaved sequence all determines to be determined after, Wireless Telecom Equipment can will described in Bit in interleaver matrix corresponding to each matrix element position, it is put into the output sequence and the matrix element position Corresponding sequence location, so as to obtain the first interleaved sequence.Wherein, the ratio in the interleaver matrix corresponding to matrix element position Spy can include treating interleaving bits, can also include filling bit.
Wherein, q-th of sequence location of p-th of bit section, with q in the interleaver matrix1The matrix of row pth row Element position uniquely corresponds to.Wherein, q1With q corresponding, the 0≤q of bit backward value1≤ m-1,0≤q≤m-1,0≤p≤n-1. Q under normal circumstances1It can be q bit backward value.The calculating process of bit backward is described briefly below:
If decimal number i expressions are expressed as (b with binary form1,b2,…,bc) when, then, i bit backward value Binary representation is (bc,bc-1,…,b1), wherein, c is bit length when i is expressed as binary form, according to taking for c The bit backward value for being worth different i also differs, wherein, c value can be determined by m value, under normal circumstances 2 c powers Value not less than m, when m value is 2 a powers, c value can be identical with a value.
For example, when c value is 3, line number 0 to 5 carries out bit backout and obtains the process of bit backward value respectively Can be as shown in table 1:
Table 1
Due to when m value is not 2 a powers.Q progress bit backward can be generated into q2, and in the interleaver matrix In q and may be not present2OK.For example, when m value is 6, the 0th row to the 5th row is only existed in the interleaver matrix.Such as Fruit q value is 3, then q bit backward value q2Value be 6.And in the interleaver matrix and it is not present the 6th row.
To avoid the occurrence of in interleaver matrix in the absence of the situation of row corresponding to q bit backward value.By the intertexture square Bit in battle array corresponding to each matrix element position is respectively put into sequence corresponding with matrix element position in output sequence Before column position, Wireless Telecom Equipment can calculate the bit backward value corresponding to each line number first;Then by the bit Backward value arranges to obtain backward value sequence with ascending order or descending.In the case, q1For q bit backward value in the backward sequence Position number in row.
For example, when the line number of the interleaver matrix is 0 to 5, corresponding bit backward value includes:0,4,2,6,1,5;Than The corresponding relation of special backward value and position number can be as shown in Figure 9.
After all bits in the interleaver matrix all are put into the output sequence more, it is possible to obtain the first friendship Knit sequence.Wireless Telecom Equipment can be encoded further to first interleaved sequence, so as to obtain sequence to be sent.
For example, when described when interleaved sequence is as shown in Figure 3, the first interleaved sequence can be as shown in Figure 10.Treated when described When interleaved sequence is as shown in Figure 4, the first interleaved sequence can be as shown in figure 11.When described when interleaved sequence is as shown in Figure 5, the One interleaved sequence can be as shown in figure 12.
The deinterleaving method provided using the present embodiment, without using constant series, it is possible to generate performance and preferably hand over Sequence is knitted, thus unnecessary waste of storage space can be reduced.
In another embodiment, can also include after step 104:Remove described in first interleaved sequence Filling bit, so as to obtain the second interleaved sequence.
Due to that in first interleaved sequence, some filling bits may be included, when filling bit is more, can be Coding and subsequent data transmission bring unnecessary resource overhead.For example, when the first interleaved sequence as seen in figures 11 or 12 when, First interleaved sequence in second interleaved sequence with including filling bit.Therefore it is generated in the first interleaved sequence Afterwards, Wireless Telecom Equipment can remove the filling bit in first interleaved sequence, so as to obtain the second interleaved sequence.Its In, filling bit that the Wireless Telecom Equipment removes can be the filling bit filled in original series or The filling bit filled in interleaver matrix.
For example, when first interleaved sequence is as shown in Figure 11 or 12, the filling in the interleaved sequence can be removed Bit, so as to obtain the second interleaved sequence as shown in fig. 13 that.
Using this implementation, the length of interleaved sequence can be reduced, disappeared so as to reduce resource caused by interleaving process Consumption.
In another embodiment of the application, after generating first interleaved sequence or second interleaved sequence, The Wireless Telecom Equipment first interleaved sequence or second interleaved sequence can also be carried out polarization code coding so as to Generate coded sequence;Then the coded sequence is sent to its equipment again.The technical scheme provided using the present embodiment, no But waste of storage space can be reduced, but also the transmission performance of coded sequence can be lifted.
Referring to Figure 14, for the schematic flow sheet of the application de-interweaving method one embodiment.The de-interweaving method can be right The interleaved sequence generated using foregoing sequences deinterleaving method is deinterleaved.As shown in figure 14, methods described can include:
Step 1401, the first interleaved sequence for including k interleaving bits is obtained.
Wireless Telecom Equipment can receive the first interleaved sequence for including k interleaving bits first.The first intertexture sequence Row include n bit section;Wherein, the structure of first interleaved sequence may refer to foregoing, just repeat no more herein.For example, The structure of first interleaved sequence can be as shown in Figure 10.
Wireless Telecom Equipment can also obtain comprising k first1Second interleaved sequence of individual bit, then handed over described second The precalculated position addition filling bit in sequence is knitted, so as to generate the first interleaved sequence for including k interleaving bits.Described second The structure of interleaved sequence may refer to foregoing, also repeat no more herein.Wherein, the precalculated position can be by Wireless Telecom Equipment Determined according to the interleaver matrix.For example, when the structure of second interleaved sequence can be as shown in figure 13, can generate such as The first interleaved sequence shown in Figure 12.
Step 1402, each interleaving bits in first interleaved sequence are respectively put into interleaver matrix and each friendship Knit the corresponding matrix element position of bit.
After the first interleaved sequence is determined, Wireless Telecom Equipment can be by each intertexture in first interleaved sequence Bit is respectively put into matrix element position corresponding with each interleaving bits in interleaver matrix.Wherein, the interleaver matrix is m The matrix of row n row, m, n, k value are positive integer, and k≤m × n, wherein, p-th of bit in first interleaved sequence Q-th of sequence location in section and q in the interleaver matrix1The matrix element position of row pth row is corresponding, q1With q bit Backward is worth corresponding, p, q, q1It is positive integer, and 0≤q1≤ m-1,0≤q≤m-1,0≤p≤n-1.The interleaver matrix Structure may refer to foregoing.For example, when first interleaved sequence is as shown in figure 11, it is described by first interleaved sequence Each interleaving bits are put into the effect after the interleaver matrix can be as shown in Figure 8.
Step 1403, each bit in the interleaver matrix is formed into de-interleaving sequences according to arrangement mode line by line.
In the matrix element position being all correspondingly placed into each bit in first interleaved sequence in the interleaver matrix Postpone, each bit in the interleaver matrix can be formed and deinterleave sequence by Wireless Telecom Equipment according to arrangement mode line by line Row.Wherein, the de-interleaving sequences can also include m bit section, q-th of bit section in the de-interleaving sequences by positioned at The interleaving bits of q rows are formed in the interleaver matrix, and in q-th of bit section, the interleaving bits are according to row sequence Number arrangement.If filling bit is not included in the de-interleaving sequences, then the de-interleaving sequences are the original series; If filling bit is included in the de-interleaving sequences, then it is as original to remove the sequence generated after the deinterleaving bit Sequence.
For example, when first interleaved sequence is as shown in Figure 10, then de-interleaving sequences are the original series;And When first interleaved sequence is as shown in figure 12, the de-interleaving sequences then can be as shown in Figure 5;Due in de-interleaving sequences Filling bit be present, therefore filling bit can be removed so as to obtain original series, the original series can be then schemed such as Fig. 4 institutes Show.
Referring to Figure 15, for the structural representation of the application Wireless Telecom Equipment one embodiment.What the present embodiment was provided Wireless Telecom Equipment can be used for performing the deinterleaving method provided in previous embodiment.
As shown in figure 15, the Wireless Telecom Equipment can include:Receiving unit 1501 and processing unit 1502;Except described Outside receiving unit 1501 and the processing unit 1502, described device can also include transmitting element 1503.
When the Wireless Telecom Equipment is used to generate interleaved sequence, receiving unit 1501, wait to hand over comprising k for obtaining That knits bit treats interleaved sequence;Processing unit 1502, for treating that interleaved sequence fills the square into interleaver matrix line by line by described Battle array element position, wherein, the interleaver matrix is the matrix of m rows n row, m, n, and k value is positive integer, and k≤m × n;Will Bit in the interleaver matrix corresponding to each matrix element position is respectively put into output sequence and matrix element position Corresponding sequence location, so as to obtain the first interleaved sequence;Wherein, the output sequence includes n bit section, the output Q-th of sequence location in sequence in p-th of bit section and q in the interleaver matrix1The matrix element position phase of row pth row It is corresponding, q1With q bit backward value corresponding, p, q, q1It is positive integer, and 0≤q1≤ m-1,0≤q≤m-1,0≤p≤n- 1。
Optionally, the processing unit 1502, the bit for being additionally operable to calculate corresponding to each line number of the interleaver matrix are inverse Sequence value;The bit backward value is arranged with ascending order or descending to obtain backward value sequence, wherein, q1Exist for q bit backward value Position number in the backward sequence.Or q1For q bit backward value.
Optionally, the receiving unit 1501, it is additionally operable to acquisition and includes k1The original series of individual bit, wherein, k1< m × n;Filling bit is added in the precalculated position of the original series, so as to which generate a length of k treats interleaved sequence, wherein, k=m × N, the value of the filling bit is predetermined value.
Optionally, the processing unit 1502, be additionally operable to as k < m × n, by it is described treat interleaved sequence fill line by line to Matrix element position in interleaver matrix, and filling bit is inserted in the idle matrix element position in the interleaver matrix, Wherein, the idle matrix element position refers in the interleaver matrix not by the matrix element treated occupied by interleaving bits Element.
Optionally, the processing unit 1502, it is additionally operable to remove the filling bit in first interleaved sequence, from And obtain the second interleaved sequence.
Optionally, the processing unit 1502, can be also used for entering first interleaved sequence or the second interleaved sequence Row coding, generates coded sequence.The transmitting element 1503, it can be also used for sending the coded sequence.
When the Wireless Telecom Equipment is used to deinterleave interleaved sequence, receiving unit 1501, for obtaining comprising k First interleaved sequence of interleaving bits, wherein, first interleaved sequence includes n bit section;Processing unit 1502, for inciting somebody to action Each interleaving bits in first interleaved sequence are respectively put into matrix corresponding with each interleaving bits in interleaver matrix Element position, the interleaver matrix are the matrix of m rows n row, m, n, and k value is positive integer, and k≤m × n, wherein, it is described Q-th of sequence location in first interleaved sequence in p-th of bit section and q in the interleaver matrix1The matrix element of row pth row Plain position is corresponding, q1With q bit backward value corresponding, p, q, q1It is positive integer, and 0≤q1≤ m-1,0≤q≤m-1,0 ≤p≤n-1;Each bit in the interleaver matrix is formed into de-interleaving sequences according to arrangement mode line by line.
Optionally, the receiving unit 1501, it is additionally operable to acquisition and includes k1Second interleaved sequence of individual bit, wherein, k1< m×n;The processing unit 1502, the precalculated position addition filling bit in second interleaved sequence is additionally operable to, so as to raw Into the first interleaved sequence for including k interleaving bits, wherein, k=m × n, the value of the filling bit is predetermined value.
Optionally, the processing unit 1502, it is additionally operable to as k < m × n, the idle matrix in the interleaver matrix Filling bit is inserted in element position, wherein, the idle matrix element position refers to not treated by described in the interleaver matrix Matrix element occupied by interleaving bits.
Optionally, the processing unit 1502, the bit for being additionally operable to calculate corresponding to each line number of the interleaver matrix are inverse Sequence value;The bit backward value is arranged with ascending order or descending to obtain backward value sequence, wherein, q1Exist for q bit backward value Position number in the backward sequence.Or q1For q bit backward value.
Optionally, the processing unit 1502, it is additionally operable to remove the filling bit position in the deinterleaving bit.
Referring to Figure 16, for the structural representation of another embodiment of the application Wireless Telecom Equipment.The present embodiment is provided Wireless Telecom Equipment can be used for perform previous embodiment provided in deinterleaving method.It is further to note that at this Apply in each embodiment, the Wireless Telecom Equipment can be that terminal device can also be the network equipment.
Wherein, the terminal device can refer to the equipment for providing a user voice and/or data connectivity, have wireless The portable equipment of linkage function, or it is connected to other processing equipments of radio modem.Terminal device can be through wireless Access network (radio access network, abbreviation RAN) is communicated with one or more core nets, and terminal device can be Mobile terminal, as mobile phone (or being " honeycomb " phone) and with mobile terminal computer, for example, it may be portable Formula, pocket, hand-held, built-in computer or vehicle-mounted mobile device, they exchange language and/or number with wireless access network According to.For example, PCS (personal communication service, abbreviation PCS) phone, wireless phone, meeting Talk about initiation protocol (session initiation protocol, abbreviation SIP) phone, WLL (wireless Local loop, abbreviation WLL) stand, the equipment such as personal digital assistant (personal digital assistant, abbreviation PDA). Terminal device is referred to as system, subscri er unit (subscriber unit, abbreviation SU), subscriber station (subscriber Station, abbreviation SS), movement station (mobile station, abbreviation MS), distant station (remote station, abbreviation RS), Access point (access point, abbreviation AP), remote equipment (remote terminal, abbreviation RT), access terminal (access Terminal, abbreviation AT), user terminal (user terminal, abbreviation UT), user agent (user agent, abbreviation UA), User equipment or subscriber's installation (user equipment, abbreviation UE).The network equipment can be base station, enhanced base station, Or the relaying with scheduling feature or equipment with base station functions etc..Wherein, base station can be evolved in LTE system Base station (evolved Node B, abbreviation eNB), base station that can also be in other systems, the embodiment of the present invention do not limit.
As shown in figure 16, the Wireless Telecom Equipment can include processor 1601, memory 1602 and transceiver module 1603, the transceiver module 1603 can include the parts such as receiver, emitter and antenna.The Wireless Telecom Equipment can be with Including more or less parts, some parts or different parts arrangement are either combined, the present invention is to this without limit It is fixed.
Processor 1601 is the control centre of Wireless Telecom Equipment, utilizes various interfaces and the whole radio communication of connection The various pieces of equipment, by running or performing the software program and/or module that are stored in memory 1602, and call and deposit The data in memory are stored up, to perform the various functions of Wireless Telecom Equipment and/or processing data.The processor 1601 can It to be made up of integrated circuit (integrated circuit, abbreviation IC), such as can be made up of the IC of single encapsulation, also may be used To be formed by connecting the encapsulation IC of more identical functions or difference in functionality.For example, processor can only include centre Manage device (central processing unit, abbreviation CPU) or GPU, digital signal processor (digital Signal processor, abbreviation DSP) and control chip (such as baseband chip) in transceiver module 1603 combination.At this Apply in embodiment, CPU can be single arithmetic core, can also include multioperation core.
The transceiver module 1603 is used to establish communication channel, makes Wireless Telecom Equipment by the communication channel to connect To receiving device, so as to realize the data transfer between Wireless Telecom Equipment.The transceiver module 1603 can include wireless office Domain net (wireless local area network, abbreviation WLAN) module, bluetooth module, base band (base band) module etc. Communication module, and radio frequency corresponding to the communication module (radio frequency, abbreviation RF) circuit, it is wireless for carrying out Local area network communication, Bluetooth communication, infrared communication and/or cellular communications system communication, such as wideband code division multiple access (wideband code division multiple access, abbreviation WCDMA) and/or high-speed downstream packet access (high Speed downlink packet access, abbreviation HSDPA).The transceiver module 1603 is used to control Wireless Telecom Equipment In each component communication, and direct memory access (direct memory access) can be supported.
In the different embodiments of the application, the various transceiver modules 1603 in the transceiver module 1603 are typically with collection Form into circuit chip (integrated circuit chip) occurs, and the property of can be chosen combines, without including institute There are transceiver module 1603 and corresponding antenna sets.For example, the transceiver module 1603 can only include baseband chip, radio frequency chip And corresponding antenna in a cellular communication system to provide communication function.The nothing established via the transceiver module 1603 Line communicates to connect, such as WLAN access or WCDMA accesses, the Wireless Telecom Equipment can be connected to Cellular Networks (cellular network) or internet (Internet).In some optional embodiments of the application, the transmitting-receiving mould Communication module in block 1603, such as baseband module are desirably integrated into processor, typical such as high pass (Qualcomm) company The APQ+MDM series platforms of offer.Radio circuit is used to signal is received and sent in information transmit-receive or communication process.For example, will After the downlink information of Wireless Telecom Equipment receives, processor processing is given;In addition, it is sent to radio communication by up data are designed Equipment.Generally, the radio circuit includes being used for performing the known circuits of these functions, including but not limited to antenna system, penetrate Frequency transceiver, one or more amplifiers, tuner, one or more oscillators, digital signal processor, encoding and decoding (codec) chipset, subscriber identity module (SIM) card, memory etc..In addition, radio circuit can also pass through radio communication Communicated with network and other equipment.The radio communication can use any communication standard or agreement, include but is not limited to the whole world Mobile communcations system (global system of mobile communication, abbreviation GSM), general packet radio service (general packet radio service, abbreviation gprs), CDMA (code division multiple Access, abbreviation CDMA), WCDMA (wideband code division multiple access, referred to as WCDMA), high speed uplink downlink packet access technology (high speed uplink packet access, abbreviation HSUPA), Long Term Evolution (long term evolution, abbreviation LTE), Email, Short Message Service (short messaging Service, abbreviation SMS) etc..
The processor 1601, the provided deinterleaving method of foregoing implementation can be performed so as to generate the first intertexture sequence Row or the second interleaved sequence;It is wherein, described to treat that interleaved sequence be obtained by the processor 1601 from the memory 1602, Or it can also be obtained by the processor 1601 by the transceiver module 1603 from other equipment.The processor 1601 is also It can be used for carrying out polarization code coding to first interleaved sequence or second interleaved sequence, so as to generate coded sequence; The transceiver module 1603, it can be also used for sending the coded sequence.
Herein it should be noted that the receiving unit 1601 shown in Figure 16 can be by the transceiver module shown in Figure 16 1603 realize or control the transceiver module 1603 to realize by the processor 1601;Processing unit 1602 shown in Figure 16; It can be realized by the processor 1601 shown in Figure 16;Shown transmitting element in Figure 16 can also be by the receipts shown in Figure 16 Hair module 1603 is realized or controls the transceiver module 1603 to realize by the processor 1601.
In the specific implementation, the present invention also provides a kind of computer-readable storage medium, wherein, the computer-readable storage medium can store There is program, the program may include the part or complete in each embodiment of deinterleaving method or de-interweaving method provided by the invention when performing Portion's step.Described storage medium can be magnetic disc, CD, read-only memory (read-only memory, abbreviation ROM) or Random access memory (random access memory, abbreviation RAM) etc..
Herein it should be noted that sequence is interleaved and deinterleaved using technical scheme provided herein, with Random interleaving is compared, and can not only save data storage resource, but also can lift the performance of polarization code.
Can be as shown in Figure 17 to Figure 20 using the performance comparison of deinterleaving method and random interleaving provided herein. For Figure 17 into Figure 20, abscissa is symbol noise ratio (Es/No), and unit is decibel (dB);Ordinate is Block Error Rate;R represents code Rate;Wherein, R values can be 1/5,1/3,2/5,1/2,2/3,3/4,5/6,8/9, i.e., span shown in figure 0.2, 0.33333,0.4,0.5,0.66667,0.75,0.83333,0.88889 }.Under different code checks, random interleaving and fixed friendship The performance knitted can as shown in curve in figure, wherein, it is fixed shown in figure that to interweave be described intertexture in previous embodiment Method.
When n value is using a determination by the way of in previous embodiment, if k value is 400, i.e., believe shown in figure Cease bit length 400, then under each different code checks, the performance comparison of polarization code can be as shown in figure 17;If k value is 8000, i.e., information bit length 8000 shown in figure, then under each different code checks, the performance comparison of polarization code can be such as Figure 18 It is shown.
When n value is using two determination by the way of in previous embodiment, if k value is 400, i.e., believe shown in figure Cease bit length 400, then under each different code checks, the performance comparison of polarization code can be as shown in figure 19;If k value is 4000, i.e., information bit length 4000 shown in figure, then under each different code checks, the performance comparison of polarization code can be such as Figure 20 It is shown.
It is required that those skilled in the art can be understood that the technology in the embodiment of the present invention can add by software The mode of general hardware platform realize.Based on such understanding, the technical scheme in the embodiment of the present invention substantially or Say that the part to be contributed to prior art can be embodied in the form of software product, the computer software product can be deposited Storage is in storage medium, such as ROM/RAM, magnetic disc, CD, including some instructions are causing a computer equipment (can be with Be personal computer, server, either network equipment etc.) perform some part institutes of each embodiment of the present invention or embodiment The method stated.
In this specification between each embodiment identical similar part mutually referring to.Especially for device and nothing For line communications device embodiments, because it is substantially similar to embodiment of the method, so description is fairly simple, related part is joined The explanation seen in embodiment of the method.
Invention described above embodiment is not intended to limit the scope of the present invention..

Claims (24)

  1. A kind of 1. deinterleaving method, it is characterised in that including:
    Obtain and treat interleaved sequence comprising what k treated interleaving bits;
    Treat that interleaved sequence fills the matrix element position into interleaver matrix line by line by described, wherein, the interleaver matrix is m rows The matrix of n row, m, n, k value are positive integer, and k≤m × n;
    Bit corresponding to each matrix element position in the interleaver matrix is respectively put into output sequence and matrix element The corresponding sequence location in plain position, so as to obtain the first interleaved sequence;
    Wherein, the output sequence includes n bit section, q-th of sequence location in the output sequence in p-th of bit section With q in the interleaver matrix1The matrix element position of row pth row is corresponding, q1With q bit backward value corresponding, p, q, q1 It is positive integer, and 0≤q1≤ m-1,0≤q≤m-1,0≤p≤n-1.
  2. 2. the method as described in claim 1, it is characterised in that q1For q bit backward value.
  3. 3. the method as described in claim 1, it is characterised in that by each matrix element position institute in the interleaver matrix Corresponding bit is respectively put into before sequence location corresponding with matrix element position in output sequence, in addition to:
    Calculate the bit backward value corresponding to each line number of the interleaver matrix;
    The bit backward value is arranged with ascending order or descending to obtain backward value sequence, wherein, q1For q bit backward value in institute State the position number in backward sequence.
  4. 4. the method as described in any one of claims 1 to 3, it is characterised in that obtain and to treat that interleaving bits are waited to interweave comprising k Sequence includes:
    Acquisition includes k1The original series of individual bit, wherein, k1< m × n;
    Filling bit is added in the precalculated position of the original series, so as to which generate a length of k treats interleaved sequence, wherein, k=m × n, the value of the filling bit is predetermined value.
  5. 5. the method as described in any one of claims 1 to 3, it is characterised in that treat that interleaved sequence fills best friend line by line by described The matrix element position knitted in matrix includes:
    As k < m × n, treat that interleaved sequence fills the matrix element position into interleaver matrix line by line by described, and in the friendship Knit in the idle matrix element position in matrix and insert filling bit, wherein, the idle matrix element position refers to the friendship Knit in matrix not by the matrix element treated occupied by interleaving bits.
  6. 6. the method as described in claim 4 or 5, it is characterised in that methods described also includes:
    The filling bit in first interleaved sequence is removed, so as to obtain the second interleaved sequence.
  7. A kind of 7. de-interweaving method, it is characterised in that including:
    The first interleaved sequence for including k interleaving bits is obtained, wherein, first interleaved sequence includes n bit section;
    Each interleaving bits in the interleaved sequence are respectively put into square corresponding with each interleaving bits in interleaver matrix Battle array element position, the interleaver matrix are the matrix of m rows n row, m, n, and k value is positive integer, and k≤m × n, wherein, institute State q-th of sequence location in the first interleaved sequence in p-th of bit section and q in the interleaver matrix1The matrix of row pth row Element position is corresponding, q1With q bit backward value corresponding, p, q, q1It is positive integer, and 0≤q1≤ m-1,0≤q≤m- 1,0≤p≤n-1;
    Each bit in the interleaver matrix is formed into de-interleaving sequences according to arrangement mode line by line.
  8. 8. method as claimed in claim 7, it is characterised in that obtaining the first interleaved sequence comprising k interleaving bits includes:
    Acquisition includes k1Second interleaved sequence of individual bit, wherein, k1< m × n;
    Precalculated position addition filling bit in second interleaved sequence, so as to generate include k interleaving bits first Interleaved sequence, wherein, k=m × n, the value of the filling bit is predetermined value.
  9. 9. method as claimed in claim 7, it is characterised in that also include:
    As k < m × n, filling bit is inserted in the idle matrix element position in the interleaver matrix, wherein, the sky Not busy matrix element position refers in the interleaver matrix not by the matrix element treated occupied by interleaving bits.
  10. 10. the method as described in any one of claim 7 to 9, it is characterised in that q1For q bit backward value.
  11. 11. the method as described in any one of claim 7 to 9, it is characterised in that by each intertexture in the interleaved sequence Bit is respectively put into before matrix element position corresponding with each interleaving bits in interleaver matrix, in addition to:
    Calculate the bit backward value corresponding to each line number of the interleaver matrix;
    The bit backward value is arranged with ascending order or descending to obtain backward value sequence, wherein, q1For q bit backward value in institute State the position number in backward sequence.
  12. 12. method as claimed in claim 7, it is characterised in that also include:
    Remove the filling bit position in the deinterleaving bit.
  13. A kind of 13. Wireless Telecom Equipment, it is characterised in that including:
    Receiving unit, interleaved sequence is treated comprising what k treated interleaving bits for obtaining;
    Processing unit, for treating that interleaved sequence fills the matrix element position into interleaver matrix line by line by described, wherein, it is described Interleaver matrix is the matrix of m rows n row, m, n, and k value is positive integer, and k≤m × n;By each in the interleaver matrix Bit corresponding to matrix element position is respectively put into sequence location corresponding with matrix element position in output sequence, so as to Obtain the first interleaved sequence;Wherein, the output sequence includes n bit section, in the output sequence in p-th of bit section Q-th of sequence location and q in the interleaver matrix1The matrix element position of row pth row is corresponding, q1With q bit backward value It is corresponding, p, q, q1It is positive integer, and 0≤q1≤ m-1,0≤q≤m-1,0≤p≤n-1.
  14. 14. equipment as claimed in claim 13, it is characterised in that q1For q bit backward value.
  15. 15. equipment as claimed in claim 13, it is characterised in that
    The processing unit, it is additionally operable to calculate the bit backward value corresponding to each line number of the interleaver matrix;By the bit Backward value arranges to obtain backward value sequence with ascending order or descending, wherein, q1For q bit backward value in the backward sequence Position number.
  16. 16. the equipment as described in any one of claim 13 to 15, it is characterised in that
    The receiving unit, it is additionally operable to acquisition and includes k1The original series of individual bit, wherein, k1< m × n;In the original series Precalculated position addition filling bit, so as to which generate a length of k treats interleaved sequence, wherein, k=m × n, the filling bit It is worth for predetermined value.
  17. 17. the equipment as described in any one of claim 13 to 15, it is characterised in that
    The processing unit, is additionally operable to as k < m × n, treats that interleaved sequence fills the matrix into interleaver matrix line by line by described Element position, and filling bit is inserted in the idle matrix element position in the interleaver matrix, wherein, the idle matrix Element position refers in the interleaver matrix not by the matrix element treated occupied by interleaving bits.
  18. 18. the equipment as described in claim 16 or 17, it is characterised in that
    The processing unit, it is additionally operable to remove the filling bit in first interleaved sequence, so as to obtain the second intertexture Sequence.
  19. A kind of 19. Wireless Telecom Equipment, it is characterised in that including:
    Receiving unit, the first interleaved sequence of k interleaving bits is included for obtaining, wherein, first interleaved sequence includes n Individual bit section;
    Processing unit, for each interleaving bits in first interleaved sequence to be respectively put into interleaver matrix and each friendship The corresponding matrix element position of bit is knitted, the interleaver matrix is the matrix of m rows n row, and m, n, k value is positive integer, And k≤m × n, wherein, in q-th of the sequence location and the interleaver matrix in first interleaved sequence in p-th of bit section Q1The matrix element position of row pth row is corresponding, q1With q bit backward value corresponding, p, q, q1It is positive integer, and 0≤ q1≤ m-1,0≤q≤m-1,0≤p≤n-1;Each bit in the interleaver matrix is formed according to arrangement mode line by line and solved Interleaved sequence.
  20. 20. equipment as claimed in claim 19, it is characterised in that
    The receiving unit, it is additionally operable to acquisition and includes k1Second interleaved sequence of individual bit, wherein, k1< m × n;
    The processing unit, the precalculated position addition filling bit in second interleaved sequence is additionally operable to, so as to generate bag The first interleaved sequence containing k interleaving bits, wherein, k=m × n, the value of the filling bit is predetermined value.
  21. 21. equipment as claimed in claim 19, it is characterised in that
    The processing unit, it is additionally operable to, as k < m × n, insert and fill out in the idle matrix element position in the interleaver matrix Bit is filled, wherein, the idle matrix element position refers to not treated occupied by interleaving bits by described in the interleaver matrix Matrix element.
  22. 22. the equipment as described in any one of claim 19 to 21, it is characterised in that q1For q bit backward value.
  23. 23. the equipment as described in any one of claim 19 to 21, it is characterised in that the processing unit, be additionally operable to calculate institute State the bit backward value corresponding to each line number of interleaver matrix;The bit backward value is arranged to obtain backward with ascending order or descending Value sequence, wherein, q1For q position number of the bit backward value in the backward sequence.
  24. 24. equipment as claimed in claim 19, it is characterised in that
    The processing unit, it is additionally operable to remove the filling bit position in the deinterleaving bit.
CN201610841993.4A 2016-09-22 2016-09-22 Deinterleaving method and de-interweaving method and equipment Pending CN107863970A (en)

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Application publication date: 20180330