CN107846232A - TDD switches, driving and the charging integrated receiving front-end module of low noise and preparation method thereof - Google Patents
TDD switches, driving and the charging integrated receiving front-end module of low noise and preparation method thereof Download PDFInfo
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- 238000002360 preparation method Methods 0.000 title claims abstract description 8
- 239000000758 substrate Substances 0.000 claims abstract description 45
- 229910017083 AlN Inorganic materials 0.000 claims abstract description 29
- PIGFYZPCRLYGLF-UHFFFAOYSA-N Aluminum nitride Chemical compound [Al]#N PIGFYZPCRLYGLF-UHFFFAOYSA-N 0.000 claims abstract description 29
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 27
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 27
- 239000010703 silicon Substances 0.000 claims abstract description 27
- 229910001218 Gallium arsenide Inorganic materials 0.000 claims abstract description 26
- 238000004806 packaging method and process Methods 0.000 claims abstract description 16
- 229910052751 metal Inorganic materials 0.000 claims abstract description 15
- 239000002184 metal Substances 0.000 claims abstract description 15
- 230000005540 biological transmission Effects 0.000 claims abstract description 6
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 claims description 6
- 229910052709 silver Inorganic materials 0.000 claims description 6
- 239000004332 silver Substances 0.000 claims description 6
- 238000013461 design Methods 0.000 claims description 3
- 239000004411 aluminium Substances 0.000 claims description 2
- 229910052782 aluminium Inorganic materials 0.000 claims description 2
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 2
- 238000012545 processing Methods 0.000 abstract description 2
- 238000010586 diagram Methods 0.000 description 8
- 238000005516 engineering process Methods 0.000 description 4
- 238000010295 mobile communication Methods 0.000 description 3
- 230000035945 sensitivity Effects 0.000 description 2
- 230000003321 amplification Effects 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 238000004891 communication Methods 0.000 description 1
- PMHQVHHXPFUNSP-UHFFFAOYSA-M copper(1+);methylsulfanylmethane;bromide Chemical compound Br[Cu].CSC PMHQVHHXPFUNSP-UHFFFAOYSA-M 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000005611 electricity Effects 0.000 description 1
- 238000003780 insertion Methods 0.000 description 1
- 230000037431 insertion Effects 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 238000003199 nucleic acid amplification method Methods 0.000 description 1
- 238000007747 plating Methods 0.000 description 1
- 238000003672 processing method Methods 0.000 description 1
- 230000000630 rising effect Effects 0.000 description 1
- 239000002002 slurry Substances 0.000 description 1
Classifications
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
- H04B1/06—Receivers
- H04B1/16—Circuits
- H04B1/163—Special arrangements for the reduction of the damping of resonant circuits of receivers
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
- H01L23/367—Cooling facilitated by shape of device
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/16—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits
- H01L25/162—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits the devices being mounted on two or more different substrates
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/50—Multistep manufacturing processes of assemblies consisting of devices, each device being of a type provided for in group H01L27/00 or H01L29/00
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
- H04B1/06—Receivers
- H04B1/10—Means associated with receiver for limiting or suppressing noise or interference
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/0555—Shape
- H01L2224/05552—Shape in top view
- H01L2224/05554—Shape in top view being square
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/06—Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
- H01L2224/0601—Structure
- H01L2224/0603—Bonding areas having different sizes, e.g. different heights or widths
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48257—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a die pad of the item
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4911—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain
- H01L2224/49111—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain the connectors connecting two common bonding areas, e.g. Litz or braid wires
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4911—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain
- H01L2224/49113—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain the connectors connecting different bonding areas on the semiconductor or solid-state body to a common bonding area outside the body, e.g. converging wires
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- Engineering & Computer Science (AREA)
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- Power Engineering (AREA)
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- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Signal Processing (AREA)
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Abstract
The present invention is TDD switches, driving and the charging integrated receiving front-end module of low noise and preparation method thereof, including standard packaging lead frame, aluminium nitride substrate, three PIN diode chips, GaAs LNA chip and silicon driving chip, wherein aluminium nitride substrate, GaAs LNA chip, silicon driving chip is bonded on standard packaging lead frame central metal substrate, three PIN diode die bondings are on aluminium nitride substrate, first PIN diode is as transmission channel, second PIN diode and the 3rd PIN diode form tandem tap circuit as switch element and are used as receiving branch, the highly integrated GaAs LNA chip of cascade one forms whole receiving channel after receiving branch, the switching of on-off circuit is realized by silicon driving chip.Advantage:1)Integrated degree is high, and versatility is good, safe and reliable;2)Multi-chip assembles and the direct bond processing of bare chip, reduces thermal resistance, lifts reliability, reduces use cost.
Description
Technical field
The present invention relates to a kind of TDD switches, driving and charging integrated receiving front-end module of low noise and preparation method thereof,
Belong to mobile communication technology field.
Background technology
TD-SCDMA the and WIMAX systems and TD-LTE systems of 3G (Third Generation) Moblie and new generation broadband mobile communication
System uses tdd mode, in the base station system, transmission channel power amplifier(PA)To antenna(ANT)With receiving channel to antenna(ANT)
Between by a high power switch(SW)To control transmitting-receiving to switch;The low-noise amplifier of receiving channel amplifies antenna and received from aerial
The small-signal arrived, its noise is non-linear, and the performance such as matching is most important to whole receiver.
Present mobile communication technology requires that radio-frequency devices, module develop to high selectivity, low cost and the direction minimized.
The development of third generation forth generation GSM, traffic rate greatly improve, to radio-frequency devices, module in high-power and high collection
Higher requirement is proposed on Cheng Du.
The content of the invention
The present invention is a kind of TDD switch, driving and the charging integrated receiving front-end module of low noise and preparation method thereof, its purpose
It is intended to reduce the noise coefficient of TDD system base station receiving channel, improves integrated level and the sensitivity of receiving front-end, significantly reduce electricity
Road surface is accumulated, and reduces cost, optimizes performance.
The technical solution of the present invention:
TDD switches, driving and the charging integrated receiving front-end module of low noise, including QFN5 × 5-32L standard packagings lead frame, nitridation
Aluminium base, three PIN diode chips, GaAs LNA chip and silicon driving chip, aluminium nitride substrate, GaAs LNA
Chip, silicon driving chip are bonded on QFN5 × 5-32L standard packaging lead frame central metal substrates, three PIN diode cores
Piece is bonded on aluminium nitride substrate, and the first PIN diode is made as transmission channel, the second PIN diode and the 3rd PIN diode
Tandem tap circuit is formed as receiving branch for switch element, the highly integrated GaAs LNA core of cascade one after receiving branch
Piece forms whole receiving channel, and the switching of on-off circuit is realized by silicon driving chip.
The preparation method of TDD switches, driving and the charging integrated receiving front-end module of low noise, comprises the following steps:
1)Aluminium nitride substrate, GaAs LNA core are bonded on QFN5 × 5-32L standard packaging lead frame central metal substrates
Piece and silicon driving chip;
2)Three PIN diode chips are bonded on aluminium nitride substrate;
3)Aluminium nitride substrate, three PIN diode chips, GaAs LNA chip, silicon driving chip and QFN5 × 5-32L are marked
Quasi- package leadframe is corresponded to and connected between pin and central metal substrate with gold wire bonding.
Beneficial effects of the present invention:
1)Switch, driving and low noise integration, integrated level is higher, and product versatility is good, and flexibility is strong, safe and reliable;
2)Meet TD-SCDMA, WIMAX and the high-power switching control of TD-LTE system base station power amplification requirement, receiving channel it is low
Noise coefficient and gain requirement, there is higher sensitivity and integrated level, cost is low, and performance is excellent;
3)Multi-chip assembles(MCM)Technology, the direct bond processing method of bare chip, the thermal resistance between chip and substrate is reduced, is carried
The reliability and product electrical property of rising mould block, reduce the use cost of module.
Brief description of the drawings
Fig. 1 is the circuit structure and die bonding, wire bonding schematic diagram of the present invention.
Fig. 2 is aluminium nitride substrate schematic diagram.
Fig. 3 is silicon driving chip schematic diagram.
Fig. 4 is LNA chip schematic diagram.
Fig. 5 is the application schematic diagram of the present invention.
In figure, A is aluminium nitride substrate A, and B, C, D are three PIN diode chips, and E is silicon driving chip, and F is GaAs
LNA chip.
Embodiment
TDD switches, driving and the charging integrated receiving front-end module of low noise, including QFN5 × 5-32L standard packagings lead frame,
Aluminium nitride substrate, three PIN diode chips, GaAs LNA chip and silicon driving chip, aluminium nitride substrate, GaAs are low
Make an uproar put chip, silicon driving chip is bonded on QFN5 × 5-32L standard packaging lead frame central metal substrates, three poles of PIN bis-
Die is bonded on aluminium nitride substrate, and the first PIN diode is as transmission channel, the second PIN diode and the poles of the 3rd PIN bis-
Pipe forms tandem tap circuit as receiving branch as switch element, the highly integrated GaAs low noise of cascade one after receiving branch
Put chip and form whole receiving channel, the switching of on-off circuit is realized by silicon driving chip.
First PIN diode is reversely pressure-resistant to be more than 300V, and junction capacity is less than 0.2P, and series resistance is less than 0.5 ohm,
Thermal resistance is less than 15 degree/watt, and second PIN diode and the 3rd PIN diode are reversely pressure-resistant to be more than 200V, and junction capacity is less than
0.05P, series resistance are less than 0.5 ohm.
Between the PIN diode chip, GaAs LNA chip, silicon driving chip and chip and QFN5 × 5-32L
Standard packaging lead frame is connected between corresponding to pin with gold wire bonding.
The aluminium nitride substrate, GaAs LNA chip, silicon driving chip thermal conductivity factor>10W/MK high heat conduction silver
Slurry is bonded on QFN5 × 5-32L standard packaging lead frame central metal substrates, PIN diode chip thermal conductivity factor>10W/
MK high heat conduction silver paste is bonded on aluminium nitride substrate.
The PIN diode chip is high power switch PIN diode chip.
The preparation method of TDD switches, driving and the charging integrated receiving front-end module of low noise, comprises the following steps:
1)Aluminium nitride substrate, GaAs LNA core are bonded on QFN5 × 5-32L standard packaging lead frame central metal substrates
Piece and silicon driving chip;
2)Three PIN diode chips are bonded on aluminium nitride substrate;
3)Aluminium nitride substrate, three PIN diode chips, GaAs LNA chip, silicon driving chip and QFN5 × 5-32L are marked
Quasi- package leadframe is corresponded to and connected between pin and central metal substrate with gold wire bonding.
Technical scheme is described in further detail below in conjunction with the accompanying drawings:
Contrast accompanying drawing 1, the structure of switch, driving and the charging integrated receiving front-end of low noise, using high heat conduction silver paste aluminum-nitride-based
Plate A, GaAs LNA chip F, and silicon driving chip E are bonded in the center in QFN5 × 5-32L standard packaging lead frames
In metal substrate.By aluminium nitride substrate A, three PIN diodes chip B, C, D, GaAs LNA chip F, silicon driving chip E
Connected between corresponding with QFN5 × 5-32L standard packaging lead frames pin and central metal substrate with gold wire bonding.Above-mentioned technique is complete
Cheng Hou, device is encapsulated, tested.
Contrast accompanying drawing 2, using high heat conduction silver paste high-power PIN diode chip B and middle power diode chip C with
D is bonded on aluminium nitride substrate.
Accompanying drawing 3,4 is contrasted, is the schematic diagram of silicon driving chip and LNA chip.
Accompanying drawing 5 is contrasted, is the application signal of TDD switches, driving and the charging integrated receiving front-end of low noise in a communications system
Figure.
Embodiment 1
From the thick aluminium nitride substrates of 0.15mm, pcb board electric circuit diagram design, surface gold-plating are carried out according to Fig. 2 circuit diagram.
High-power PIN diode chip B mainly considers from the following aspect:Reversely pressure-resistant to be more than 300V, junction capacity is less than 0.2P, series connection
Resistance is less than 0.5 ohm, and thermal resistance is less than 15 degree/watt, and PIN diode chip is selected according to these requirements.Two other pole of PIN bis-
Die C and D are mainly more than 200V from reversely pressure-resistant, and junction capacity is less than 0.05P, and series resistance is less than 0.5 ohm, according to these
It is required that selection PIN diode chip.
The effect of GaAs the low noise amplifier chip is that reception signal is amplified, and forms receiving channel, meets to connect
Receive the noise coefficient and gain requirement of passage.
As shown in Figure 5:During emission state, power amplifier 1 is worked, and power is exported by power amplifier, is switched, is driven and low noise by TDD
Charging integrated receiving front-end 2 is switched to antenna 3;During reception state, signal is inputted by antenna 3, is switched, is driven and low by TDD
Charging integrated receiving front-end 2 of making an uproar is switched to reception processing unit 4.Passage switching control and matching by control and match circuit 5
Realize.
Under normal temperature, the receiving front-end that TDD is switched, driving and low noise are charging integrated refers mainly to indicate in TD-LTE:
1. receiving channel:Noise coefficient representative value is 1.5 dB, and gain representative value is 30dB;
2. transmission channel:Power capacity is 120W, and insertion loss representative value is 0.3dB.
Claims (4)
1.TDD switches, driving and the charging integrated receiving front-end module of low noise, it is characterised in that sealed including QFN5 × 5-32L standards
Fill lead frame, aluminium nitride substrate, three PIN diode chips, GaAs LNA chip and silicon driving chip;Wherein, nitrogenize
Aluminium base, GaAs LNA chip, silicon driving chip are bonded in QFN5 × 5-32L standard packaging lead frame central metal substrates
On, three PIN diode die bondings are on aluminium nitride substrate, and the first PIN diode is as transmission channel, the poles of the 2nd PIN bis-
Pipe and the 3rd PIN diode as switch element composition tandem tap circuit as receiving branch, cascade one after the receiving branch
Individual highly integrated GaAs LNA chip forms whole receiving channel, and the switching of tandem tap circuit is realized by silicon driving chip;
Aluminium nitride substrate, three PIN diode chips, GaAs LNA chip, silicon driving chip and QFN5 × 5-32L standard packagings
Lead frame is corresponded to and connected between pin and central metal substrate with gold wire bonding.
2. TDD switches, driving and the charging integrated receiving front-end module of low noise according to claim 1, it is characterised in that institute
State that the first PIN diode is reversely pressure-resistant to be more than 300V, junction capacity is less than 0.2P, and series resistance is less than 0.5 ohm, and thermal resistance is less than 15
Degree/watt, second PIN diode and the 3rd PIN diode are reversely pressure-resistant to be more than 200V, and junction capacity is less than 0.05P, series electrical
Resistance is less than 0.5 ohm.
3. TDD switches, driving and the charging integrated receiving front-end module of low noise according to claim 1, it is characterised in that institute
State aluminium nitride substrate, GaAs LNA chip, silicon driving chip thermal conductivity factor>10W/MK high heat conduction silver paste is bonded in
On QFN5 × 5-32L standard packaging lead frame central metal substrates, PIN diode chip thermal conductivity factor>10W/MK height is led
Hot silver paste is bonded on aluminium nitride substrate.
4. the preparation method of TDD switches as claimed in claim 1, driving and the charging integrated receiving front-end module of low noise, it is special
Sign is to comprise the following steps:
1)Needed on QFN5 × 5-32L standard packaging lead frame central metal substrates by design in defined position bonding aluminium nitride
Substrate, GaAs LNA chip and silicon driving chip
2)Needed on aluminium nitride substrate by design in defined position three PIN diode chips of bonding;
3)Aluminium nitride substrate, three PIN diode chips, GaAs LNA chip, silicon driving chip and QFN5 × 5-32L are marked
Quasi- package leadframe is corresponded to and connected between pin and central metal substrate with gold wire bonding.
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US20100090917A1 (en) * | 2007-05-08 | 2010-04-15 | Christoph Roeckl | Electrical Component with a Front-End Circuit |
CN101714884A (en) * | 2009-10-21 | 2010-05-26 | 中国电子科技集团公司第五十五研究所 | Receiving front-end module of super power and ultra-low noise radio frequency and preparation method thereof |
CN103607211A (en) * | 2013-11-04 | 2014-02-26 | 南京国博电子有限公司 | TDD switch, driving and low noise amplifier integration receiving front end and manufacturing method thereof |
CN203590209U (en) * | 2013-11-04 | 2014-05-07 | 南京国博电子有限公司 | TDD switch, driver, and low-noise amplifier integrated reception front-end |
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2017
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US20100090917A1 (en) * | 2007-05-08 | 2010-04-15 | Christoph Roeckl | Electrical Component with a Front-End Circuit |
CN101656335A (en) * | 2009-09-22 | 2010-02-24 | 中国电子科技集团公司第五十五研究所 | Asymmetrical super-power radio-frequency switch module and preparation method thereof |
CN101714884A (en) * | 2009-10-21 | 2010-05-26 | 中国电子科技集团公司第五十五研究所 | Receiving front-end module of super power and ultra-low noise radio frequency and preparation method thereof |
CN103607211A (en) * | 2013-11-04 | 2014-02-26 | 南京国博电子有限公司 | TDD switch, driving and low noise amplifier integration receiving front end and manufacturing method thereof |
CN203590209U (en) * | 2013-11-04 | 2014-05-07 | 南京国博电子有限公司 | TDD switch, driver, and low-noise amplifier integrated reception front-end |
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