CN107835139A - A kind of equalizer feedback control circuit and method for suppressing overcompensation - Google Patents
A kind of equalizer feedback control circuit and method for suppressing overcompensation Download PDFInfo
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- CN107835139A CN107835139A CN201710908008.1A CN201710908008A CN107835139A CN 107835139 A CN107835139 A CN 107835139A CN 201710908008 A CN201710908008 A CN 201710908008A CN 107835139 A CN107835139 A CN 107835139A
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L25/00—Baseband systems
- H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
- H04L25/03—Shaping networks in transmitter or receiver, e.g. adaptive shaping networks
- H04L25/03006—Arrangements for removing intersymbol interference
- H04L25/03159—Arrangements for removing intersymbol interference operating in the frequency domain
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L25/00—Baseband systems
- H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
- H04L25/03—Shaping networks in transmitter or receiver, e.g. adaptive shaping networks
- H04L25/03006—Arrangements for removing intersymbol interference
- H04L2025/03433—Arrangements for removing intersymbol interference characterised by equaliser structure
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L25/00—Baseband systems
- H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
- H04L25/03—Shaping networks in transmitter or receiver, e.g. adaptive shaping networks
- H04L25/03006—Arrangements for removing intersymbol interference
- H04L2025/03592—Adaptation methods
- H04L2025/03598—Algorithms
- H04L2025/03611—Iterative algorithms
- H04L2025/03636—Algorithms using least mean square [LMS]
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- Computer Networks & Wireless Communication (AREA)
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- Cable Transmission Systems, Equalization Of Radio And Reduction Of Echo (AREA)
Abstract
The invention belongs to analog equalizer technical field, from convergence algorithm carry out from convergent decision-feedback loop from convergent analog equalizer (1) and using second from convergence algorithm more particularly to a kind of equalizer feedback control circuit for suppressing overcompensation, including using first;The decay that the analog equalizer (1) is used for input signal compensates;Described second can produce feedback TAP coefficients from convergence algorithm;Wherein, the analog equalizer (1) is connected with the decision-feedback loop, described first is finely adjusted by introducing the feedback TAP coefficients from convergence algorithm to the analog equalizer (1) from convergence, suppresses the analog equalizer (1) caused overcompensation during the decay to the input signal compensates.
Description
Technical field
The invention belongs to analog equalizer technical field, and in particular to a kind of equalizer feedback control electricity for suppressing overcompensation
Road and method.
Background technology
In high speed transmission of signals and receiving module, it can use and arrive analog equalizer (CTLE), decision-feedback loop
(Decision Feed-Back, write a Chinese character in simplified form DFE, and its effect is to obtain more preferable BER performances) these modules.Simulation is linear equal
Weighing apparatus can all need to use from convergence algorithm, moreover, in order to tackle different use environments, may require that CTLE also has it from convergence
Algorithm;DFE's is usually the SSLMS algorithms of standard from convergence algorithm, and produces feedback TAP coefficients.Generally, they two
It is individual be it is relatively independent, such as traditional data recovery system framework in Fig. 1.
Decay can be produced to the signal of process by transmitting the passage of high speed signal;Different frequency contents, attenuation are different.
Simulation linear equalizer major function is the differential declines for compensating passage to the different frequency composition of signal.Compensation is inadequate, or
Overcompensation, it is optimal all make it that systematic function does not reach.In traditional data recovery system framework as shown in Figure 1 (in Fig. 1
It is exactly to adjudicate mould that decision-feedback loop, which includes connected SSLMS algoritic modules 3 and data recovery module 4, data recovery module 4,
Block, SSLMS algoritic modules 3 provide feedback TAP coefficients), impulse response schematic diagram such as Fig. 3 that analog equalizer (CTLE) is exported
Shown, in the case of overcompensation, the TAP2 obtained according to SSLMS algorithms is a negative, have in schematic diagram 3 it is downward recessed,
It is exactly TAP2 corresponding to it (feedback TAP coefficients are a system number, and TAP2 is exactly to represent second coefficient therein).
The content of the invention
The purpose of the present invention is by feedback TAP coefficients caused by decision-feedback loop (DFE) while gives analog equalizer
(CTLE) from convergence algorithm, it is adjusted, it is expected to obtain more preferable overall performance.
To achieve the above objectives, the technical solution adopted by the present invention is a kind of equalizer feedback control electricity for suppressing overcompensation
Road, including carry out from convergent analog equalizer and using second from convergence algorithm restrain certainly from convergence algorithm using first
Decision-feedback loop;The decay that the analog equalizer is used for input signal compensates;Described second from convergence algorithm
Feedback TAP coefficients can be produced;Wherein, the analog equalizer is connected with the decision-feedback loop, and described first restrains certainly
Algorithm is finely adjusted by introducing the feedback TAP coefficients to the analog equalizer from convergence, suppresses the analog balanced
Device caused overcompensation during the decay to the input signal compensates.
Further, described second from convergence algorithm be SSLMS algorithms, for the input signal carry out self-optimizing at
Reason.
Further, described second produced from convergence algorithm by SSLMS algoritic modules.
Further, the tune included from convergence to variable dc gain and small-signal ac gain of the analog equalizer
It is whole, the adjustment by described first from convergence algorithm to the variable resistance and the tune of variable capacitance in the analog equalizer
It is whole to realize.
Further, described first produced from convergence algorithm by convergence module certainly.
To achieve the above objectives, the invention also discloses the equalizer feedback control circuit for above-mentioned suppression overcompensation
A kind of suppression overcompensation equalizer feedback control method, suppress the equalizer feedback control circuit of overcompensation, including use
First from convergence algorithm carry out from convergent decision-feedback from convergent analog equalizer and using second from convergence algorithm
Loop;The decay that the analog equalizer is used for input signal compensates;Described second can produce instead from convergence algorithm
Present TAP coefficients;The analog equalizer is connected with the decision-feedback loop, and described first passes through described in introducing from convergence algorithm
Feedback TAP coefficients are finely adjusted to the analog equalizer from convergence, are suppressed the analog equalizer and are believed to the input
Number decay compensate during caused overcompensation;The equalizer feedback control method for suppressing overcompensation includes
Following steps:
(S1) analog equalizer is carried out from convergence by described first from convergence algorithm;
(S2) the decision-feedback loop calls second to carry out self-optimizing processing to the input signal from convergence algorithm, and
Produce the feedback TAP coefficients;
(S3) the feedback TAP coefficients are sent into described the first of the analog equalizer from convergence algorithm simultaneously, it is right
The analog equalizer is finely adjusted from convergence process, obtains more preferable whole structure.
Further, described second from convergence algorithm be SSLMS algorithms, for the input signal carry out self-optimizing at
Reason.
Further, described second produced from convergence algorithm by SSLMS algoritic modules;Described first from convergence algorithm by from
Module is restrained to produce;In the step (S3), the feedback TAP coefficients are admitted to the convergence module, then by described certainly
Described first is sent into from convergence algorithm from convergence module, to being finely adjusted from convergence process for the analog equalizer.
Further, the tune included from convergence to variable dc gain and small-signal ac gain of the analog equalizer
It is whole, the adjustment by described first from convergence algorithm to the variable resistance and the tune of variable capacitance in the analog equalizer
It is whole to realize.
Further, in the step (S3), the fine setting comprises at least the convergence root certainly for making the analog equalizer
According to the numerical value of the feedback TAP coefficients, the variable resistance or variable capacitance in the analog equalizer are increased
Greatly/reduce adjustment.
The beneficial effects of the present invention are:
Do not increase element additionally, utilize original analog equalizer 1, certainly decision-feedback loop, convergence module 2, SSLMS
Algoritic module 3 etc. realizes the suppression of the overcompensation of the output pulse to analog equalizer 1.
Brief description of the drawings
Fig. 1 is data recovery system configuration diagram traditional in background of invention;
Fig. 2 is using the equalizer feedback control of suppression overcompensation provided by the present invention in the specific embodiment of the invention
The data recovery system configuration diagram of circuit;
Fig. 3 is that analog equalizer (CTLE) institute is defeated in data recovery system framework traditional in the specific embodiment of the invention
The impulse response schematic diagram gone out;
Fig. 4 is using the equalizer feedback control of suppression overcompensation provided by the present invention in the specific embodiment of the invention
The impulse response schematic diagram that analog equalizer (CTLE) is exported in circuit and the data recovery system framework of method;
Fig. 5 is the first comparison schematic diagram of the two kinds of impulse responses exported in Fig. 3 and Fig. 4;
Fig. 6 is the second comparison schematic diagram of the two kinds of impulse responses exported in Fig. 3 and Fig. 4;
In figure:1- analog equalizers, 2- is from restraining module, 3-SSLMS algoritic modules, 4- data recovery modules, and 5- is adaptive
Answer controller.
Embodiment
The invention will be further described with reference to the accompanying drawings and examples.
By taking data recovery system framework as shown in Figure 2 as an example, a kind of balanced device of suppression overcompensation provided by the invention is anti-
Present control circuit, including analog equalizer 1 (CTLE) and decision-feedback loop (DFE, in fig. 2 decision-feedback loop include phase
SSLMS algoritic modules 3 and data recovery module 4, data recovery module 4 even is exactly judging module), wherein, analog equalizer 1
It is connected with decision-feedback loop.Analog equalizer 1 is carried out from convergence, decision-feedback loop (DFE) using first from convergence algorithm
Carried out using second from convergence algorithm from convergence;The decay that analog equalizer 1 is used for input signal compensates;Second receives certainly
Feedback TAP coefficients can be produced by holding back algorithm;First from convergence algorithm by introduce feedback TAP coefficients to analog equalizer 1 from
Convergence is finely adjusted, and suppresses the caused overcompensation during the decay to input signal compensates of analog equalizer 1.
Second from convergence algorithm be SSLMS algorithms, for input signal carry out self-optimizing processing.Second from convergence algorithm
Produced by SSLMS algoritic modules 3.First is produced from convergence algorithm by convergence module 2 certainly.
Analog equalizer 1 includes leading to variable dc gain and the adjustment of small-signal ac gain, the adjustment from convergence
First is crossed from adjustment of the convergence algorithm to variable resistance and variable capacitance in analog equalizer 1 to realize.
Present invention also offers a kind of suppression overcompensation of the equalizer feedback control circuit using above-mentioned suppression overcompensation
Equalizer feedback control method, comprise the following steps:
Step S1, analog equalizer 1 are carried out from convergence by first from convergence algorithm;
Step S2, decision-feedback loop calls second to carry out self-optimizing processing to input signal from convergence algorithm, and produces
Feed back TAP coefficients;
Step S3, TAP coefficients will be fed back caused by second from convergence algorithm while are sent into the first of analog equalizer 1 and will be received certainly
Hold back in algorithm, to being finely adjusted from convergence process for analog equalizer 1, obtain more preferable whole structure.
Wherein,
First is produced from convergence algorithm by convergence module 2 certainly;
Second is produced from convergence algorithm by SSLMS algoritic modules 3, second from convergence algorithm be SSLMS algorithms, for defeated
Enter signal and carry out self-optimizing processing;
Feedback TAP coefficients are admitted to from convergence module 2, then by being sent into first from convergence algorithm from convergence module 2, it is right
Analog equalizer 1 is finely adjusted from convergence process;
Analog equalizer 1 includes leading to variable dc gain and the adjustment of small-signal ac gain, the adjustment from convergence
First is crossed from adjustment of the convergence algorithm to variable resistance and variable capacitance in analog equalizer 1 to realize;
Fine setting comprises at least the numerical value from convergence according to feedback TAP coefficients for making analog equalizer 1, to analog equalizer 1
In variable resistance or variable capacitance carry out increasing/reducing adjustment.(different from convergence algorithm, the form taken may not
Together.)
As shown in figure 4, employ the equalizer feedback control circuit of suppression overcompensation provided by the present invention and suppressed
The pulse that analog equalizer (CTLE) in the data recovery system framework of the equalizer feedback control method of compensation is exported rings
Should be a positive number so that analog equalizer (CTLE) is in undercompensation state.It is also seen that not using feedback in Fig. 5, Fig. 6
Analog equalizer (CTLE) the output pulse that TAP coefficients were finely adjusted and be finely adjusted using feedback TAP coefficients two ways rings
The contrast effect answered.
Device of the present invention is not limited to the embodiment described in embodiment, those skilled in the art according to
Technical scheme draws other embodiments, also belongs to the technological innovation scope of the present invention.
Claims (10)
1. a kind of equalizer feedback control circuit for suppressing overcompensation, including carried out using first from convergence algorithm from convergent mould
Intend balanced device (1) and carried out using second from convergence algorithm from convergent decision-feedback loop;The analog equalizer (1) is used for
Decay to input signal compensates;Described second can produce feedback TAP coefficients from convergence algorithm;It is characterized in that:It is described
Analog equalizer (1) is connected with the decision-feedback loop, described first from convergence algorithm by introducing the feedback TAP coefficients
The analog equalizer (1) is finely adjusted from convergence, suppresses the analog equalizer (1) and is declined to the input signal
Subtract caused overcompensation during compensating.
2. suppress the equalizer feedback control circuit of overcompensation as claimed in claim 1, it is characterized in that:Described second restrains certainly
Algorithm is SSLMS algorithms, for carrying out self-optimizing processing to the input signal.
3. suppress the equalizer feedback control circuit of overcompensation as claimed in claim 2, it is characterized in that:Described second restrains certainly
Algorithm is produced by SSLMS algoritic modules (3).
4. suppress the equalizer feedback control circuit of overcompensation as claimed in claim 1, it is characterized in that:The analog equalizer
(1) convergence certainly is included to variable dc gain and the adjustment of small-signal ac gain, and the adjustment passes through described first from convergence
Adjustment of the algorithm to variable resistance and variable capacitance in the analog equalizer (1) is realized.
5. suppress the equalizer feedback control circuit of overcompensation as claimed in claim 1, it is characterized in that:Described first restrains certainly
Algorithm from convergence module (2) by producing.
6. a kind of suppression overcompensation for the equalizer feedback control circuit of the suppression overcompensation as described in claim 1-5
Equalizer feedback control method, suppress the equalizer feedback control circuit of overcompensation, including carried out using first from convergence algorithm
Carried out from convergent analog equalizer (1) and using second from convergence algorithm from convergent decision-feedback loop;The simulation is equal
The decay that weighing apparatus (1) is used for input signal compensates;Described second can produce feedback TAP coefficients from convergence algorithm;Its
It is characterized in:The analog equalizer (1) is connected with the decision-feedback loop, and described first passes through described in introducing from convergence algorithm
Feedback TAP coefficients are finely adjusted to the analog equalizer (1) from convergence, suppress the analog equalizer (1) to described
The decay of input signal caused overcompensation during compensating;The equalizer feedback controlling party for suppressing overcompensation
Method comprises the following steps:
(S1) analog equalizer (1) is carried out from convergence by described first from convergence algorithm;
(S2) the decision-feedback loop calls second to carry out self-optimizing processing to the input signal from convergence algorithm, and produces
The feedback TAP coefficients;
(S3) the feedback TAP coefficients are sent into described the first of the analog equalizer (1) from convergence algorithm simultaneously, to institute
Being finely adjusted from convergence process for analog equalizer (1) is stated, obtains more preferable whole structure.
7. suppress the equalizer feedback control method of overcompensation as claimed in claim 6, it is characterized in that:Described second restrains certainly
Algorithm is SSLMS algorithms, for carrying out self-optimizing processing to the input signal.
8. suppress the equalizer feedback control method of overcompensation as claimed in claim 7, it is characterized in that:Described second restrains certainly
Algorithm is produced by SSLMS algoritic modules (3);Described first is produced from convergence algorithm by convergence module (2) certainly;In the step
(S3) in, the feedback TAP coefficients be admitted to it is described from convergence module (2), then by it is described be sent into from convergence module (2) described in
First from convergence algorithm, to being finely adjusted from convergence process for the analog equalizer (1).
9. suppress the equalizer feedback control method of overcompensation as claimed in claim 6, it is characterized in that:The analog equalizer
(1) convergence certainly is included to variable dc gain and the adjustment of small-signal ac gain, and the adjustment passes through described first from convergence
Adjustment of the algorithm to variable resistance and variable capacitance in the analog equalizer (1) is realized.
10. suppress the equalizer feedback control method of overcompensation as claimed in claim 9, it is characterized in that:In the step
(S3) in, the fine setting comprises at least the numerical value from convergence according to the feedback TAP coefficients for making the analog equalizer (1),
The variable resistance or variable capacitance in the analog equalizer (1) is carried out increasing/reducing adjustment.
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Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN203434996U (en) * | 2012-04-19 | 2014-02-12 | 英特尔公司 | Input/output receiver and associated system |
US20140169439A1 (en) * | 2012-12-14 | 2014-06-19 | Altera Corporation | Apparatus and methods for equalizer adaptation |
CN104050122A (en) * | 2013-03-15 | 2014-09-17 | 英特尔公司 | Adaptive Backchannel Equalization |
CN104583988A (en) * | 2012-09-29 | 2015-04-29 | 英特尔公司 | Equalization effort-balancing of transmit Finite Impulse Response and receive Linear Equalizer or receive Decision Feedback Equalizer structures in high-speed serial interconnects |
CN106301229A (en) * | 2016-08-17 | 2017-01-04 | 灿芯半导体(上海)有限公司 | Data receiver circuit |
CN206313811U (en) * | 2015-10-16 | 2017-07-07 | 赛灵思公司 | Circuit for enabling equalizing circuit self adaptation |
-
2017
- 2017-09-29 CN CN201710908008.1A patent/CN107835139A/en active Pending
Patent Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN203434996U (en) * | 2012-04-19 | 2014-02-12 | 英特尔公司 | Input/output receiver and associated system |
CN104583988A (en) * | 2012-09-29 | 2015-04-29 | 英特尔公司 | Equalization effort-balancing of transmit Finite Impulse Response and receive Linear Equalizer or receive Decision Feedback Equalizer structures in high-speed serial interconnects |
US20140169439A1 (en) * | 2012-12-14 | 2014-06-19 | Altera Corporation | Apparatus and methods for equalizer adaptation |
CN104050122A (en) * | 2013-03-15 | 2014-09-17 | 英特尔公司 | Adaptive Backchannel Equalization |
CN206313811U (en) * | 2015-10-16 | 2017-07-07 | 赛灵思公司 | Circuit for enabling equalizing circuit self adaptation |
CN106301229A (en) * | 2016-08-17 | 2017-01-04 | 灿芯半导体(上海)有限公司 | Data receiver circuit |
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Application publication date: 20180323 |