CN107819489B - A kind of ultra wide band high bandwidth radio-frequency receiving-transmitting two-way integral integration module - Google Patents
A kind of ultra wide band high bandwidth radio-frequency receiving-transmitting two-way integral integration module Download PDFInfo
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- CN107819489B CN107819489B CN201711177787.9A CN201711177787A CN107819489B CN 107819489 B CN107819489 B CN 107819489B CN 201711177787 A CN201711177787 A CN 201711177787A CN 107819489 B CN107819489 B CN 107819489B
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
- H04B1/69—Spread spectrum techniques
- H04B1/7163—Spread spectrum techniques using impulse radio
- H04B1/71635—Transmitter aspects
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
- H04B1/69—Spread spectrum techniques
- H04B1/7163—Spread spectrum techniques using impulse radio
- H04B1/7183—Synchronisation
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Abstract
The invention discloses a kind of transceiving integrated integration modules of ultra wide band high bandwidth RF bidirectional, belong to wireless information transfer technical field, including main control unit, power supply unit, microwave synthesizer unit, rf transmitter unit, rf receiver unit, digital signal processing unit and radio-frequency receiving-transmitting control unit；Main control unit mainly completes the functions such as bus driver, data interaction, signal processing；Power supply unit provides high stable, low noise power supply；Microwave synthesizer unit, rf transmitter unit, rf receiver unit, digital signal processing unit realize maximum unidirectional 8 × 8 or two-way 4 × 4 radio-frequency receiving-transmitting using microwave frequency synthesis technology, broadband converter technique, signal condition technology, wide-band modulation demodulation techniques, Digital Signal Processing；Radio-frequency receiving-transmitting control unit realizes radio-frequency receiving-transmitting control.The transceiving integrated integration module of RF bidirectional of the invention is easy of integration, expansible, meets the demand of extensive MIMO radio frequency multichannel transmitting-receiving.
Description
Technical field
The invention belongs to wireless information transfer technical fields, and in particular to a kind of ultra wide band high bandwidth radio-frequency receiving-transmitting two-way one
Body integration module.
Background technique
With the diversification of wireless access, increasingly for extensive mimo wireless communication measuring technology frequency coverage
Greatly, bandwidth and transmission rate request are higher and higher, and also exponentially rises the difficulty of RF transmit-receive circuit design, have become big
The difficult point of scale MIMO design.
Radio-frequency receiving-transmitting two-way integral integrated technology is based on the circuits such as mixing, filtering, amplification and decaying, with complete
Keeping broadband input/output signal feature without distortion is ultimate aim, is adjusted to transmission signal amplitude, offset and phase
Technology, be related to high speed transmission of signals matching technique, wideband filtered technology, broadband amplification with decay technique, balancing technique, emphasis
Break through includes the research of High Linear Larger Dynamic range transmitter, the research of low noise Larger Dynamic range receiver, radio-frequency module miniaturization
The key technologies such as research, the research of high stability low phase noise clock frequency synthesis module.With input/output signal frequency
It is continuously improved, signal bandwidth increases, and needs through the research to RF transmit-receive circuit designing technique, it is ensured that input/output signal
Quality.Therefore, it needs to realize broadband using new method and means in the design of the RF transmit-receive circuit in wide-band, big broadband
The conditioning and multi-channel synchronous of signal, to meet the requirement of the extensive mimo wireless communication test of high quality.
Current multi-channel rf transmitting-receiving bidirectional Module implementations are broadly divided into discrete scheme and Integrated Solution.Wherein integrate
Scheme is mainly such as AD9361 and AD9371 chip for using mainstream company to provide, and chip interior is integrated with high-speed data and connects
Mouth, transmitting-receiving local oscillator combiner circuit, carrier modulation demodulator circuit, amplification attenuator circuit etc..There is great advantage in terms of volume, refers to
Mark is also able to satisfy many applications.But its effective signal bandwidth is partially narrow, is limited to oversampling clock rate and data processing
Rate, these integrated chips effective bandwidth under the double receipts states of double hairs only has original half, and SINC roll-off characteristic is very
Obviously, the Frequency Response of signal is greatly affected, and signal quality can be seriously affected in broadband application.In addition in minimum body
Product is integrated with multiple functions, and radio frequency leakage, spuious etc. can influence signal index.Up to thousand or more register controls
System trouble, the package interface for not providing standard can call.It is unfavorable for debugging test and practical control and uses.Discrete scheme
Mainly build with single radiofrequency emitting module and single Receiver Module and independent switch module etc. full
The two-way requirement of sufficient radio-frequency receiving-transmitting.Volume is larger, and control is inconvenient, and consistency synchronization is bad.
That there are effective signal bandwidths is partially narrow, SINC roll effect is obvious for Integrated Solution in prior art, influences broadband
Signal index characteristic, covering frequence range is less than normal, and population parameter serial ports control mode is called inconvenient；Discrete solution integration degree is inadequate,
Volume is bigger than normal, and control is inconvenient, and consistency synchronization is bad.
Summary of the invention
For the above-mentioned technical problems in the prior art, the invention proposes a kind of ultra wide band high bandwidth radio-frequency receiving-transmittings
Two-way integral integration module, design rationally, overcome the deficiencies in the prior art, have good effect.
To achieve the goals above, the present invention adopts the following technical scheme:
A kind of ultra wide band high bandwidth radio-frequency receiving-transmitting two-way integral integration module, including main control unit, power supply unit, microwave
Frequency synthesis unit, rf receiver unit, rf transmitter unit, digital signal processing unit and the control of 8 road radio-frequency receiving-transmittings are single
Member；
Main control unit is configurable for bus driver, data interaction, signal processing；
Power supply unit is configurable for providing power supply for main control unit and microwave synthesizer unit；
Microwave synthesizer unit, including clock reference unit, microwave receiving frequency synthesis unit and Microwave emission frequency
Synthesis unit；
Clock reference unit is configurable for realizing External Reference switching in clock；
Microwave receiving frequency synthesis unit, including high-speed ADC sampling clock synthesis unit, reception frequency conversion local oscillator synthesis unit
Local oscillator synthesis unit is demodulated with receiving；
High-speed ADC sampling clock synthesis unit, including the 8th integrated PLL chip, the 8th integrated VCO chip and the 4th low pass
Filter；The reference clock of clock reference unit is output to the 8th integrated PLL chip, and the 8th integrated PLL chip drives the 8th collect
High-speed ADC sampled clock signal is generated by the 4th low-pass filter at VCO chip output radiofrequency signal；
Frequency conversion local oscillator synthesis unit is received, including receives up-conversion local oscillator combiner circuit and receives down coversion local oscillator synthesis electricity
Road；
Receive up-conversion local oscillator combiner circuit, including the first integrated PLL chip, the first integrated VCO chip and the 6th band
Bandpass filter；The reference clock of clock reference unit is output to the first integrated PLL chip, the first integrated PLL chip drives first
Integrated VCO chip exports radiofrequency signal and generates up-conversion local oscillation signal by the 6th low-pass filter；
Receive down coversion local oscillator combiner circuit, including the second integrated PLL chip, the second integrated VCO chip and the 7th band
Bandpass filter；The reference clock of clock reference unit is output to the second integrated PLL chip, the second integrated PLL chip drives second
Integrated VCO chip exports radiofrequency signal and generates down coversion local oscillation signal by the 7th bandpass filter；
It receives solution and is mixed into local oscillator unit, including third integrates PLL chip, third integrated VCO chip and the 8th band logical
Filter；The reference clock of clock reference unit is output to third and integrates PLL chip, and third integrates PLL chip drives third collection
It is generated at VCO chip output radiofrequency signal and receives demodulation local oscillation signal；
Microwave emission frequency synthesis unit, including high-speed DAC sampling clock synthesis unit, transmitting frequency conversion local oscillator synthesis unit
Local oscillator synthesis unit is modulated with transmitting；
High-speed DAC sampling clock synthesis unit, including the 4th integrated PLL chip, the 4th integrated VCO chip and the first low pass
Filter；The reference clock of clock reference unit is output to the 4th integrated PLL chip, and the 4th integrated PLL chip drives the 4th collect
High-speed DAC sampled clock signal is generated by the first bandpass filter at VCO chip output radiofrequency signal；
Transmitting modulation local oscillator synthesis unit, including the 5th integrated PLL chip, the 5th integrated VCO chip and the filter of the 9th band logical
Wave device；The reference clock of clock reference unit is output to the 5th integrated PLL chip, and the 5th integrated PLL chip drives the 5th are integrated
VCO chip exports radiofrequency signal and generates transmitting modulation local oscillation signal by the 9th bandpass filter；
Emit frequency conversion local oscillator synthesis unit, including transmitting down coversion local oscillation circuit and transmitting up-conversion local oscillation circuit；
Emit down coversion local oscillation circuit, including the 6th integrated PLL chip, the 6th integrated VCO chip and the filter of the 13rd band logical
Wave device；The reference clock of clock reference unit is output to the 6th integrated PLL chip, and the 6th integrated PLL chip drives the 6th are integrated
VCO chip exports radiofrequency signal and generates transmitting down coversion local oscillation signal by the 13rd bandpass filter；
Emit up-conversion local oscillation circuit, including the 7th integrated PLL chip, the 7th integrated VCO chip and the filter of the 14th band logical
Wave device；The reference clock of clock reference unit is output to the 7th integrated PLL chip, and the 7th integrated PLL chip drives the 7th are integrated
VCO chip exports radiofrequency signal and generates transmitting up-conversion local oscillation signal by the 14th bandpass filter；
Rf transmitter unit, including transmitting frequency conversion conditioning unit and transmitting modulation unit；
Emit modulation unit, including two-way DAC chip, the second low-pass filter, third low-pass filter, the first amplitude tune
Manage circuit, the second amplitude conditioning circuit and the second quadrature modulator；
Emit modulation unit and received digital signal is converted to by analog baseband signal by high speed two-way DAC chip, adopts
Sample clock is generated by the high-speed DAC sampling clock synthesis unit in microwave synthesizer unit, is turned by high speed two-way DAC chip
The analog baseband signal changed passes through the second low-pass filter, third low-pass filter, the first amplitude conditioning circuit and the second amplitude
Conditioning circuit is output to the second quadrature modulator, and the orthogonal modulation local oscillator generated with transmitting modulation local oscillator synthesis unit synthesizes production
Raw 400MHz~6GHz carrier (boc) modulated signals；
Emit frequency conversion conditioning unit, including the 4th RF switch, the tenth bandpass filter, the 11st bandpass filter, the
Ten two band-pass filters, the first frequency mixer, the second frequency mixer, third amplitude conditioning circuit, the 5th RF switch and the 6th radio frequency
Switch；
Intermediate-freuqncy signal is output to the 4th RF switch, needs to select output channel according to reference frequency output；The first via
Low frequency down coversion channel, when output signal frequency is 30MHz~400MHz, signal passes through the tenth bandpass filter and microwave frequency
The down coversion local oscillator frequency variation signal that subelement transmitting frequency conversion local oscillator synthesis unit in synthesis unit generates, passes through the first frequency mixer
30MHz~400MHz carrier (boc) modulated signals are generated, are being output to the 5th RF switch after third amplitude conditioning circuit；
Second road put-through channel, when output signal frequency is 400MHz~6GHz, signal passes through the 11st bandpass filter
The 5th RF switch is output to third amplitude conditioning circuit；
Third road high frequency up-conversion passage, when output signal frequency is 6GHz~20GHz, signal is filtered by the 12nd band logical
The up-conversion local oscillator frequency variation signal generated after wave device with the subelement of microwave synthesizer unit transmitting frequency conversion local oscillator synthesis unit
Output 6GHz~20GHz signal, which is mixed, by the second frequency mixer is output to the 5th RF switch；
Finally, signal realizes final ultra-broadband signal output by the 6th RF switch, make using the port I/O as output
Used time, the port are output to the first RF switch from the 6th RF switch and pass through the port I/O final output；
Rf receiver unit, including receive frequency conversion conditioning unit and receive demodulating unit；
Receive frequency conversion conditioning unit, including the first RF switch, the second RF switch, the first bandpass filter, the second band
Bandpass filter, the first controllable-gain circuit, the second controllable-gain circuit, up-conversion mixer, down-conversion mixer, third band logical
Filter, the 4th bandpass filter and the 5th bandpass filter；
The radiofrequency signal received is passed through the switching input and output of the first RF switch first and led to by reception frequency conversion conditioning unit
Road is input channel, is selected further according to input radio frequency signal frequency situation by the second RF switch, first via low frequency up-conversion
Channel, input frequency are gated when being 30MHz~400MHz, are handled by the first bandpass filter and the first controllable-gain circuit
Afterwards, with the up-conversion local oscillation signal that receive the frequency that frequency conversion local oscillator synthesis unit generates be 2030MHz~2400MHz, in process
2GHz carrier (boc) modulated signals are generated after conversion mixer mixing, are output to reception demodulating unit by the 4th bandpass filter；The
Two road put-through channels are output to reception demodulating unit through the third bandpass filter that overfrequency is 400MHz~6GHz；Third road
High frequency down coversion channel, input frequency gate when being 6GHz~20GHz, by the second bandpass filter and the second controllable gain electricity
After the processing of road, the down coversion local oscillation signal for being 10GHz~20GHz with the frequency for receiving the generation of frequency conversion local oscillator synthesis unit passes through
The carrier (boc) modulated signals that frequency range is 400MHz~6GHz are generated after down-conversion mixer mixing, by the 5th bandpass filter
It is output to reception demodulating unit；
Receive demodulating unit, including third RF switch, the first quadrature demodulator and two-way ADC chip；
Receive the intermediate-freuqncy signal and receive demodulation local oscillator synthesis unit output that demodulating unit exports third RF switch
Local oscillation signal carries out demodulation by the first quadrature demodulator and generates analog differential baseband signal, and is carried out by two-way ADC chip
High speed analog-to-digital conversion generates digital baseband signal；
Digital signal processing unit, is divided into digital signal acquiring processing unit and processing unit occurs for digital signal；
Digital signal acquiring processing unit is configurable for the difference quadrature baseband signal generated to rf receiver unit
Digital Signal Processing including being extracted, being parsed；
Processing unit occurs for digital signal, is configurable for being carried out according to the modulation of main control unit, frequency, bandwidth parameter
Configuration, which generates, meets the numeric field difference quadrature baseband signal that transmitting modulation module requires；
Radio-frequency receiving-transmitting control unit, including FPGA and multichannel level control driving circuit；It is configurable for believing multichannel
Number transmitting-receiving is configured, including realizing amplitude unidirectional including multichannel, two-way, different, frequency, signal bandwidth, signaling mode
Parameter is configured；
When carrying out signal reception, radio-frequency receiving-transmitting control unit controls selected input number of signals and path and amplitude ginseng
Number, and the selection of signal frequency conversion access is carried out according to input signal frequency range, and be transferred to and receive frequency conversion conditioning unit, it receives and becomes
Input signal conditioning to quadrature demodulator radio frequency signal frequency range, and is transferred to radio demodulating unit by frequency conditioning unit, institute
It states radio demodulating unit and carrier (boc) modulated signals is demodulated into digital orthogonal baseband signal, then pass through High Performance ADC for analog baseband signal
It is sampled as digital baseband signal and is output to digital signal processing unit；
When carrying out signal transmitting, radio-frequency receiving-transmitting control unit controls selected input number of signals and path and amplitude ginseng
Number, the base band signal transmission that digital signal processing unit is generated to transmitting modulation unit, emits modulation unit to baseband signal
It carries out local oscillator modulation to generate radio-frequency carrier modulated signal and be output to transmitting frequency conversion conditioning unit, emits frequency conversion conditioning unit to letter
The frequency range for number carrying out frequency conversion covering 30MHz~20GHz, and carries out signal condition, realizes signal output.
Preferably, main control unit and microwave synthesizer unit, rf transmitter unit, rf receiver unit, digital signal
Data and address interconnection, high-speed DAC, ADC and FPGA are carried out using pci bus between processing unit, radio-frequency receiving-transmitting control unit
It is realized and is interconnected using high-speed-differential LVDS interface.
Preferably, clock reference unit generates the homologous clock signal in 12 tunnels using ADCLK954 clock buffer driver.
Preferably, high-speed ADC sampling clock synthesis unit uses the working method of Variable sampling clock, guarantees that work clock is
Real data handles 2 index multiple proportion of clock, when generating 1GHz sampling using ADF4355 PLL frequency synthesizer
Clock carries out analog signal sampling using ADS5400 high speed analog-to-digital conversion chip.
Preferably, frequency conversion local oscillator synthesis unit and transmitting frequency conversion local oscillator synthesis unit are received using ADF4355 phaselocked loop frequency
Rate synthesis chip synthesizes 2030MHz~2400MHz low frequency local oscillation signal, using PLL chip HMC702LP6CE and integrated VCO core
Piece HMC733LC4B and two divided-frequency chip UXM15P constitutes phase-locked loop circuit and generates 10GHz~20GHz high-frequency local oscillation signal.
Preferably, it receives demodulation local oscillator synthesis unit and transmitting modulation local oscillator synthesis unit is all made of ADF4355 phaselocked loop
Frequency synthesis chip.
Preferably, high-speed DAC sampling clock synthesis unit uses ADF4355 PLL frequency synthesizer and difference
1.2GHz reconfigurable filter generates high speed sampling clock, carries out digital-to-analogue conversion using AD9736 high-speed digital-analog conversion chip.
Preferably, it receives frequency conversion conditioning unit and uses ADL5380 differential orthogonal demodulation device, transmitting frequency conversion conditioning unit uses
ADL5375 differential orthogonal modulation device, the low frequency mixting circuit for receiving frequency conversion conditioning unit and transmitting frequency conversion conditioning unit are all made of
HMC213AMS8E frequency mixer, high frequency mixting circuit are all made of HMC773LC3B frequency mixer.
Preferably, digital signal processing unit uses High Performance FPGA XC7K325T-2FFG900I and storage chip
PC28F00AP30TF carries out high-speed digital video camera.
Preferably, radio-frequency receiving-transmitting control unit uses fpga chip XC6SLX100-2FGG484I and storage chip
XCF32PVOG48I。
Advantageous effects brought by the present invention:
(1) modularized design, single module support maximum 8 × 8 unidirectionally transmitting-receiving and maximum 4 × 4 bidirectional transmit-receives, and can be with
Multiple modules construct more massive radio-frequency receiving-transmitting two-way modules jointly and meet application demand；
(2) there is synchronic base and with frequency characteristic, be conducive to realize synchronously control between multichannel；
(3) sampling clock is high, and signal RF bandwidth reaches 200MHz, and can carry out signal bandwidth extension, can satisfy
Higher signal bandwidth demand, frequency response is preferable in signal band；
(4) frequency coverage is wide, and signal transmitting and receiving function is realized in 30MHz~20GHz frequency range；
(5) dynamic range of signals is big, input range range+15dBm~-40dBm, and output amplitude range -20dBm~-
110dBm meets different testing requirements.
Detailed description of the invention
Fig. 1 is the functional block diagram of ultra wide band high bandwidth radio-frequency receiving-transmitting two-way integral integration module.
Fig. 2 is the schematic diagram of RF bidirectional transmission circuit (4 × 4).
Fig. 3 is the functional block diagram of microwave synthesizer unit.
Fig. 4 is the functional block diagram of rf transmitter unit, rf receiver unit, digital signal processing unit.
Fig. 5 is the functional block diagram of radio-frequency receiving-transmitting control unit.
Wherein, 1- main control unit；2- power supply unit；3- microwave synthesizer unit；It is single that 302- receives the synthesis of frequency conversion local oscillator
Member；The first PLL frequency synthesizer of 3021-；3022- the first integrated VCO chip；The 6th bandpass filter of 3023-；3025-
Second PLL frequency synthesizer；3026- the second integrated VCO chip；The 7th bandpass filter of 3027-；303- receives demodulation
Synthesize local oscillator unit；3031- third PLL frequency synthesizer；3032- third integrated VCO chip；The filter of the 8th band logical of 3033-
Wave device；304- high-speed ADC sampling clock synthesis unit；The 8th PLL frequency synthesizer of 3041-；The 8th integrated VCO of 3042-
Chip；The 4th low-pass filter of 3043-；312- emits frequency conversion local oscillator synthesis unit；The 7th phase-locked loop frequency of 3121- synthesizes core
Piece；The 7th integrated VCO chip of 3122-；The 14th bandpass filter of 3123-；The 6th PLL frequency synthesizer of 3125-；
The 6th integrated VCO chip of 3126-；The 13rd bandpass filter of 3127-；313- transmitting modulation local oscillator synthesis unit；3131- the 5th
PLL frequency synthesizer；The 5th integrated VCO chip of 3132-；The 9th bandpass filter of 3133-；When 314- high-speed DAC samples
Clock synthesis unit；The 4th PLL frequency synthesizer of 3141-；The 4th integrated VCO chip of 3142-；The first low-pass filtering of 3143-
Device；4- rf receiver unit；40- receives frequency conversion conditioning unit；The first RF switch of 4011-；The second RF switch of 4012-；
The first bandpass filter of 4013-；The second bandpass filter of 4014-；The first controllable-gain circuit of 4015-；4016- second controllably increases
Beneficial circuit；4017- up-conversion mixer；4018- down-conversion mixer；4019- third bandpass filter；The 4th band logical of 4020-
Filter；The 5th bandpass filter of 4021-；41- receives demodulating unit；4111- third RF switch；The orthogonal solution of 4112- first
Adjust device；4113- two-way ADC chip；5- rf transmitter unit；The 6th RF switch of 5011-；The 5th RF switch of 5012-；
5013- third amplitude conditioning circuit；The first frequency mixer of 5014-；The second frequency mixer of 5015-；The tenth bandpass filter of 5016-；
The 11st bandpass filter of 5017-；The tenth two band-pass filter of 5018-；The 4th RF switch of 5019-；51- transmitting modulation is single
Member；The second quadrature modulator of 5111-；5112- the first amplitude conditioning circuit；5113- the second amplitude conditioning circuit；5114- second
Low-pass filter；5115- third low-pass filter；5117- two-way DAC chip；6- digital signal processing unit；7- radio-frequency receiving-transmitting
Control unit；
Specific embodiment
With reference to the accompanying drawing and specific embodiment invention is further described in detail:
Embodiment 1:
As shown in Figure 1, ultra wide band high bandwidth radio-frequency receiving-transmitting two-way integral integration module, including main control unit 1, power supply list
First 2, microwave synthesizer unit 3 (8 tunnel), rf receiver unit 4 (8 tunnel), rf transmitter unit 5 (8 tunnel), Digital Signal Processing
Unit 6 (8 tunnel) and radio-frequency receiving-transmitting control unit 7.
Main control unit 1, using COMe9600-175F-S4-X main control module, including PCIe, SATA, USB, POWER,
The control interfaces such as Audio, Video complete display driving, power management, audio driven, video drive, PCIe bus driver etc.
Control realizes data interaction, signal processing by PCIe bus, SATA.
When the radio-frequency receiving-transmitting two-way integral integration module works, main control unit 1 carries out model selection first, such as unidirectional/
The parameters such as the two-way, input radio frequency port/selection of output prevention at radio-frequency port, TDD/FDD model selection.
Radio-frequency receiving-transmitting two-way integral integration module works in reception state, 7 pairs of radio-frequency receiving-transmitting control unit every ginsengs
Number is configured, and carries out gating control to frequency range.As shown in Figure 5.
Reception frequency conversion conditioning unit 40 in rf receiver unit 4, passes through first for the radiofrequency signal received first and penetrates
It is input channel that frequency switch 4011 (HMC547LP3E), which switches I/O channel, logical further according to input radio frequency signal frequency situation
Cross the selection of the second RF switch 4012 (HMC641LP4E)；
First via low frequency up-conversion passage, input frequency gates when being 30MHz~400MHz, by the first bandpass filter
4013 and first controllable-gain circuit 4015 handle after, with receive frequency conversion local oscillator synthesis unit 302 generate frequency be 2030MHz
The up-conversion local oscillation signal of~2400MHz generates 2GHz carrier wave after up-conversion mixer 4017 (HMC213AMS8E) mixing
Modulated signal is output to third RF switch 4111 (HMC641LP4E) by third bandpass filter 4019；Wherein, it receives and becomes
The up-conversion local oscillator combiner circuit of frequency local oscillator synthesis unit 302, including the first PLL frequency synthesizer 3021
(HMC702LP6CE (DC~14GHz)), the first integrated VCO chip 3022 (HMC733LC3B) and the 6th bandpass filter
3023, radio frequency/local oscillator frequency range is 1.5GHz~4.5GHz, and intermediate frequency output is DC~1.5GHz, and intermediate frequency port is as defeated when using
Enter, prevention at radio-frequency port is as output.
Second road put-through channel is output to third through the 4th bandpass filter 4020 that overfrequency is 400MHz~6GHz and penetrates
Frequency switch 4111 (HMC641LP4E).
Third road high frequency down coversion channel, input frequency gates when being 6GHz~20GHz, by the second bandpass filter
4014 and second controllable-gain circuit 4016 handle after, with receive frequency conversion local oscillator synthesis unit 302 generate frequency be 10GHz~
The down coversion local oscillation signal of 20GHz, generating frequency range after down-conversion mixer 4018 (HMC773LC3B) mixing is
The carrier (boc) modulated signals of 400MHz~6GHz are output to third RF switch 4111 by the 5th bandpass filter 4021
(HMC641LP4E)；Wherein, the down coversion local oscillator combiner circuit of frequency conversion local oscillator synthesis unit 302, including the second phaselocked loop are received
Frequency synthesis chip 3025 (ADF4355), the second integrated VCO chip 3026 (HMC833LP6GE) and centre frequency are 2GHz
The 7th bandpass filter 3027, radio frequency/local oscillator frequency range be 6GHz~26GHz, intermediate frequency output be DC~8GHz.
Reception demodulating unit 41 in rf receiver unit 4, by third RF switch 4111 (HMC641LP4E) output
Intermediate-freuqncy signal and the local oscillation signal for receiving the demodulation output of local oscillator synthesis unit 303 pass through the first quadrature demodulator 4112
(ADL5380) it carries out demodulation and generates analog differential baseband signal, and high speed is carried out by two-way ADC chip 4113 (ADS5402)
Analog-to-digital conversion generates digital baseband signal；Wherein, receiving solution and being mixed into local oscillator unit 303 includes phaselocked loop synthesis chip 3031
(ADF4355), third integrated VCO chip 3032 (HMC833LP6GE), the 7th bandpass filter 3033.
The digital quadrature baseband signal of acquisition the digital signals such as is extracted, filters, parses by digital signal processing unit 6
Processing result is interacted into output as a result, as shown in Figure 3, Figure 4 with main control unit 1 after processing.
Radio-frequency receiving-transmitting two-way integral integration module works in emission state, 7 pairs of radio-frequency receiving-transmitting control unit every ginsengs
Number is configured, and carries out gating control to frequency range, as shown in Figure 5.
Digital signal processing unit 6 requires to generate digital differential digital orthogonal baseband signal according to the parameter configuration of main control unit 1.
Transmitting modulation unit 51 in rf transmitter unit 5 will be digital by high speed two-way DAC chip 5117 (AD9783)
Signal is converted to analog baseband signal, and sampling clock is by the high-speed DAC sampling clock synthesis unit in microwave synthesizer unit 3
314 generate comprising the 4th PLL frequency synthesizer 3141 (ADF4355), the 4th integrated VCO chip 3142
(HMC833LP6GE) and the first low-pass filter 3143.
Pass through the first low-pass filter by the analog baseband signal that high speed two-way DAC chip 5117 (AD9783) is converted
5114, the second low-pass filter 5115, the first amplitude conditioning circuit 5112 and the second amplitude conditioning circuit 5113 are output to second
Quadrature modulator 5111, and the orthogonal modulation generated with the transmitting modulation local oscillator synthesis unit 313 in microwave synthesizer unit 3
Local oscillator is synthetically produced 400MHz~6GHz carrier (boc) modulated signals；Wherein, transmitting modulation synthesis local oscillator unit 313 includes the 5th locking phase
Ring frequency synthesis chip 3131, the 5th integrated VCO chip 3132 and the 9th bandpass filter 3133.
Intermediate-freuqncy signal is output to the 4th RF switch 5019 (HMC641LP4E), needs to select according to reference frequency output
Output channel.First via low frequency down coversion channel, when output signal frequency is 30MHz~400MHz, signal passes through the tenth band logical
The down coversion sheet that subelement transmitting frequency conversion local oscillator synthesis unit 312 in filter 5016 and microwave synthesizer unit 3 generates
Shake frequency variation signal, generates 30MHz~400MHz carrier (boc) modulated signals by the first frequency mixer 5014 (HMC213AMS8E), is passing through
The 5th RF switch 5012 (HMC641LP4E) is output to after crossing third amplitude conditioning circuit 5013；Wherein, emit frequency conversion local oscillator
The down coversion local oscillation circuit of synthesis unit 312 is integrated including the 6th PLL frequency synthesizer 3125 (ADF4355), the 6th
VCO chip 3126 (HMC833LP6GE) and the 13rd bandpass filter 3127.
Second road put-through channel, when output signal frequency is 400MHz~6GHz, signal passes through the 11st bandpass filter
5017 and third amplitude conditioning circuit 5013 be output to the 5th RF switch 5012 (HMC641LP4E).
Third road high frequency up-conversion passage, when output signal frequency is 6GHz~20GHz, signal is filtered by the 12nd band logical
The up-conversion local oscillator generated after wave device 5018 with the subelement of microwave synthesizer unit 3 transmitting frequency conversion local oscillator synthesis unit 312
Frequency variation signal is output to the 5th radio frequency by the second frequency mixer 5015 (HMC773LC3B) mixing output 6GHz~20GHz signal and opens
Close 5012 (HMC641LP4E)；Wherein, the up-conversion local oscillation circuit for emitting frequency conversion local oscillator synthesis unit 312 includes the 7th phaselocked loop
Frequency synthesis chip 3121 (HMC702LP6CE (DC~14GHz), the 7th integrated VCO chip 3122 (HMC733LC3B) and the tenth
Four bandpass filters 3123.
Finally, signal realizes final ultra-broadband signal output by the 6th RF switch 5011 (HMC547LP3E), in handle
The port I/O is as output in use, the port is output to the first RF switch from the 6th RF switch 5011 (HMC547LP3E)
4011 (HMC547LP3E) simultaneously pass through the port I/O final output, as shown in Figure 3, Figure 4.
Certainly, the above description is not a limitation of the present invention, and the present invention is also not limited to the example above, this technology neck
The variations, modifications, additions or substitutions that the technical staff in domain is made within the essential scope of the present invention also should belong to of the invention
Protection scope.
Claims (10)
1. a kind of ultra wide band high bandwidth radio-frequency receiving-transmitting two-way integral integration module, it is characterised in that: including main control unit, power supply
Unit, microwave synthesizer unit, rf receiver unit, rf transmitter unit, digital signal processing unit and 8 road radio frequencies are received
Send out control unit；
Main control unit is configurable for realizing data interaction and processing；
Power supply unit is configurable for providing power supply for main control unit and microwave synthesizer unit；
Microwave synthesizer unit, including clock reference unit, microwave receiving frequency synthesis unit and Microwave emission frequency synthesis
Unit；
Clock reference unit is configurable for realizing External Reference switching in clock, reference clock synthesis；
Microwave receiving frequency synthesis unit, including high-speed ADC sampling clock synthesis unit, receive and frequency conversion local oscillator synthesis unit and connect
Receive demodulation local oscillator synthesis unit；
High-speed ADC sampling clock synthesis unit, including the 8th integrated PLL chip, the 8th integrated VCO chip and the 4th low-pass filtering
Device；The reference clock of clock reference unit is output to the 8th integrated PLL chip, the 8th integrated the 8th integrated VCO of PLL chip drives
Chip exports radiofrequency signal and generates high-speed ADC sampled clock signal by the 4th low-pass filter；
Frequency conversion local oscillator synthesis unit is received, including receives up-conversion local oscillator combiner circuit and receives down coversion local oscillator combiner circuit；
Receive up-conversion local oscillator combiner circuit, including the first integrated PLL chip, the first integrated VCO chip and the filter of the 6th band logical
Wave device；The reference clock of clock reference unit is output to the first integrated PLL chip, and the first integrated PLL chip drives first are integrated
VCO chip exports radiofrequency signal and generates up-conversion local oscillation signal by the 6th low-pass filter；
Receive down coversion local oscillator combiner circuit, including the second integrated PLL chip, the second integrated VCO chip and the filter of the 7th band logical
Wave device；The reference clock of clock reference unit is output to the second integrated PLL chip, and the second integrated PLL chip drives second are integrated
VCO chip exports radiofrequency signal and generates down coversion local oscillation signal by the 7th bandpass filter；
It receives solution and is mixed into local oscillator unit, including third integrates PLL chip, third integrated VCO chip and the 8th bandpass filtering
Device；The reference clock of clock reference unit is output to third and integrates PLL chip, and third integrates PLL chip drives third integrated VCO
Chip exports radiofrequency signal and generates reception demodulation local oscillation signal by the 8th bandpass filter；
Microwave emission frequency synthesis unit, including high-speed DAC sampling clock synthesis unit, transmitting frequency conversion local oscillator synthesis unit and hair
Penetrate modulation local oscillator synthesis unit；
High-speed DAC sampling clock synthesis unit, including the 4th integrated PLL chip, the 4th integrated VCO chip and the first low-pass filtering
Device；The reference clock of clock reference unit is output to the 4th integrated PLL chip, the 4th integrated the 4th integrated VCO of PLL chip drives
Chip exports radiofrequency signal and generates high-speed DAC sampled clock signal by the first bandpass filter；
Transmitting modulation local oscillator synthesis unit, including the 5th integrated PLL chip, the 5th integrated VCO chip and the 9th bandpass filter；
The reference clock of clock reference unit is output to the 5th integrated PLL chip, the 5th integrated the 5th integrated VCO core of PLL chip drives
Piece exports radiofrequency signal and generates transmitting modulation local oscillation signal by the 9th bandpass filter；
Emit frequency conversion local oscillator synthesis unit, including transmitting down coversion local oscillation circuit and transmitting up-conversion local oscillation circuit；
Emit down coversion local oscillation circuit, including the 6th integrated PLL chip, the 6th integrated VCO chip and the 13rd bandpass filter；
The reference clock of clock reference unit is output to the 6th integrated PLL chip, the 6th integrated the 6th integrated VCO core of PLL chip drives
Piece exports radiofrequency signal and generates transmitting down coversion local oscillation signal by the 13rd bandpass filter；
Emit up-conversion local oscillation circuit, including the 7th integrated PLL chip, the 7th integrated VCO chip and the 14th bandpass filter；
The reference clock of clock reference unit is output to the 7th integrated PLL chip, the 7th integrated the 7th integrated VCO core of PLL chip drives
Piece exports radiofrequency signal and generates transmitting up-conversion local oscillation signal by the 14th bandpass filter；
Rf transmitter unit, including transmitting frequency conversion conditioning unit and transmitting modulation unit；
Emit modulation unit, including two-way DAC chip, the second low-pass filter, third low-pass filter, the first amplitude conditioning electricity
Road, the second amplitude conditioning circuit and the second quadrature modulator；
Received digital signal is converted to analog baseband signal by high speed two-way DAC chip by transmitting modulation unit, when sampling
Clock is generated by the high-speed DAC sampling clock synthesis unit in microwave synthesizer unit, is converted by high speed two-way DAC chip
Analog baseband signal passes through the second low-pass filter, third low-pass filter, the first amplitude conditioning circuit and the conditioning of the second amplitude
Circuit output is to the second quadrature modulator, and the orthogonal modulation local oscillator generated with transmitting modulation local oscillator synthesis unit is synthetically produced
400MHz~6GHz carrier (boc) modulated signals；
Emit frequency conversion conditioning unit, including the 4th RF switch, the tenth bandpass filter, the 11st bandpass filter, the 12nd
Bandpass filter, the first frequency mixer, the second frequency mixer, third amplitude conditioning circuit, the 5th RF switch and the 6th RF switch；
Intermediate-freuqncy signal is output to the 4th RF switch, needs to select output channel according to reference frequency output；First via low frequency
Down coversion channel, when output signal frequency is 30MHz~400MHz, signal passes through the tenth bandpass filter and microwave synthesizer
The down coversion local oscillator frequency variation signal that subelement transmitting frequency conversion local oscillator synthesis unit in unit generates, is generated by the first frequency mixer
30MHz~400MHz carrier (boc) modulated signals are being output to the 5th RF switch after third amplitude conditioning circuit；
Second road put-through channel, when output signal frequency is 400MHz~6GHz, signal is by the 11st bandpass filter and the
Three amplitude conditioning circuits are output to the 5th RF switch；
Third road high frequency up-conversion passage, when output signal frequency is 6GHz~20GHz, signal passes through the tenth two band-pass filter
The up-conversion local oscillator frequency variation signal generated afterwards with the subelement of microwave synthesizer unit transmitting frequency conversion local oscillator synthesis unit passes through
Second frequency mixer mixing output 6GHz~20GHz signal is output to the 5th RF switch；
Finally, signal realizes final ultra-broadband signal output by the 6th RF switch, used using the port I/O as output
When, which is output to the first RF switch from the 6th RF switch and passes through the port I/O final output；
Rf receiver unit, including receive frequency conversion conditioning unit and receive demodulating unit；
Receive frequency conversion conditioning unit, including the filter of the first RF switch, the second RF switch, the first bandpass filter, the second band logical
Wave device, the first controllable-gain circuit, the second controllable-gain circuit, up-conversion mixer, down-conversion mixer, third bandpass filtering
Device, the 4th bandpass filter and the 5th bandpass filter；
The radiofrequency signal received is passed through the first RF switch switching I/O channel by reception frequency conversion conditioning unit first
Input channel is selected further according to input radio frequency signal frequency situation by the second RF switch, first via low frequency up-conversion passage,
Input frequency gates when being 30MHz~400MHz, after the first bandpass filter and the processing of the first controllable-gain circuit, and connects
The up-conversion local oscillation signal that the frequency that frequency conversion local oscillator synthesis unit generates is 2030MHz~2400MHz is received, is mixed by up-conversion
2GHz carrier (boc) modulated signals are generated after device mixing, are output to reception demodulating unit by the 4th bandpass filter；Second tunnel is straight-through
Channel is output to reception demodulating unit through the third bandpass filter that overfrequency is 400MHz~6GHz；Become under the high frequency of third road
Frequency channel, input frequency are gated when being 6GHz~20GHz, are handled by the second bandpass filter and the second controllable-gain circuit
Afterwards, the down coversion local oscillation signal for being 10GHz~20GHz with the frequency for receiving the generation of frequency conversion local oscillator synthesis unit, by down coversion
The carrier (boc) modulated signals that frequency range is 400MHz~6GHz are generated after frequency mixer mixing, are output to by the 5th bandpass filter
Receive demodulating unit；
Receive demodulating unit, including third RF switch, the first quadrature demodulator and two-way ADC chip；
Receive the intermediate-freuqncy signal and the local oscillator for receiving demodulation local oscillator synthesis unit output that demodulating unit exports third RF switch
Signal carries out demodulation by the first quadrature demodulator and generates analog differential baseband signal, and carries out high speed by two-way ADC chip
Analog-to-digital conversion generates digital baseband signal；
Digital signal processing unit, is divided into digital signal acquiring processing unit and processing unit occurs for digital signal；
Digital signal acquiring processing unit is configurable for carrying out the difference quadrature baseband signal that rf receiver unit generates
It extracts, the Digital Signal Processing including parsing；
Processing unit occurs for digital signal, is configurable for being configured according to the modulation of main control unit, frequency, bandwidth parameter
It generates and meets the numeric field difference quadrature baseband signal that transmitting modulation module requires；
Radio-frequency receiving-transmitting control unit, including FPGA and multichannel level control driving circuit；It is configurable for receiving multiple signals
Hair is configured, the parameter including realizing amplitude unidirectional including multichannel, two-way, different, frequency, signal bandwidth, signaling mode
It is configured；
When carrying out signal reception, radio-frequency receiving-transmitting control unit controls selected input number of signals and path and range parameter,
And the selection of signal frequency conversion access is carried out according to input signal frequency range, and be transferred to and receive frequency conversion conditioning unit, receive frequency conversion
Input signal conditioning to quadrature demodulator radio frequency signal frequency range, and is transferred to radio demodulating unit by conditioning unit, described
Carrier (boc) modulated signals are demodulated into digital orthogonal baseband signal by radio demodulating unit, then are adopted analog baseband signal by High Performance ADC
Sample is that digital baseband signal is output to digital signal processing unit；
When carrying out signal transmitting, radio-frequency receiving-transmitting control unit controls selected input number of signals and path and range parameter,
The base band signal transmission that digital signal processing unit is generated is to transmitting modulation unit, and transmitting modulation unit is to baseband signal progress
Local oscillator modulation generate radio-frequency carrier modulated signal simultaneously be output to transmitting frequency conversion conditioning unit, transmitting frequency conversion conditioning unit to signal into
Row frequency conversion covers the frequency range of 30MHz~20GHz, and carries out signal condition, realizes signal output.
2. ultra wide band high bandwidth radio-frequency receiving-transmitting two-way integral integration module according to claim 1, it is characterised in that: main
Control unit and microwave synthesizer unit, rf transmitter unit, rf receiver unit, digital signal processing unit, radio-frequency receiving-transmitting
Data and address interconnection are carried out using pci bus between control unit, high-speed DAC, ADC and FPGA are connect using high-speed-differential LVDS
Cause for gossip now interconnects.
3. ultra wide band high bandwidth radio-frequency receiving-transmitting two-way integral integration module according to claim 1, it is characterised in that: when
Clock reference unit generates the homologous clock signal in 12 tunnels using ADCLK954 clock buffer driver.
4. ultra wide band high bandwidth radio-frequency receiving-transmitting two-way integral integration module according to claim 1, it is characterised in that: high
Fast ADC sampling clock synthesis unit uses the working method of Variable sampling clock, guarantees that work clock is that real data handles clock
2 index multiple proportion, using ADF4355 PLL frequency synthesizer generate 1GHz sampling clock, using ADS5400 high
Fast modulus conversion chip carries out analog signal sampling.
5. ultra wide band high bandwidth radio-frequency receiving-transmitting two-way integral integration module according to claim 1, it is characterised in that: connect
It receives frequency conversion local oscillator synthesis unit and transmitting frequency conversion local oscillator synthesis unit is synthesized using ADF4355 PLL frequency synthesizer
2030MHz~2400MHz low frequency local oscillation signal, use PLL chip HMC702LP6CE and integrated VCO chip HMC733LC4B with
And two divided-frequency chip UXM15P constitutes phase-locked loop circuit and generates 10GHz~20GHz high-frequency local oscillation signal.
6. ultra wide band high bandwidth radio-frequency receiving-transmitting two-way integral integration module according to claim 1, it is characterised in that: connect
It receives demodulation local oscillator synthesis unit and transmitting modulation local oscillator synthesis unit is all made of ADF4355 PLL frequency synthesizer.
7. ultra wide band high bandwidth radio-frequency receiving-transmitting two-way integral integration module according to claim 1, it is characterised in that: high
Fast DAC sampling clock synthesis unit is generated using ADF4355 PLL frequency synthesizer and difference 1.2GHz reconfigurable filter
High speed sampling clock carries out digital-to-analogue conversion using AD9736 high-speed digital-analog conversion chip.
8. ultra wide band high bandwidth radio-frequency receiving-transmitting two-way integral integration module according to claim 1, it is characterised in that: connect
It receives frequency conversion conditioning unit and uses ADL5380 differential orthogonal demodulation device, transmitting frequency conversion conditioning unit uses ADL5375 difference quadrature tune
Device processed, the low frequency mixting circuit for receiving frequency conversion conditioning unit and transmitting frequency conversion conditioning unit are all made of HMC213AMS8E frequency mixer,
High frequency mixting circuit is all made of HMC773LC3B frequency mixer.
9. ultra wide band high bandwidth radio-frequency receiving-transmitting two-way integral integration module according to claim 1, it is characterised in that: number
Word signal processing unit is carried out using High Performance FPGA XC7K325T-2FFG900I and storage chip PC28F00AP30TF
High-speed digital video camera.
10. ultra wide band high bandwidth radio-frequency receiving-transmitting two-way integral integration module according to claim 1, it is characterised in that:
Radio-frequency receiving-transmitting control unit uses fpga chip XC6SLX100-2FGG484I and storage chip XCF32PVOG48I.
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| CN108649994A (en) * | 2018-06-07 | 2018-10-12 | 贵州航天天马机电科技有限公司 | A kind of triple channel radio-frequency receiving-transmitting shares frequency-hopping communication system and application method |
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| CN111308906A (en) * | 2019-11-01 | 2020-06-19 | 北京航空航天大学 | General hardware platform for satellite navigation system simulation |
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