CN107765483B - Display panel and display device using same - Google Patents
Display panel and display device using same Download PDFInfo
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- CN107765483B CN107765483B CN201711016871.2A CN201711016871A CN107765483B CN 107765483 B CN107765483 B CN 107765483B CN 201711016871 A CN201711016871 A CN 201711016871A CN 107765483 B CN107765483 B CN 107765483B
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/124—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/1345—Conductors connecting electrodes to cell terminals
- G02F1/13452—Conductors connecting driver circuitry and terminals of panels
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49838—Geometry or layout
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2300/00—Aspects of the constitution of display devices
- G09G2300/04—Structural and physical details of display devices
- G09G2300/0421—Structural details of the set of electrodes
- G09G2300/0426—Layout of electrodes and connections
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
- G09G3/3611—Control of matrices with row and column drivers
- G09G3/3674—Details of drivers for scan electrodes
- G09G3/3677—Details of drivers for scan electrodes suitable for active matrices only
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
- G09G3/3611—Control of matrices with row and column drivers
- G09G3/3685—Details of drivers for data electrodes
- G09G3/3688—Details of drivers for data electrodes suitable for active matrices only
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/4985—Flexible insulating substrates
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/10—OLED displays
- H10K59/12—Active-matrix OLED [AMOLED] displays
- H10K59/131—Interconnections, e.g. wiring lines or terminals
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- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Power Engineering (AREA)
- Engineering & Computer Science (AREA)
- Nonlinear Science (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Optics & Photonics (AREA)
- Crystallography & Structural Chemistry (AREA)
- Chemical & Material Sciences (AREA)
- Mathematical Physics (AREA)
- Geometry (AREA)
- Devices For Indicating Variable Information By Combining Individual Elements (AREA)
- Liquid Crystal (AREA)
- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
Abstract
The invention relates to a display panel and a display device using the same, wherein the display panel comprises: a first substrate having a display area and a wiring area, the display area having a plurality of active switches and a plurality of pixel units, the pixel units being coupled to the active switches, respectively; a second substrate disposed opposite to the first substrate; the first driving line segment is arranged in the wiring area of the first substrate and comprises a plurality of first circuit pins; the second driving line segment is arranged in the wiring area of the first substrate and comprises a plurality of second circuit pins; the first lead unit is used for being connected with the first circuit pins respectively; the virtual position connecting unit is used for respectively connecting the second circuit pins; the first driving line segment is arranged around the second driving line segment, and the first lead unit is connected with the virtual lead unit, so that the second driving line segment is electrically coupled to the first driving line segment to form a parallel circuit.
Description
Technical Field
The present invention relates to a circuit structure of a display, and more particularly, to an array circuit of a display panel and a display device using the same.
Background
Liquid Crystal Displays (LCDs) have been widely used recently, and have advantages of low power consumption, light weight, and low voltage driving with the improvement of driving technology, and are widely used in video recorders, notebook computers, desktop displays, and various projection devices.
When a TFT-LCD (active switching-liquid crystal display) panel normally displays, a Gate Driver (Gate Driver) is combined with a Gate line (Gate line), a Source Driver (Source Driver) is combined with a Data line (Data line), and a common electrode (color film common electrode, CF com) and a storage electrode for a color filter substrate are required. Wherein pixel electrode signals are supplied from data lines after being turned on by active Switches (TFTs). The storage electrode signal is supplied from an array common line (AA Com) at the periphery of the effective display area to form a storage capacitor (Cst) with the pixel electrode. The color filter substrate is supplied with a color filter common electrode signal by a common voltage line of an Array line (Wire On Array, WOA) of the Array substrate, and a liquid crystal capacitor (Clc) is formed between the color filter common electrode and the pixel electrode.
In order to save cost, the gate driving circuit, the gate lines, the data lines, and other circuits are often fabricated On the same display substrate, and then the display substrate is connected to a Chip On Film (COF) for transmitting gate driving signals by using an array line. Generally, the array circuit includes: a-type wiring for providing common voltage for the color filter substrate; b-type wiring for providing power driving signals for the chip; and C-type wiring for providing working signals for the chip. However, the signals of the gate lines are transmitted to the Chip (Chip) and the Integrated Circuit (IC) of each level layer by layer through the array lines, so the power driving signals provided to the Chip/IC through the B-type wires cannot be distorted seriously, and the resistance of the B-type wires of the Chip/IC needs to be reduced in design.
However, as the narrow frame of the display panel is narrower and narrower, the space of the array circuit is also smaller and smaller, which also causes the wiring space of the driving wires of the chips/integrated circuits to be smaller and smaller, the wires are not only thinner and longer, and the corresponding impedance value is larger. Not only causes serious distortion of the driving signal, but also affects the display uniformity of the display panel.
Disclosure of Invention
In order to solve the above technical problems, an object of the present invention is to provide a line Array circuit structure, which can reduce the resistance of the B-type wires of the Array lines (Wire-On-Array; WOA) in the narrow frame, thereby improving the product quality, and improving the reliability and the service life of the product.
The purpose of the invention and the technical problem to be solved are realized by adopting the following technical scheme. The display panel provided by the invention comprises: a first substrate having a display area and a wiring area, wherein a plurality of active switches and a plurality of pixel units are disposed in the display area of the first substrate, and the pixel units are respectively coupled to the active switches; a second substrate disposed opposite to the first substrate; the first driving line segment is arranged in the wiring area of the first substrate and comprises a plurality of first circuit pins; the second driving line segment is arranged in the wiring area of the first substrate and comprises a plurality of second circuit pins; the first lead unit is used for being connected with the first circuit pins respectively; the virtual position connecting unit is used for respectively connecting the second circuit pins; the first drive line segment is arranged around the periphery of the second drive line segment, and the first lead unit is connected with the virtual lead unit so that the second drive line segment is electrically coupled to the first drive line segment to form a parallel circuit; the first lead unit is arranged in a single-layer metal wiring mode or a double-layer metal wiring mode.
The technical problem of the invention can be further solved by adopting the following technical measures.
In an embodiment of the invention, the first lead unit is disposed in a single-layer metal wiring manner or a double-layer metal wiring manner.
In an embodiment of the invention, the dummy bit connection unit is disposed in a single-layer metal wiring manner or a double-layer metal wiring manner.
In an embodiment of the invention, the display device further includes a third driving line segment, and the third driving line segment is electrically coupled to the plurality of dummy connecting units and the first connecting unit, respectively.
In an embodiment of the invention, the third driving line segment is disposed in a single-layer metal wiring manner or a double-layer metal wiring manner.
In an embodiment of the invention, the first circuit pins are connected to a driving chip.
In an embodiment of the invention, the driving chip is a source driving chip.
In an embodiment of the invention, the driving chip is a gate driving chip.
Another object of the present invention is a display panel, comprising: a first substrate having a display area and a wiring area, wherein a plurality of active switches and a plurality of pixel units are disposed in the display area of the first substrate, and the pixel units are respectively coupled to the active switches; a second substrate disposed opposite to the first substrate; the first driving line segment is arranged in the wiring area of the first substrate and comprises a plurality of first circuit pins; the second driving line segment is arranged in the wiring area of the first substrate and comprises a plurality of second circuit pins; the first lead unit is used for being connected with the first circuit pins respectively; the virtual position connecting unit is used for respectively connecting the second circuit pins; the first driving line segment is arranged around the second driving line segment; the plurality of first circuit pins and the plurality of circuit pins extend towards the edge of the first substrate in the same direction; the first lead connecting unit is electrically coupled with the virtual position lead connecting unit so as to enable the first driving line segment and the second driving line segment to form a parallel circuit; the edge of the second substrate is positioned between the first driving line segment and the first lead connecting unit and between the second driving line segment and the virtual lead connecting unit; the first driving line segment further comprises a first alignment mark, and the first alignment mark is used for connecting the first circuit pin; the second driving line segment further comprises a second alignment mark, and the second alignment mark is used for connecting the second circuit pin; the edge of the second driving line segment is provided with an active switch array; the first lead unit and the virtual position driving line segment are electrically coupled with the first driving line segment in a single-layer or double-layer metal layer wiring mode.
Still another object of the present invention is a display device comprising: a control unit and a display panel, comprising: a first substrate having a display area and a wiring area, wherein a plurality of active switches and a plurality of pixel units are disposed in the display area of the first substrate, and the pixel units are respectively coupled to the active switches; a second substrate disposed opposite to the first substrate; the first driving line segment is arranged in the wiring area of the first substrate and comprises a plurality of first circuit pins; the second driving line segment is arranged in the wiring area of the first substrate and comprises a plurality of second circuit pins; the first lead unit is used for being connected with the first circuit pins respectively; the virtual position connecting unit is used for respectively connecting the second circuit pins; the first driving line segment is arranged around the second driving line segment, and the first lead unit is connected with the virtual lead unit, so that the second driving line segment is electrically coupled to the first driving line segment to form a parallel circuit.
The invention can reduce the resistance of B-type wires of the WOA in the narrow frame, thereby improving the product quality, the reliability of the product and the service life.
Drawings
FIG. 1a is a schematic diagram of an exemplary display device architecture.
FIG. 1b is a schematic diagram of exemplary trace routing of a circuit array.
Fig. 1c is a schematic diagram of exemplary type B traces in a circuit array.
Fig. 2 is a schematic diagram illustrating a design of a display panel with class B traces matching with flexible circuit board traces according to an embodiment of the present invention.
Fig. 3a is a schematic diagram illustrating a design of a class B trace of a display panel matching with a flexible circuit board trace according to an embodiment of the present invention.
Fig. 3B is a schematic diagram illustrating a design of a class B trace of a display panel matching with a flexible circuit board trace according to an embodiment of the present invention.
Fig. 4 is a schematic diagram illustrating a design of a display panel with class B traces matching with flexible circuit board traces according to an embodiment of the present invention.
Fig. 5 is a schematic diagram illustrating a design of a display panel with class B traces matching with flexible circuit board traces according to an embodiment of the present invention.
Fig. 6 is a schematic diagram illustrating a design of a display panel with class B traces matching with flexible circuit board traces according to an embodiment of the present invention.
Fig. 7 is a schematic diagram illustrating a design of a display panel with class B traces matching with flexible circuit board traces according to an embodiment of the present invention.
Fig. 8 is a schematic diagram illustrating a design of a display panel with class B traces matching with flexible circuit board traces according to an embodiment of the present invention.
FIG. 9 is a block diagram illustrating an architecture of a display device according to an embodiment of the present invention.
Detailed Description
The following description of the embodiments refers to the accompanying drawings for illustrating the specific embodiments in which the invention may be practiced. In the present invention, directional terms such as "up", "down", "front", "back", "left", "right", "inner", "outer", "side", etc. refer to directions of the attached drawings. Accordingly, the directional terms used are used for explanation and understanding of the present invention, and are not used for limiting the present invention.
The drawings and description are to be regarded as illustrative in nature, and not as restrictive. In the drawings, elements having similar structures are denoted by the same reference numerals. In addition, the size and thickness of each component shown in the drawings are arbitrarily illustrated for understanding and ease of description, but the present invention is not limited thereto.
In the drawings, the thickness of layers, films, panels, regions, etc. are exaggerated for clarity. In the drawings, the thickness of some layers and regions are exaggerated for understanding and convenience of description. It will be understood that when an element such as a layer, film, region or substrate is referred to as being "on" another element, it can be directly on the other element or intervening elements may also be present.
In addition, in the description, unless explicitly described to the contrary, the word "comprise" will be understood to mean that the recited components are included, but not to exclude any other components. Further, in the specification, "on.
To further illustrate the technical means and effects of the present invention adopted to achieve the predetermined objects, the following detailed description of the display panel and the display device using the same according to the present invention will be provided with reference to the accompanying drawings and preferred embodiments.
FIG. 1a is a schematic diagram of an exemplary display device architecture. Referring to fig. 1a, a display device 200 includes: a control board 100, the control board 100 including a Timing Controller (TCON) 101; a printed circuit board 103 connected to the control board 100 through a Flexible Flat Cable (FFC) 102; the source driving unit 104 and the gate driving unit 105 are disposed in the wiring region 109 and connected to the source line 104a and the gate line 105a in the display region 106, respectively. In some embodiments, the gate driving unit 105 and the source driving unit 104 include, but are not limited to, a flip-chip.
The driving method of the display device 200 includes: the system board provides color (e.g., R/G/B) compression signals, control signals and power to the control board 100. After the Timing Controller (TCON) 101 on the control board 100 processes these signals, the signals are transmitted to the gate driving unit 105 and the source driving unit 104 of the printed circuit board 103 together with the power processed by the driving circuit through the Flexible Flat Cable (FFC) 102, and the gate driving unit 105 and the source driving unit 104 transmit necessary data and power to the display area 106, so that the display device 200 obtains the power and signals required for displaying the picture.
FIG. 1b is a diagram illustrating exemplary traces of a circuit array of a display panel. Please refer to fig. 1a for understanding. In some embodiments, the gate driving units (104, 105), the gate lines 105a, and the data lines 105b are fabricated on the same display substrate, and the array lines 120 are used to connect the display substrate with the driving units (104, 105) for transmitting driving signals. In general, the array circuit 120 includes: a class a trace 120a transmitting a common voltage; a B-type wire 120B for providing a power driving signal to the chip; and a class C trace 120C for providing an operating signal to the chip.
FIG. 1c is a schematic diagram of exemplary type B traces of a display panel. Referring to fig. 1c, an exemplary array circuit structure (B-type trace 120B) of a display panel is shown, which has a plurality of driving line segments (B-type trace 120B), each of which includes a plurality of circuit pins and a plurality of lead units.
However, the signals of the gate lines 105a are transmitted to the Chip (Chip) and the Integrated Circuit (IC) of the gate driving units 105 of each level layer by layer through the array lines 120, so that the power driving signals provided to the Chip/IC through the B-type traces 120B cannot be distorted seriously. However, in practical applications, due to the existing impedance of the array traces 120 between the Gate driving units 105 (e.g., Gate to Gate, G-G), the longer the array traces 120, the larger the corresponding impedance value, which indicates the signal ramp and amplitude. Therefore, the resistance of the B-type trace 120B of these chips/ics needs to be reduced in design.
Fig. 2 is a schematic view of a type B trace in a display panel according to an embodiment of the invention. Referring to fig. 2, in an embodiment of the present invention, a display panel 12 includes: a first substrate (not shown) having a display area and a wiring area, wherein a plurality of active switches and a plurality of pixel units are disposed in the display area of the first substrate, and the pixel units are respectively coupled to the active switches; (ii) a A second substrate (not shown) disposed opposite to the first substrate; a first driving line segment 121 disposed in the wiring region of the first substrate, the first driving line segment 121 having a plurality of first circuit pins (121a, 121 b); a second driving line segment 122 disposed in the wiring region of the first substrate, the second driving line segment 122 having a plurality of second circuit pins (122a, 122 b); a first lead unit 151 respectively connected to the first circuit pins (121a, 121 b); a dummy bit connection unit 153 connected to the second circuit pins (122a, 122 b); the first driving line segment 121 is disposed around the second driving line segment 122, and the first lead unit 151 is connected to the dummy lead unit 153, so that the second driving line segment 122 is electrically coupled to the first driving line segment 121 to form a parallel circuit.
In one embodiment, the first driving line segment 121 further includes a first alignment mark (not shown) for connecting the first circuit pins (121a, 121 b).
In one embodiment, the second driving line segment 122 further includes a second alignment mark (not shown) for connecting the second circuit pin (122a, 122 b).
In one embodiment, the first alignment mark is made of a material selected from the group consisting of aluminum, molybdenum, chromium, and alloys thereof.
In one embodiment, the second alignment mark is made of a material selected from the group consisting of aluminum, molybdenum, chromium, and alloys thereof.
In one embodiment, the edges of the second circuit pins (122a, 122b) have an active switch array.
In one embodiment, the first circuit pins (121a, 121b) are connected to a driving chip (160, fig. 5).
In one embodiment, the driving chip 160 is a source driving chip.
In one embodiment, the driving chip 160 is a gate driving chip.
In one embodiment, the first lead unit 151 is disposed in a single-layer metal wiring manner or a double-layer metal wiring manner.
In one embodiment, the dummy bit connecting unit 153 is disposed in a single-layer metal wiring manner or a double-layer metal wiring manner.
In an embodiment, the device further includes a third driving line segment (123, fig. 3a), and the third driving line segment 123 is electrically coupled to the plurality of dummy bit connection units and the first connection unit, respectively.
In one embodiment, the third driving line segment 123 is disposed in a single-layer metal wiring manner or a double-layer metal wiring manner.
The single-layer metal wiring mode can avoid the influence of the outer frame or air to the maximum extent when a display panel normally displays. The double-layer metal wiring mode can reduce the resistance value of the circuit array to the maximum extent.
In an embodiment of the present application, a display panel includes: a first substrate (not shown) on which the active switches and the pixel units are disposed; a second substrate (not shown) disposed opposite to the first substrate; a first driving line segment 121 having a plurality of first circuit pins 121a and 121 b; a second driving line segment 122 having a plurality of second circuit pins 122a and 122 b; a first lead unit 151 for connecting the first circuit pins 121a and 121b and the second circuit pins 122a and 122b, respectively; and a dummy bit connection unit 153 for connecting the second circuit pins 122a and 122b and the second driving line segment 122, respectively; the first driving line segment 121 and the second driving line segment 153 are disposed in a wiring area of the first substrate, and the first connecting unit 151 is electrically coupled to the dummy connecting unit 153, so that the first driving line segment 121 and the second driving line segment 122 form a parallel circuit; the second substrate edge is located between the first driving line segment 121 and the first lead connecting unit 151 and between the second driving line segment 122 and the dummy lead connecting unit 153; the first driving line segment 121 further includes a first alignment mark, and the first alignment mark is used to connect the first circuit pins 121a and 121 b; the second driving line segment 122 further includes a second alignment mark, and the second alignment mark is used to connect the second circuit pins 122a and 122 b; the edge of the second driving line segment 122 has an active switch array; the first lead unit 151 and the dummy bit driving line segment 153 are electrically coupled to the first driving line segment 121 by a single-layer or double-layer metal layer wiring method.
Fig. 3a is a schematic diagram illustrating a design of a class B trace of a display panel matching with a flexible circuit board trace according to an embodiment of the present invention. In an embodiment of the present application, a display panel includes: the display device comprises a first substrate and a second substrate, wherein the first substrate comprises a display area and a wiring area on the periphery of the display area, a plurality of active switches and a plurality of pixel units are arranged in the display area of the first substrate, and the pixel units are respectively coupled with the active switches; a second substrate (not shown) disposed opposite to the first substrate; the first driving line segment 121 and the third driving line segment 123 are disposed in the wiring area; the third driving line segment 123 and the circuit pins of the first driving line segment 121 are disposed in opposite directions; the third driving line segments 123 are respectively connected to the first lead units 151 to electrically couple to the first driving line segments 121.
Fig. 3B is a schematic diagram illustrating a design of a class B trace of a display panel matching with a flexible circuit board trace according to an embodiment of the present invention. In an embodiment of the present application, a display panel includes: a first substrate (not shown) on which active switches and pixel units are disposed; a second substrate (not shown) disposed opposite to the first substrate; the first driving line segment 121 and the third driving line segment 123 are disposed in the wiring area; the third driving line segment 123 and the circuit pins of the first driving line segment 121 are disposed in opposite directions; the first connecting unit 151 is connected to the first driving line segment 121; a dummy bit connecting unit 153 connected to the third driving line segment 123; the first connecting unit 151 is connected to the dummy connecting unit 153, so that the third driving line segment 123 is electrically coupled to the first driving line segment 121.
Fig. 4 is a schematic diagram illustrating a design of a display panel with class B traces matching with flexible circuit board traces according to an embodiment of the present invention. In an embodiment of the present application, a display panel includes: the display device comprises a first substrate and a second substrate, wherein the first substrate comprises a display area and a wiring area on the periphery of the display area, a plurality of active switches and a plurality of pixel units are arranged in the display area of the first substrate, and the pixel units are respectively coupled with the active switches; the first driving line segment 121 and the second driving line segment 122 are disposed in the wiring area; the third driving line segment 123 is electrically coupled to the dummy lead units 153 and the first lead unit 151, respectively, and the first driving line segment 121 is electrically coupled to the first lead unit 151, respectively; the second driving line segments 122 are electrically coupled to the dummy bit connection units 153, respectively, to form a parallel circuit with the first driving line segments 121.
In some embodiments, the third driving line segment 123, the first lead unit 151 and the dummy bit lead unit 153 are disposed in a single-layer metal wiring manner or a double-layer metal wiring manner.
Fig. 5 is a schematic diagram illustrating a design of a display panel with class B traces matching with flexible circuit board traces according to an embodiment of the present invention. In an embodiment of the present application, a display panel includes: the display device comprises a first substrate and a second substrate, wherein the first substrate comprises a display area and a wiring area on the periphery of the display area, a plurality of active switches and a plurality of pixel units are arranged in the display area of the first substrate, and the pixel units are respectively coupled with the active switches; a second substrate disposed opposite to the first substrate; a first driving line segment 121 and a fourth driving line segment 124 disposed in the wiring region of the first substrate; a flexible circuit board 140 having a first circuit 141, wherein the first circuit 141 is electrically coupled to the first driving line segment 121 and the fourth driving line segment 124; the flexible circuit board 140 includes a second circuit 142, and the second circuit 142 is connected to the first circuit 141 in parallel to form a parallel circuit. Thus, the parallel line is used as an extension line of the first driving line segment 121 and the fourth driving line segment 124, so as to expand the line width and area of the three, and the parallel impedance principle of the parallel line can relatively assist in reducing the resistance of the driving line segment.
In some embodiments, the flexible circuit board 140 is a flexible printed circuit film or a flexible printed circuit board.
In some embodiments, the second circuit 142 is electrically coupled to a plurality of dummy bit connection units 153 and the first connection unit 151, respectively.
Fig. 6 is a schematic diagram illustrating a design of a display panel with class B traces matching with flexible circuit board traces according to an embodiment of the present invention. In an embodiment of the present application, a display panel includes: the display device comprises a first substrate and a second substrate, wherein the first substrate comprises a display area and a wiring area on the periphery of the display area, a plurality of active switches and a plurality of pixel units are arranged in the display area of the first substrate, and the pixel units are respectively coupled with the active switches; a second substrate disposed opposite to the first substrate; a first driving line segment 121, a third driving line segment 123 and a fourth driving line segment 124 disposed in the wiring area of the first substrate; a first connecting unit 151 for connecting the first driving line segment 121 and the third driving line segment 123; a flexible circuit board 140 having a first circuit 141 and a second circuit 142; the first driving line segment 121 and the fourth driving line segment 124 are electrically coupled through the first circuit 141; the second line 142 is connected in parallel with the first line 141 to form a parallel line.
Fig. 7 is a schematic diagram illustrating a design of a display panel with class B traces matching with flexible circuit board traces according to an embodiment of the present invention. In an embodiment of the present application, a display panel includes: the display device comprises a first substrate and a second substrate, wherein the first substrate comprises a display area and a wiring area on the periphery of the display area, a plurality of active switches and a plurality of pixel units are arranged in the display area of the first substrate, and the pixel units are respectively coupled with the active switches; a first driving line segment 121, a second driving line segment 122 and a fourth driving line segment 124 disposed in the wiring area of the first substrate; a flexible circuit board 140 having a first circuit 141 and a second circuit 142, wherein the second circuit 142 is connected in parallel with the first circuit 141 to form a parallel circuit; a first connection unit 151 electrically coupling the first driving line segment 121 and the fourth driving line segment 124 to a plurality of dummy connection units 153; the second driving line segment 122 is electrically coupled to the dummy connecting units 153 respectively, so as to form a parallel circuit with the first driving line segment 121 and the fourth driving line segment 124 respectively.
Fig. 8 is a schematic diagram illustrating a design of a display panel with class B traces matching with flexible circuit board traces according to an embodiment of the present invention. In an embodiment of the present application, a display panel includes: the display device comprises a first substrate and a second substrate, wherein the first substrate comprises a display area and a wiring area on the periphery of the display area, a plurality of active switches and a plurality of pixel units are arranged in the display area of the first substrate, and the pixel units are respectively coupled with the active switches; the first driving line segment 121 and the fourth driving line segment 124 are disposed in the routing area; a flexible circuit board 140 having a first circuit 141 and a second circuit 142, wherein the second circuit 142 is connected in parallel with the first circuit 141 to form a parallel circuit; the first line 141 is connected to the first driving line segment 121 and the fourth driving line segment 124, respectively; the first driving line segment 121 and the fourth driving line segment 124 are electrically coupled to the third driving line segment 123 and the dummy lead unit 153 through the first lead unit 151, respectively, and the second driving line segment 122 is electrically coupled to the dummy lead units 153, respectively, so as to form a parallel circuit with the first driving line segment 121 and the fourth driving line segment 124, respectively; the third driving line segment 123 is disposed between the dummy lead units 153.
Referring to fig. 2 to 8, in an embodiment, a display device includes: the control component also comprises a display panel in each embodiment.
FIG. 9 is a block diagram illustrating an architecture of a display device according to an embodiment of the present invention. Referring to fig. 2 to fig. 8, in an embodiment, a display device 200 of the present application includes: a control unit 190 for transmitting the common voltage, the driving power and the working signal through the transmission line, wherein the control unit 190 includes, but is not limited to, the timing module, the source driving unit 104 and the gate driving unit 105; a display panel 201 including any one of the display panels in the foregoing embodiments.
In some embodiments, the display panel may be, for example, a liquid crystal display panel, but is not limited thereto, and may also be an OLED display panel, a W-OLED display panel, a QLED display panel, a plasma display panel, a curved display panel or other types of display panels.
The invention can reduce the resistance of B-type wires of the WOA in the narrow frame, thereby improving the product quality, the reliability of the product and the service life.
The terms "in some embodiments" and "in various embodiments" are used repeatedly. The terms generally do not refer to the same embodiment; but it may also refer to the same embodiment. The terms "comprising," "having," and "including" are synonymous, unless the context dictates otherwise.
Although the present invention has been described with reference to a preferred embodiment, it should be understood that various changes, substitutions and alterations can be made herein without departing from the spirit and scope of the invention as defined by the appended claims.
Claims (9)
1. A display panel, comprising:
a first substrate having a display area and a wiring area, wherein a plurality of active switches and a plurality of pixel units are disposed in the display area of the first substrate, and the pixel units are respectively coupled to the active switches;
a second substrate disposed opposite to the first substrate;
the first driving line segment is arranged in the wiring area of the first substrate and comprises a plurality of first circuit pins;
the second driving line segment is arranged in the wiring area of the first substrate and comprises a plurality of second circuit pins;
the first lead unit is used for being connected with the first circuit pins respectively;
the virtual position connecting unit is used for respectively connecting the second circuit pins;
the first drive line segment is arranged around the periphery of the second drive line segment, and the first lead unit is connected with the virtual lead unit so that the second drive line segment is electrically coupled to the first drive line segment to form a parallel circuit;
the first lead unit is arranged in a single-layer metal wiring mode or a double-layer metal wiring mode.
2. The display panel of claim 1, wherein the dummy bit cells are disposed in a single-layer metal wiring manner or a double-layer metal wiring manner.
3. The display panel of claim 1, further comprising a third driving line segment electrically coupled to the dummy connecting units and the first connecting unit, respectively.
4. The display panel according to claim 3, wherein the third driving line segment is disposed in a single-layer metal wiring manner or a double-layer metal wiring manner.
5. The display panel of claim 1, wherein the first circuit pins are connected to a driving chip.
6. The display panel according to claim 5, wherein the driving chip is a source driving chip.
7. The display panel according to claim 5, wherein the driving chip is a gate driving chip.
8. A display panel, comprising:
a first substrate having a display area and a wiring area, wherein a plurality of active switches and a plurality of pixel units are disposed in the display area of the first substrate, and the pixel units are respectively coupled to the active switches;
a second substrate disposed opposite to the first substrate;
the first driving line segment is arranged in the wiring area of the first substrate and comprises a plurality of first circuit pins;
the second driving line segment is arranged in the wiring area of the first substrate and comprises a plurality of second circuit pins;
the first lead unit is used for being connected with the first circuit pins respectively;
the virtual position connecting unit is used for respectively connecting the second circuit pins;
the first driving line segment is arranged around the second driving line segment; the plurality of first circuit pins and the plurality of second circuit pins extend towards the edge of the first substrate in the same direction; the first lead connecting unit is electrically coupled with the virtual position lead connecting unit so as to enable the first driving line segment and the second driving line segment to form a parallel circuit;
the edge of the second substrate is positioned between the first driving line segment and the first lead connecting unit and between the second driving line segment and the virtual lead connecting unit;
the first driving line segment further comprises a first alignment mark, and the first alignment mark is used for connecting the first circuit pin;
the second driving line segment further comprises a second alignment mark, and the second alignment mark is used for connecting the second circuit pin;
wherein, the edge of the second driving line segment is provided with an active switch array;
the first lead unit and the virtual lead unit are electrically coupled with the first driving line segment in a single-layer or double-layer metal layer wiring mode.
9. A display device, comprising: a control component; and
a display panel, comprising:
a first substrate having a display area and a wiring area, wherein a plurality of active switches and a plurality of pixel units are disposed in the display area of the first substrate, and the pixel units are respectively coupled to the active switches;
a second substrate disposed opposite to the first substrate;
the first driving line segment is arranged in the wiring area of the first substrate and comprises a plurality of first circuit pins;
the second driving line segment is arranged in the wiring area of the first substrate and comprises a plurality of second circuit pins;
the first lead unit is used for being connected with the first circuit pins respectively;
the virtual position connecting unit is used for respectively connecting the second circuit pins;
the first driving line segment is arranged around the second driving line segment, and the first lead unit is connected with the virtual lead unit, so that the second driving line segment is electrically coupled to the first driving line segment to form a parallel circuit.
Priority Applications (3)
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CN201711016871.2A CN107765483B (en) | 2017-10-26 | 2017-10-26 | Display panel and display device using same |
US16/758,167 US11532644B2 (en) | 2017-10-26 | 2017-12-13 | Display panel and display device applying the same |
PCT/CN2017/115850 WO2019080291A1 (en) | 2017-10-26 | 2017-12-13 | Display panel and display device applying same |
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CN201711016871.2A CN107765483B (en) | 2017-10-26 | 2017-10-26 | Display panel and display device using same |
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CN107765483A CN107765483A (en) | 2018-03-06 |
CN107765483B true CN107765483B (en) | 2021-02-09 |
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CN (1) | CN107765483B (en) |
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KR102528670B1 (en) * | 2018-07-12 | 2023-05-04 | 엘지전자 주식회사 | Display device |
CN111883569B (en) * | 2020-08-04 | 2023-05-26 | 京东方科技集团股份有限公司 | Display panel and display device |
WO2022133909A1 (en) * | 2020-12-24 | 2022-06-30 | 京东方科技集团股份有限公司 | Display panel and display device |
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JP3508837B2 (en) * | 1999-12-10 | 2004-03-22 | インターナショナル・ビジネス・マシーンズ・コーポレーション | Liquid crystal display device, liquid crystal controller, and video signal transmission method |
JP4731718B2 (en) * | 2001-04-27 | 2011-07-27 | 株式会社半導体エネルギー研究所 | Display device |
CN1243273C (en) * | 2002-09-17 | 2006-02-22 | 友达光电股份有限公司 | Display panel with improved electricity connection by by-pass wiring |
JP4133891B2 (en) * | 2004-03-25 | 2008-08-13 | 三菱電機株式会社 | Liquid crystal display device and manufacturing method thereof |
CN1805651A (en) * | 2004-11-25 | 2006-07-19 | 株式会社藤仓 | Compound wired circuit board |
KR101119729B1 (en) * | 2004-12-31 | 2012-03-26 | 엘지디스플레이 주식회사 | Liquid crystal display device |
CN1844977A (en) * | 2005-04-09 | 2006-10-11 | 群康科技(深圳)有限公司 | Liquid crystal display panel |
KR20070075583A (en) * | 2006-01-13 | 2007-07-24 | 삼성전자주식회사 | Liquid crystal display |
JP2007317861A (en) * | 2006-05-25 | 2007-12-06 | Nec Lcd Technologies Ltd | Multilayered printed board, and liquid crystal display |
KR101281867B1 (en) * | 2006-06-29 | 2013-07-03 | 엘지디스플레이 주식회사 | Liquid crystal display device |
JP4869807B2 (en) * | 2006-06-30 | 2012-02-08 | 株式会社 日立ディスプレイズ | Display device |
KR100968720B1 (en) * | 2007-06-29 | 2010-07-08 | 소니 주식회사 | Liquid crystal device and electronic apparatus |
CN101668386B (en) * | 2008-09-01 | 2011-06-29 | 胜华科技股份有限公司 | Pin wiring structure of card insertion end of flexible printed circuit board |
JP5500023B2 (en) * | 2009-12-03 | 2014-05-21 | セイコーエプソン株式会社 | ELECTRO-OPTICAL DEVICE, ELECTRO-OPTICAL PANEL, AND ELECTRONIC DEVICE |
JP5146477B2 (en) * | 2010-03-12 | 2013-02-20 | カシオ計算機株式会社 | Transistor array substrate and manufacturing method thereof |
KR101917168B1 (en) * | 2012-02-24 | 2018-11-09 | 엘지디스플레이 주식회사 | Display device and method for driving the same |
US20140085173A1 (en) * | 2012-09-27 | 2014-03-27 | Shenzhen China Star Optoelectronics Technology Co., Ltd | Driving circuit structure of liquid crystal panel |
TWI525378B (en) * | 2013-12-06 | 2016-03-11 | 友達光電股份有限公司 | Active device array substrate and display panel |
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CN104216182B (en) * | 2014-08-22 | 2017-03-01 | 京东方科技集团股份有限公司 | Array base palte and its manufacture method and display floater |
WO2016103370A1 (en) * | 2014-12-24 | 2016-06-30 | 堺ディスプレイプロダクト株式会社 | Display device and display-device manufacturing method |
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2017
- 2017-10-26 CN CN201711016871.2A patent/CN107765483B/en active Active
- 2017-12-13 US US16/758,167 patent/US11532644B2/en active Active
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US20210074733A1 (en) | 2021-03-11 |
US11532644B2 (en) | 2022-12-20 |
WO2019080291A1 (en) | 2019-05-02 |
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