CN107749395B - Wafer marking method - Google Patents
Wafer marking method Download PDFInfo
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- CN107749395B CN107749395B CN201711052509.0A CN201711052509A CN107749395B CN 107749395 B CN107749395 B CN 107749395B CN 201711052509 A CN201711052509 A CN 201711052509A CN 107749395 B CN107749395 B CN 107749395B
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- wafer
- marking
- metal layer
- bonding pad
- forming
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02002—Preparing wafers
- H01L21/02005—Preparing bulk and homogeneous wafers
- H01L21/02008—Multistep processes
- H01L21/0201—Specific process step
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/544—Marks applied to semiconductor devices or parts, e.g. registration marks, alignment structures, wafer maps
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2223/00—Details relating to semiconductor or other solid state devices covered by the group H01L23/00
- H01L2223/544—Marks applied to semiconductor devices or parts
- H01L2223/54406—Marks applied to semiconductor devices or parts comprising alphanumeric information
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Testing Or Measuring Of Semiconductors Or The Like (AREA)
- Laser Beam Processing (AREA)
Abstract
The invention discloses a method for marking a wafer, which belongs to the technical field of semiconductor manufacturing and is suitable for marking the wafer when the semiconductor manufacturing process is finished, and the method comprises the following steps: step S1, marking the wafer after the previous process and before forming the bonding pad on the wafer, and forming a marking pattern on the surface of the wafer; step S2, forming a pad structure on the wafer, so that the mark pattern is covered by a metal layer. The beneficial effects of the above technical scheme are: for the process of marking the wafer after the process is finished, the wafer is marked firstly, and then a bonding pad structure is formed on the wafer, so that a by-product caused by marking is covered by a metal layer in the bonding pad structure, the wafer is prevented from being scratched by the by-product in the process of cleaning the wafer, and the wafer is prevented from being scrapped.
Description
Technical Field
The invention relates to the technical field of semiconductor manufacturing, in particular to a wafer marking method.
Background
Marking of wafers is an indispensable step in the semiconductor manufacturing process, and the purpose of marking wafer IDs is mainly to facilitate tracking of wafers in subsequent testing and packaging processes. In a typical semiconductor manufacturing process, a wafer is marked at the beginning of the process or at the end of the process. In a special semiconductor process like a back-illuminated CMOS image sensor, marking of a wafer is performed at the end of the process, i.e., after forming bonding pads on the wafer.
The wafer is typically marked by laser marking a lot number (e.g., a1111) of the wafer directly above the wafer, wherein the lot number is formed by arranging a plurality of small holes. The marking is concave, and the marking by-product is accumulated around the concave pit to form a protrusion. For a conventional typical semiconductor process, after the wafer is electrically tested, the wafer can be tested and packaged without cleaning, so that by-products generated by marking have no influence on the wafer. However, for the backside illuminated CMOS image sensor process, there are processes such as optical filter and prism covering, so after the wafer completes the electrical test, a cleaning process is required, and the problems are: the byproducts accumulated beside the marking hole can fall off in the subsequent cleaning process, and the surfaces of the wafers are rubbed along with the cleaning action, so that the surfaces of the wafers are scratched, and the wafers are scrapped.
Disclosure of Invention
According to the problems in the prior art, a wafer marking method is provided, and the problem that a wafer is scrapped due to the fact that a by-product generated by wafer marking scratches the wafer in the wafer cleaning process in the prior art is solved. The invention adopts the following technical scheme:
a method of marking a wafer adapted for marking the wafer at the end of a semiconductor manufacturing process, the method comprising the steps of:
step S1, marking the wafer after the previous process and before forming the bonding pad on the wafer, and forming a marking pattern on the surface of the wafer;
step S2, forming a bonding pad on the wafer, so that the mark pattern is covered by a metal layer.
Preferably, in the wafer marking method, the marking is laser marking.
Preferably, in the method for marking a wafer, the laser energy range is 0.9W to 1.2W when the wafer is subjected to laser marking.
Preferably, in the method for marking a wafer, the laser marking time is 10S to 30S.
Preferably, in the wafer marking method, the metal layer is made of aluminum.
Preferably, in the method for marking a wafer, the thickness of the metal layer is 9000 angstroms to 15000 angstroms.
Preferably, in the method for marking a wafer, the depth of the marking pattern is 0.2 to 1.5 micrometers.
The beneficial effects of the above technical scheme are: for the process of marking the wafer after the process is finished, the wafer is marked firstly, and then a bonding pad is formed on the wafer, so that a by-product caused by marking is covered by a metal layer in the bonding pad, the wafer is prevented from being scratched by the by-product in the process of cleaning the wafer, and the wafer is prevented from being scrapped.
Drawings
FIG. 1 is a flow chart of a method of marking a wafer in accordance with a preferred embodiment of the present invention;
FIG. 2 is a diagram illustrating a state of a mark pattern after marking on a wafer according to a preferred embodiment of the present invention;
FIG. 3 is a diagram illustrating a state of a mark pattern after forming a pad on a wafer according to a preferred embodiment of the present invention.
Detailed Description
The invention is further described with reference to the following drawings and specific examples, which are not intended to be limiting.
In a preferred embodiment of the present invention, as shown in fig. 1, a method for marking a wafer is adapted to mark the wafer at the end of a semiconductor manufacturing process, the method comprising the steps of:
step S1, marking the wafer 1 after the previous process and before forming the bonding pad on the wafer 1, and forming a marking pattern on the surface of the wafer 1;
step S2, forming a bonding pad on the wafer 1, so that the mark pattern is covered by a metal layer 3.
In a preferred embodiment of the invention, the marking is laser marking.
In the prior art, a marking method for marking a wafer 1 at the end of a manufacturing process generally comprises the steps of marking the wafer 1 after a bonding pad is formed on the wafer 1, wherein the wafer 1 is marked by laser mostly by a laser generator which generates high-energy continuous laser beams, and when the laser acts on a printing material, atoms in a ground state transition to a higher-energy state; atoms in a higher energy state are unstable and will quickly return to a ground state, when the atoms return to the ground state, extra energy is released in the form of photons or quanta, and the light energy is converted into heat energy, so that the surface material is instantaneously melted and even gasified, and thus the graphic mark is formed, as shown in fig. 2, and a byproduct 2 is usually accumulated on the wafer 1 after marking is finished. For a special semiconductor process like a back-illuminated CMOS image sensor, after marking and electrical property testing, processes such as optical filters, prism covering and the like are carried out, so that the wafer 1 needs to be cleaned, a by-product 2 generated by marking in the cleaning process can fall off from the wafer 1, and then the wafer 1 is scratched, so that the wafer 1 is scrapped.
As shown in fig. 3, in the last part of the manufacturing process, after all manufacturing processes before forming the bonding pad on the wafer 1 are completed, marking is performed on the wafer 1 before forming the bonding pad on the wafer 1, so that the bonding pad is formed and the metal layer 3 is covered on the marked pattern, so that the byproduct 2 caused by the marking is covered in the metal layer 3, the byproduct 2 is prevented from falling off in the cleaning process of the wafer 1, and the wafer 1 is prevented from being scrapped due to scratching.
In a preferred embodiment of the present invention, the laser energy range is 0.9W to 1.2W when the wafer 1 is laser-marked.
In the preferred embodiment of the invention, the laser marking time is 10-30S.
Further, in a preferred embodiment of the present invention, the depth of the mark pattern is 0.2 to 1.5 μm.
In this embodiment, the specific parameters of the laser marking are set according to the specific semiconductor process.
In a preferred embodiment of the present invention, the material of the metal layer 3 is aluminum, i.e. the material is the same as that of the metal pad in the bonding pad. It should be noted that, in the embodiment of the present invention, a method for forming the q bonding pads on the wafer 1 is prior art, and is not described herein again.
In the preferred embodiment of the present invention, the thickness of the metal layer 3 is 9000 angstroms to 15000 angstroms, and the thickness of the metal layer 3 is much smaller than the depth of the mark pattern, so that the definition of the mark pattern is not affected after the mark pattern is covered with the metal layer 3.
While the invention has been described with reference to a preferred embodiment, it will be understood by those skilled in the art that various changes in form and detail may be made therein without departing from the spirit and scope of the invention.
Claims (7)
1. A method of marking a wafer adapted for marking the wafer at the end of a semiconductor manufacturing process, the method comprising the steps of:
step S1, marking the wafer after the previous process and before forming the bonding pad on the wafer, and forming a marking pattern on the surface of the wafer;
step S2, forming a bonding pad on the wafer, so that the mark pattern is covered by a metal layer.
2. Method for marking wafers as claimed in claim 1, characterized in that the marking is laser marking.
3. The method for marking a wafer as claimed in claim 2 wherein the laser energy ranges from 0.9W to 1.2W when the wafer is laser marked.
4. The method for marking wafers as recited in claim 2, wherein the laser marking time is 10S to 30S.
5. The wafer marking method as claimed in claim 1, wherein the metal layer is aluminum.
6. The method for marking wafers as recited in claim 1, wherein the metal layer has a thickness of 9000 angstroms to 15000 angstroms.
7. The method for marking wafers as recited in claim 1, wherein the marking pattern has a depth of 0.2 to 1.5 microns.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201711052509.0A CN107749395B (en) | 2017-10-30 | 2017-10-30 | Wafer marking method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201711052509.0A CN107749395B (en) | 2017-10-30 | 2017-10-30 | Wafer marking method |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN107749395A CN107749395A (en) | 2018-03-02 |
| CN107749395B true CN107749395B (en) | 2020-06-26 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201711052509.0A Active CN107749395B (en) | 2017-10-30 | 2017-10-30 | Wafer marking method |
Country Status (1)
| Country | Link |
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| CN (1) | CN107749395B (en) |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1270416A (en) * | 1999-04-08 | 2000-10-18 | 株式会社日立制作所 | Manufacture of semiconductor device |
| CN1406455A (en) * | 2000-02-25 | 2003-03-26 | 揖斐电株式会社 | Multilayer printed wiring board and method ofr producing multilayer printed wiring board |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US8629568B2 (en) * | 2010-07-30 | 2014-01-14 | Taiwan Semiconductor Manufacturing Company, Ltd. | Semiconductor device cover mark |
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2017
- 2017-10-30 CN CN201711052509.0A patent/CN107749395B/en active Active
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1270416A (en) * | 1999-04-08 | 2000-10-18 | 株式会社日立制作所 | Manufacture of semiconductor device |
| CN1406455A (en) * | 2000-02-25 | 2003-03-26 | 揖斐电株式会社 | Multilayer printed wiring board and method ofr producing multilayer printed wiring board |
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| Publication number | Publication date |
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| CN107749395A (en) | 2018-03-02 |
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