CN107706520A - Fan-out-type antenna packages structure and preparation method thereof - Google Patents
Fan-out-type antenna packages structure and preparation method thereof Download PDFInfo
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- CN107706520A CN107706520A CN201711008673.1A CN201711008673A CN107706520A CN 107706520 A CN107706520 A CN 107706520A CN 201711008673 A CN201711008673 A CN 201711008673A CN 107706520 A CN107706520 A CN 107706520A
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- material layer
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01Q—ANTENNAS, i.e. RADIO AERIALS
- H01Q1/00—Details of, or arrangements associated with, antennas
- H01Q1/36—Structural form of radiating elements, e.g. cone, spiral, umbrella; Particular materials used therewith
- H01Q1/38—Structural form of radiating elements, e.g. cone, spiral, umbrella; Particular materials used therewith formed by a conductive layer on an insulating support
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2223/00—Details relating to semiconductor or other solid state devices covered by the group H01L23/00
- H01L2223/58—Structural electrical arrangements for semiconductor devices not otherwise provided for
- H01L2223/64—Impedance arrangements
- H01L2223/66—High-frequency adaptations
- H01L2223/6661—High-frequency adaptations for passive devices
- H01L2223/6677—High-frequency adaptations for passive devices for antenna, e.g. antenna included within housing of semiconductor device
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/04105—Bonding areas formed on an encapsulation of the semiconductor or solid-state body, e.g. bonding areas on chip-scale packages
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/12105—Bump connectors formed on an encapsulation of the semiconductor or solid-state body, e.g. bumps on chip-scale packages
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/93—Batch processes
- H01L2224/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
- H01L2224/96—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being encapsulated in a common layer, e.g. neo-wafer or pseudo-wafer, said common layer being separable into individual assemblies after connecting
Abstract
The present invention provides a kind of fan-out-type antenna packages structure and preparation method thereof, including：Semiconductor chip；Capsulation material layer, plastic packaging is in the periphery of semiconductor chip；Formed with laser via in capsulation material layer；Conductive pole, it is filled in laser via, and up/down perforation capsulation material layer；Antenna structure, electrically connected on the first surface of capsulation material layer, and with conductive pole；Re-wiring layer, electrically connected on the second surface of capsulation material layer, and with semiconductor chip and the conductive pole；Solder projection, on surface of the re-wiring layer away from the capsulation material layer, and electrically connected with re-wiring layer.The encapsulating structure of the present invention can greatly save spatial area, the antenna of larger area length can be formed in less region area, substantially increase the gain of antenna, the line width of the metal antenna in antenna structure can accomplish very little, can greatly increase the density of the metal antenna in antenna structure.
Description
Technical field
The present invention relates to technical field of semiconductor encapsulation, more particularly to a kind of fan-out-type antenna packages structure and its preparation
Method.
Background technology
It is more inexpensive, more reliable, faster and more highdensity circuit be integrated antenna package pursue target.In future,
Integrated antenna package will improve the integration density of various electronic components by constantly reducing minimum feature size.At present, first
The method for packing entered includes：Wafer chip level chip-scale package (Wafer Level Chip Scale Packaging,
WLCSP), fan-out-type wafer-level packaging (Fan-Out Wafer Level Package, FOWLP), flip-chip (Flip
Chip), stacked package (Package on Package, POP) etc..
Fan-out-type wafer-level packaging is a kind of embedded chip method for packing of wafer level processing, be current a kind of input/
One of preferable Advanced Packaging method of more, the integrated flexibility of output port (I/O).Fan-out-type wafer-level packaging is compared to routine
Wafer-level packaging have its it is unique the advantages of：1. I/O spacing is flexible, independent of chip size；2. only use effective nude film
(die), product yield improves；3. there is flexible 3D package paths, you can to form the figure of General Cell at top；4. have
There are preferable electrical property and hot property；5. frequency applications；6. easily realize high-density wiring in re-wiring layer (RDL).
At present, the fan-out-type wafer-level packaging method of radio frequency chip is generally：Carrier is provided, is formed and bonded in carrier surface
Layer；On adhesive layer photoetching, electroplate out re-wiring layer (Redistribution Layers, RDL)；Using chip bonding work
Radio frequency chip is installed on re-wiring layer by skill；Using Shooting Technique by chip plastic packaging in capsulation material layer；Remove carrier
And adhesive layer；Photoetching, plating form Underbump metallization layer (UBM) on re-wiring layer；Carry out planting ball backflow, shape on UBM
Into soldered ball projection；Then carry out wafer and stick piece, cutting scribing.For the consideration of communication efficiency, radio frequency chip all can when in use
Antenna is set, and existing antenna is all developer when carrying out layout designs to radio-frequency enabled module, directly on pcb board
Layout antennas or the interface for reserving external antenna；But due to the inconvenience of external antenna, existing antenna is mostly directly in pcb board
Upper layout antennas, and such a method will ensure antenna gain, the dimensioned area of antenna is sufficiently large, and this just certainly will be with sacrifice
PCB surface product is cost, so that the area of the area of pcb board and whole encapsulating structure becomes big.
In consideration of it, it is necessary to design a kind of new fan-out-type antenna packages structure and preparation method thereof to solve above-mentioned skill
Art problem.
The content of the invention
In view of the above the shortcomings that prior art, it is an object of the invention to provide a kind of fan-out-type antenna packages structure
And preparation method thereof, for solving existing radio frequency chip when in use to ensure antenna gain, the dimensioned area of antenna will be enough
Greatly, so as to cause the change of the area of pcb board area and whole encapsulating structure big the problem of.
In order to achieve the above objects and other related objects, the present invention provides a kind of fan-out-type antenna packages structure, the fan
Going out type antenna packages structure includes：
Semiconductor chip；
Capsulation material layer, including relative first surface and second surface, the capsulation material layer plastic packaging are partly led in described
The periphery of body chip, and expose the front of the semiconductor chip；It is described formed with laser via in the capsulation material layer
Capsulation material layer described in laser via up/down perforation；
Conductive pole, it is filled in the laser via, and capsulation material layer described in up/down perforation；
Antenna structure, electrically connected on the first surface of the capsulation material layer, and with the conductive pole；
Re-wiring layer, on the second surface of the capsulation material layer, and with the semiconductor chip and described leading
Electric post electrical connection；
Solder projection, on surface of the re-wiring layer away from the capsulation material layer, and with the cloth again
Line layer electrically connects.
Preferably, the semiconductor chip includes：
Bare chip；
Contact pad, electrically connected on the bare chip, and with the bare chip；Wherein, where the contact pad
Surface be the semiconductor chip front.
Preferably, the conductive column section is shaped as inverted trapezoidal.
Preferably, the antenna structure includes the dielectric layer and metal antenna being alternately superimposed on, and the top of the antenna structure
Layer is metal antenna, via metal plug between the adjacent metal antenna and between the metal antenna and the conductive pole
Electrical connection.
Preferably, the antenna structure includes layer of metal antenna.
Preferably, the rectangular helical form of the shape of the metal antenna.
Preferably, the quantity of the metal antenna is multiple that multiple metal antennas extend along the dielectric layer surface
Direction be arranged in array.
Preferably, the re-wiring layer includes：
Insulating barrier, on the second surface of the capsulation material layer；
At least one layer of metal line layer, it is electrically connected in the insulating barrier, and with the semiconductor chip and the conductive pole
Connect；
Underbump metallization layer, in the insulating barrier and surface of the insulating barrier away from the capsulation material layer, and
Electrically connected with the metal line layer and the solder projection.
The present invention also provides a kind of preparation method of fan-out-type antenna packages structure, the fan-out-type antenna packages structure
Preparation method includes：
1) carrier is provided, and peel ply is formed in the upper surface of the carrier；
2) semiconductor chip is provided, the semiconductor chip is just being installed in the surface of the peel ply down；
3) capsulation material layer is formed in the surface of the peel ply, the capsulation material layer moulds the semiconductor chip
Envelope；The capsulation material layer includes relative first surface and second surface, the second surface of the capsulation material layer with it is described
Peel ply is in contact；
4) carrier and the peel ply are removed；
5) re-wiring layer, the re-wiring layer and the semiconductor are formed in the second surface of the capsulation material layer
Chip electrically connects；
6) portion is exposed in forming laser via, the laser via in the capsulation material layer using laser boring technique
Divide the re-wiring layer；
7) in forming conductive pole in the laser via, the conductive pole electrically connects with the re-wiring layer；
8) antenna structure is formed in the first surface of the capsulation material layer, the antenna structure is electrically connected with the conductive pole
Connect；
9) form soldered ball projection in surface of the re-wiring layer away from the capsulation material layer, the soldered ball projection with
The re-wiring layer electrical connection.
Preferably, step 8) forms antenna structure in the first surface of the capsulation material layer and comprised the following steps：
8-1) first layer dielectric layer is formed in the first surface of the capsulation material layer；
8-2) in forming the first opening in the first layer dielectric layer, first opening exposes the upper of the conductive pole
Surface；
8-3) in the first metal plug of formation in the described first opening, and formed in the upper surface of the first layer dielectric layer
First layer metal antenna, metal antenna described in first layer electrically connect via first metal plug with the conductive pole；
8-4) second is formed in the upper surface of the first medium layer of the upper surface formed with metal antenna described in first layer
Metal antenna described in covering first layer is completely covered in layer dielectric layer, the second layer dielectric layer；
8-5) in forming the second opening in the second layer dielectric layer, second opening is exposed described in segments first layer
Metal antenna；
8-6) in forming the second metal plug in the described second opening, and in forming the second layer on the second layer dielectric layer
The metal antenna.
Preferably, step 8) is in the specific method of the first surface formation antenna structure of the capsulation material layer：In institute
The first surface for stating capsulation material layer forms layer of metal antenna as the antenna structure.
Preferably, the rectangular helical form of the shape of the metal antenna.
Preferably, the quantity of the metal antenna is multiple that multiple metal antennas extend along the dielectric layer surface
Direction be arranged in array.
As described above, fan-out-type antenna packages structure of the present invention and preparation method thereof, has the advantages that：
1. the present invention forms antenna structure by the first surface in capsulation material layer, antenna structure is located at semiconductor chip
Top, spatial area can be greatlyd save so that the volume of encapsulating structure is smaller；
2. the metal antenna in antenna structure in the present invention uses stacked structure and helical structure, can be in less region
The antenna of larger area length is formed in area, the gain of antenna is substantially increased, both ensure that the stability of radio frequency chip, together
When also improve communication distance.
3. the line width of the metal antenna in antenna structure in the present invention can accomplish very little, a day knot can be greatly increased
The density of metal antenna in structure；
4. the encapsulating structure of the present invention has more preferable conformability；
5. the present invention in the encapsulating structure of radio frequency chip by forming antenna so that it is in subsequent applications without carrying out
Antenna layout, solve existing radio frequency chip when in use to ensure antenna gain, cause asking for pcb board area increase
Topic, both ensure that the antenna gain of radio frequency chip was sufficiently large, while also ensure that the area of pcb board is sufficiently small.
Brief description of the drawings
Fig. 1 is shown as the flow chart of the preparation method of the fan-out-type antenna packages structure provided in the embodiment of the present invention one.
The preparation method that Fig. 2~Figure 14 is shown as the fan-out-type antenna packages structure provided in the embodiment of the present invention one respectively walks
Rapid structural representation, wherein, Figure 12 is Figure 10 and Figure 11 overlooking the structure diagram, and Figure 13 and Figure 14 are being fanned out to for the present invention
The structural representation of type antenna structure.
Component label instructions
10 carriers
11 peel plies
12 semiconductor chips
121 bare chips
122 contact pads
13 capsulation material layers
131 laser vias
14 re-wiring layers
141 insulating barriers
142 metal line layers
143 Underbump metallization layers
15 conductive poles
16 antenna structures
161 dielectric layers
1611 first layer dielectric layers
1612 second layer dielectric layers
162 metal antennas
163 metal plugs
1631 first metal plugs
1632 second metal plugs
17 soldered ball projections
1)~9) step
Embodiment
Embodiments of the present invention are illustrated by particular specific embodiment below, those skilled in the art can be by this explanation
Content disclosed by book understands other advantages and effect of the present invention easily.
Refer to Fig. 1~Figure 14.It should be noted that the diagram provided in the present embodiment only illustrates this in a schematic way
The basic conception of invention, though only showing the component relevant with the present invention in diagram rather than according to package count during actual implement
Mesh, shape and size are drawn, and form, quantity and the ratio of each component can be a kind of random change during its actual implementation, and its
Assembly layout form may also be increasingly complex.
Embodiment one
Referring to Fig. 1, the present invention provides a kind of preparation method of fan-out-type antenna packages structure, the fan-out-type antenna envelope
The preparation method of assembling structure includes：
1) carrier is provided, and peel ply is formed in the upper surface of the carrier；
2) semiconductor chip is provided, the semiconductor chip is just being installed in the surface of the peel ply down；
3) capsulation material layer is formed in the surface of the peel ply, the capsulation material layer moulds the semiconductor chip
Envelope；The capsulation material layer includes relative first surface and second surface, the second surface of the capsulation material layer with it is described
Peel ply is in contact；
4) carrier and the peel ply are removed；
5) re-wiring layer, the re-wiring layer and the semiconductor are formed in the second surface of the capsulation material layer
Chip electrically connects；
6) portion is exposed in forming laser via, the laser via in the capsulation material layer using laser boring technique
Divide the re-wiring layer；
7) in forming conductive pole in the laser via, the conductive pole electrically connects with the re-wiring layer；
8) antenna structure is formed in the first surface of the capsulation material layer, the antenna structure is electrically connected with the conductive pole
Connect；
9) form soldered ball projection in surface of the re-wiring layer away from the capsulation material layer, the soldered ball projection with
The re-wiring layer electrical connection.
In step 1), S1 steps and Fig. 2 to Fig. 3 in Fig. 1 are referred to, there is provided a carrier 10, and in the carrier 10
Upper surface formed peel ply 11.
As an example, as shown in Fig. 2 the material of the carrier 10 includes but is not limited to silicon, glass, silica, ceramics, poly-
Composite more than one or both of compound and metal, its shape can be wafer shape, square or other any institutes
Need shape；The present embodiment prevents that rupture, warpage, fracture occur for semiconductor chip in subsequent preparation process by the carrier 10
The problems such as.
As an example, as shown in figure 3, the peel ply 11 in subsequent technique as the re-wiring layer 12 being subsequently formed
And the separating layer between other structures on the re-wiring layer 122 and the carrier 10, it is preferably from having light
The jointing material on clean surface is made, and it must have certain adhesion with re-wiring layer 12, to ensure the rewiring
Layer 122 will not produce situations such as mobile in subsequent technique, in addition, it also has stronger adhesion with the carrier 10, one
As for, the adhesion of itself and the carrier 10 needs to be more than the adhesion with the re-wiring layer 122.As an example, institute
The material for stating peel ply 11 is selected from the two-sided adhesive tape for being respectively provided with viscosity or the adhesive glue made by spin coating proceeding etc..Adhesive tape is preferred
Using UV adhesive tapes, it is easy to pull off after UV light irradiations.In other embodiments, the peel ply 11 also can be selected
The other materials layer that physical vaporous deposition or chemical vapour deposition technique are formed, such as epoxy resin (Epoxy), silicon rubber
(silicone rubber), polyimides (PI), polybenzoxazoles (PBO), benzocyclobutene (BCB) etc..In later separation institute
When stating carrier 10, wet etching, cmp, the methods of removing can be used to remove the peel ply 11.
In step 2), S2 steps and Fig. 4 in Fig. 1 are referred to, there is provided semiconductor chip 12, by the semiconductor chip
12 are just being installed in the surface of the peel ply 11 down.
As an example, the semiconductor chip 12 can be any one chip, for example radio frequency chip etc..It is described partly to lead
Body chip 12 includes bare chip 121 and contact pad 122, wherein, the contact pad 122 is located on the bare chip 121, and
Electrically connected with the bare chip 121；Wherein, the surface where the contact pad 122 is the front of the semiconductor chip 12.
It should be noted that the semiconductor chip 12 can be existing any radio communication chip, for sending and
Receive the communication information.The thickness of the semiconductor chip 12 can be set according to being actually needed, it is preferable that the present embodiment
In, the thickness of the semiconductor chip 12 can be but be not limited only to 100 μm~200 μm.
As an example, the quantity of the semiconductor chip 12 can fill according to actually being set on the peel ply 11
If the semiconductor chip 12 quantity can be one, two or more.
In step 3), S3 steps and Fig. 5 in Fig. 1 are referred to, capsulation material is formed in the surface of the peel ply 11
Layer 13, the capsulation material layer 13 is by the plastic packaging of semiconductor chip 10；The capsulation material layer 13 includes the first relative table
Face and second surface, the second surface of the capsulation material layer 13 are in contact with the peel ply 11.
As an example, compressing and forming process, transfer shaping technology, hydraulic seal moulding process, molding bottom can be used
Fill process, capillary underfill technique, vacuum lamination process or spin coating proceeding form institute in the upper surface of the peel ply 11
State capsulation material layer 13.Preferably, in the present embodiment, using molded underfill technique in the upper surface shape of the peel ply 11
Into the capsulation material layer 13.
As an example, the material of the capsulation material layer 13 can be but be not limited only to polyimide layer, layer of silica gel, epoxy
Resin bed, the curable polymeric substrate bed of material or the curable resin base material bed of material.
As an example, the upper surface of the capsulation material layer 13 can be higher than the back side (the i.e. institute of the semiconductor chip 12
State capsulation material layer 13 and the semiconductor chip 12 encapsulated into plastic packaging), can also be equal with the back side of the semiconductor chip 12
Together.
In step 4), S4 steps and Fig. 6 in Fig. 1 are referred to, removes the carrier 10 and the peel ply 11.
As an example, grinding technics, reduction process etc. can be used to be removed the carrier 10 and the peel ply 11.
Preferably, in the present embodiment, use and tear the mode of the peel ply 11 to remove the carrier 10.
In step 5), S5 steps and Fig. 7 in Fig. 1 are referred to, is formed in the second surface of the capsulation material layer 13
Re-wiring layer 14, the re-wiring layer 14 electrically connect with the semiconductor chip 12.
In one example, the re-wiring layer 14 includes a layer insulating and layer of metal line layer, in the plastic packaging material
The second surface of the bed of material 13 forms the re-wiring layer 14 and comprised the following steps：
5-1) metal line layer is formed in the second surface of the capsulation material layer 13；
Insulating barrier 5-2) is formed in the upper surface of the capsulation material layer 13, the insulating barrier is by the metal line layer bag
Wrap up in.
In another example, the re-wiring layer 14 includes a layer insulating and layer of metal line layer, in the plastic packaging
The second surface of material layer 13 forms the re-wiring layer 14 and comprised the following steps：
The insulating barrier 5-1) is formed in the second surface of the capsulation material layer, by photoetching and etching technics in described
Through hole is formed in insulating barrier, the through hole defines the shape of the metal line layer；
5-2) in forming the metal line layer in the through hole.
In another example, as shown in fig. 7, including layer of metal line layer 142, at least one layer in the re-wiring layer 14
Insulating barrier 141 and Underbump metallization layer 143, form the re-wiring layer 14 in the second surface of the capsulation material layer 13 and wrap
Include following steps：
5-1) the described one layer metal line layer 142, the metal are formed in the second surface of the capsulation material layer 13
Line layer 142 electrically connects with the semiconductor chip 12；
The insulating barrier 141 5-2) is formed in the second surface of the capsulation material layer 13, the insulating barrier 141 is by described in
Metal line layer 142 encapsulates, and the upper surface of the insulating barrier 141 is higher than the upper surface of the metal line layer 142；
5-3) in forming opening in the insulating barrier 141, the opening exposes the part metal line layer 142；
5-4) in forming the lower protruding block metal level 143 in the opening.
In another example, as shown in fig. 7, including layer of metal line layer 142, at least one layer in the re-wiring layer 14
Insulating barrier 141 and Underbump metallization layer 143, form the re-wiring layer 14 in the second surface of the capsulation material layer 13 and wrap
Include following steps：
5-1) insulating barrier 141 described in first layer is formed in the second surface of the capsulation material layer 13；
5-2) in forming the first opening in insulating barrier described in first layer 141, first opening exposes part described half
The connection pad 122 of conductor chip 12；
5-3) in the formation metal line layer 142 in the described first opening；
5-4) insulating barrier 141 described in the second layer is formed in the upper surface of insulating barrier described in first layer 141；
5-5) in forming the second opening in insulating barrier described in the second layer 141, second opening exposes the metal wire
Layer 142；
5-6) in the formation lower protruding block metal level 143 in the described second opening.
As an example, in above-mentioned example, the material of the metal line layer 142 can be but be not limited only to copper, aluminium, nickel, only,
Silver or a kind of material in titanium or two or more combined materials, and the works such as PVD, CVD, sputtering, plating or chemical plating can be used
Skill forms the metal line layer 142.The material of the insulating barrier 141 can be low k dielectric, specifically, the insulating barrier
141 material can include a kind of material in epoxy resin, silica gel, PI, PBO, BCB, silica, phosphorosilicate glass and fluorine-containing glass
Material, and the techniques such as spin coating, CVD, plasma enhanced CVD can be used to form the insulating barrier 141.
In step 6), S6 steps and Fig. 8 in Fig. 1 are referred to, using laser boring technique in the capsulation material layer
Laser via 131 is formed in 13, the laser via 131 exposes the part re-wiring layer 14.
As an example, laser boring technique can be used to perform etching the capsulation material layer 13 in the present embodiment with
The laser via 131 is formed in the capsulation material layer 13, certainly, in other examples, the techniques such as etching can also be used
Searched in Soviet Union and the laser via 131 is formed in capsulation material layer 13.
As an example, the cross sectional shape of the laser via 131 can be set according to being actually needed, it is preferable that this
In embodiment, the cross sectional shape of the laser via 131 can be inverted trapezoidal, certainly, in other examples, the laser via
131 shape can also be rectangle etc..
It should be noted that when the institute in the re-wiring layer 14 corresponding to the opening position of the laser via 131
It is described to swash when stating metal line layer 142 and being not exposed to the insulating barrier 141 adjacent to the surface of the second surface of capsulation material layer 13
Light through hole 131 runs through after the capsulation material layer 13, also needs to extend to the insulating barrier 141 of the re-wiring layer 14
It is interior, to ensure that the laser via 131 can expose the part metal line layer 142.
In step 7), S7 steps and Fig. 9 in Fig. 1 are referred to, conductive pole 15 is formed in the laser via 131,
The conductive pole 15 electrically connects with the re-wiring layer 14.
As an example, conducting resinl typography can be used conductive in the first surface spin coating of the capsulation material layer 13
Glue so that the conducting resinl enters in the laser via 131 to form the conductive pole 15.Certainly, in other examples,
The techniques such as physical gas-phase deposition, chemical vapor deposition method (CVD), plasma enhanced CVD can be used in the laser
Conductive material (for example, metal, metallic compound etc.) is deposited in through hole 131 to form the conductive pole 15.
As an example, the upper surface of the conductive pole 15 and the first surface flush of the capsulation material layer 13.
In step 8), S8 steps and Figure 10 to Figure 12 in Fig. 1 are referred to, in the first table of the capsulation material layer 13
Face forms antenna structure 16, and the antenna structure 16 electrically connects with the conductive pole 15.
In one example, as shown in Figure 10, include in the first surface formation antenna structure 16 of the capsulation material layer 13
Following steps：
8-1) first layer dielectric layer 1611 is formed in the first surface of the capsulation material layer 13；
8-2) in forming the first opening (not shown) in the first layer dielectric layer 1611, first opening exposes institute
State the upper surface of conductive pole 15；
8-3) in the first metal plug 1631 of formation in the described first opening, and in the upper of the first layer dielectric layer 1611
Surface forms first layer metal antenna 162, metal antenna 162 described in first layer via first metal plug 1611 with it is described
Conductive pole 15 electrically connects；
8-4) in the upper surface shape of the first medium layer 1611 of the upper surface formed with metal antenna described in first layer 162
Into second layer dielectric layer 1612, metal antenna 162 described in covering first layer is completely covered in the second layer dielectric layer 1612；It is described
First layer dielectric layer 1611 collectively forms the dielectric layer 161 with the second layer dielectric layer 1612；
8-5) in forming the second opening (not shown) in the second layer dielectric layer 1612, second opening exposes portion
Divide metal antenna 162 described in first layer；
8-6) in the second metal plug 1632 of formation in the described second opening, and in shape on the second layer dielectric layer 1612
Into metal antenna described in the second layer 162；First metal plug 1631 collectively forms institute with second metal plug 1632
State metal plug 163.
In another example, as shown in figure 11, one layer of gold can also be formed in the first surface of the capsulation material layer 15
Belong to antenna 162 and be used as the antenna structure 16.
As an example, the shape of the metal antenna 162 can be set according to being actually needed, it is preferable that this implementation
In example, the shape of the metal antenna 162 can be in but be not limited only to rectangular coil shape, as shown in figure 11.Certainly, show at other
In example, the metal antenna 162 can also be in other arbitrary shapes, for example, round spiral or arch etc..
As an example, the material of the dielectric layer 161 can include but are not limited to silica or PET is (poly- to benzene two
Formic acid glycol ester), it is prepared by techniques such as spin coating, chemical vapor deposition method (CVD), plasma enhanced CVDs.
The material of the metal antenna 162 and the metal plug 163 can include but are not limited to copper, aluminium, nickel, gold, silver, tin, titanium
One or both of more than；Wherein, the metal antenna 162 and the metal plug 163 can pass through physical vapour deposition (PVD)
One kind in technique (PVD), chemical vapor deposition method (CVD), sputtering, plating or chemical plating is prepared.
As an example, the thickness of the first layer dielectric layer 1611 can be but be not limited only to 10 μm~15 μm, described
The thickness of two layer medium layer 1612 can be but be not limited only to 10 μm~15 μm, and the thickness of the metal antenna 162 is 5 μm~10
μm。
As an example, the quantity of every layer of metal antenna 162 can be set according to being actually needed, it is preferable that this
In embodiment, the quantity of every layer of metal antenna 162 is multiple, and multiple metal antennas 162 are along the dielectric layer 161
The direction of surface extension is arranged in array, wherein, Figure 12 using the quantity of the metal antenna 162 as four as an example, certain,
In other examples, the quantity of every layer of metal antenna 162 can also according to be actually needed be arranged to one, two, three,
Five or more etc..It should be noted that in other examples, the quantity of metal antenna 162 described in first layer can be with
The quantity of metal antenna 162 is identical described in the second layer, can also be different from the quantity of metal antenna described in the second layer 162, for example,
The quantity that can be metal antenna 162 described in first layer and metal antenna 162 described in the second layer can be four, or
The quantity of metal antenna 162 described in first layer is one, and the quantity of metal antenna 162 described in the second layer is four etc..
It should be further stated that when the quantity of the semiconductor chip 12 is one, the semiconductor chip 12
One metal antenna 162 corresponding with above and below it can be set in metal antenna 162 of every layer of top, it is described partly to lead
Multiple metal antennas 162 can also be set in the every layer of metal antenna 162 in the top of body chip 12；When the semiconductor core
When the quantity of piece 12 is two or more, one can be set in the every layer of metal antenna 162 in the top of semiconductor chip 12
The individual metal antenna 162, it can also set in the every layer of metal antenna 162 in the top of the semiconductor chip 12 multiple described
Metal antenna 162, and each metal antenna 162 in every layer of metal antenna 162 and the semiconductor chip 12 1
About one is correspondingly arranged.
In step 9), S9 steps and Figure 13 and Figure 14 in Fig. 1 are referred to, in the re-wiring layer 14 away from described
The surface of capsulation material layer 13 forms soldered ball projection 17, and the soldered ball projection 17 electrically connects with the re-wiring layer 14.
In one example, soldered ball projection 17 is formed in the remote surface of capsulation material layer 13 of the re-wiring layer 14
Comprise the following steps：
Metal column (not shown) 9-1) is formed in the surface of the remote capsulation material layer 13 of the re-wiring layer 14,
The metal column electrically connects with the metal line layer 142 in the re-wiring layer 14；
9-2) soldered ball is formed in the surface of the remote re-wiring layer 14 of the metal column.
As an example, the material of the metal column can be copper, aluminium, nickel, gold, silver, a kind of material in titanium or two kinds and
Two or more combined materials, can by physical gas-phase deposition (PVD), chemical vapor deposition method (CVD), sputtering,
Any of plating or chemical plating technique form the metal column.The material of the soldered ball can be copper, aluminium, nickel, gold, silver,
A kind of material or two kinds and two or more combined materials in titanium, the soldered ball can be formed by planting ball reflux technique.
In another example, as shown in FIG. 13 and 14, the soldered ball projection 17 is with soldered ball, can be returned by planting ball
Stream technique directly forms soldered ball as the soldered ball projection 17, the soldered ball projection 17 directly with the re-wiring layer 14
The metal line layer 142 electrically connects.As an example, the height of the soldered ball projection 17 can be but be not limited only to 190 μm.
Embodiment two
Please continue to refer to Figure 13 and Figure 14, the present embodiment provides a kind of fan-out-type antenna packages structure, the fan-out-type day
Wire encapsulation construction includes：Semiconductor chip 12；Capsulation material layer 13, the capsulation material layer 13 include relative first surface and
Second surface, the plastic packaging of capsulation material layer 13 expose the semiconductor chip in the periphery of the semiconductor chip 12
12 front；Formed with laser via 131 in the capsulation material layer 13, plastic packaging described in the up/down perforation of laser via 131
Material layer 13；Conductive pole 15, the conductive pole 15 is filled in the laser via 131, and capsulation material described in up/down perforation
Layer 13；Antenna structure 16, the antenna structure 16 are located on the first surface of the capsulation material layer 13, and with the conductive pole
15 electrical connections；Re-wiring layer 1, the re-wiring layer 14 are located on the second surface of the capsulation material layer 13, and with institute
State semiconductor chip 12 and the conductive pole 15 electrically connects；Solder projection 17, the solder projection 17 are located at the rewiring
On 14 surface away from the capsulation material layer 13 of layer, and electrically connected with the re-wiring layer 14.
As an example, the semiconductor chip 12 can be any one chip, for example radio frequency chip etc..It is described partly to lead
Body chip 12 includes bare chip 121 and contact pad 122, wherein, the contact pad 122 is located on the bare chip 121, and
Electrically connected with the bare chip 121；Wherein, the surface where the contact pad 122 is the front of the semiconductor chip 12.
It should be noted that the semiconductor chip 12 can be existing any radio communication chip, for sending and
Receive the communication information.The thickness of the semiconductor chip 12 can be set according to being actually needed, it is preferable that the present embodiment
In, the thickness of the semiconductor chip 12 can be but be not limited only to 100 μm~200 μm.
As an example, the quantity of the semiconductor chip 12 can fill according to actually being set on the peel ply 11
If the semiconductor chip 12 quantity can be one, two or more.
As an example, the material of the capsulation material layer 13 can be but be not limited only to polyimide layer, layer of silica gel, epoxy
Resin bed, the curable polymeric substrate bed of material or the curable resin base material bed of material.
As an example, the cross sectional shape of the conductive pole 15 can be set according to being actually needed, it is preferable that this implementation
In example, the cross sectional shape of the conductive pole 15 is inverted trapezoidal, certainly, in other examples, the cross sectional shape of the conductive pole 15
It can also be rectangle etc..
As an example, the material of the conductive pole 15 can be conducting resinl, conducting metal or metallic compound etc..
As an example, the upper surface of the conductive pole 15 and the first surface flush of the capsulation material layer 13.
In one example, as shown in figure 13, the antenna structure 16 includes the dielectric layer 161 and metal antenna being alternately superimposed on
162, and the top layer of the antenna structure 16 is metal antenna 162, between the adjacent metal antenna 162 and the metal antenna
Electrically connected between 162 and the metal connecting line 162 via metal plug 163.Wherein, it is with the dielectric layer 161 in Figure 12
Two layers (i.e. as included first layer dielectric layer 1611 and second layer dielectric layer 1612 in Figure 13), the metal antenna 162 also wraps
Include exemplified by two layers.
In another example, as shown in figure 14, the antenna structure 16 can also only include layer of metal antenna 162.
As an example, the shape of the metal antenna 162 can be set according to being actually needed, it is preferable that this implementation
In example, the shape of the metal antenna 162 can be in but be not limited only to rectangular coil shape.Certainly, in other examples, the gold
It can also be in other arbitrary shapes, for example, round spiral or arch etc. to belong to antenna 162.
As an example, the material of the dielectric layer 161 can include but are not limited to silica or PET is (poly- to benzene two
Formic acid glycol ester), it is prepared by techniques such as spin coating, chemical vapor deposition method (CVD), plasma enhanced CVDs.
The material of the metal antenna 162 and the metal plug 163 can include but are not limited to copper, aluminium, nickel, gold, silver, tin, titanium
One or both of more than；Wherein, the metal antenna 162 and the metal plug 163 can pass through physical vapour deposition (PVD)
One kind in technique (PVD), chemical vapor deposition method (CVD), sputtering, plating or chemical plating is prepared.
As an example, the thickness of the first layer dielectric layer 1611 can be but be not limited only to 10 μm~15 μm, described
The thickness of two layer medium layer 1612 can be but be not limited only to 10 μm~15 μm, and the thickness of the metal antenna 162 is 5 μm~10
μm。
As an example, the quantity of every layer of metal antenna 162 can carry out setting according to being actually needed, it is preferable that
In the present embodiment, the quantity of every layer of metal antenna 162 is multiple, and multiple metal antennas 162 are along the dielectric layer
161 surfaces extension direction be arranged in array, wherein, Figure 12 using the quantity of the metal antenna 162 as four as an example,
Certainly, in other examples, the quantity of every layer of metal antenna 162 can also according to be actually needed be arranged to one, two,
Three, five or more etc..It should be noted that in other examples, the quantity of metal antenna 162 can described in first layer
, can also be different from the quantity of metal antenna described in the second layer 162 with identical with the quantity of metal antenna described in the second layer 162,
For example, the quantity that can be metal antenna 162 described in first layer and metal antenna 162 described in the second layer can be four,
The quantity that can be metal antenna 162 described in first layer is one, and the quantity of metal antenna 162 described in the second layer is four etc.
Deng.
It should be further stated that when the quantity of the semiconductor chip 12 is one, the semiconductor chip 12
One metal antenna 162 corresponding with above and below it can be set in metal antenna 162 of every layer of top, it is described partly to lead
Multiple metal antennas 162 can also be set in the every layer of metal antenna 162 in the top of body chip 12；When the semiconductor core
When the quantity of piece 12 is two or more, one can be set in the every layer of metal antenna 162 in the top of semiconductor chip 12
The individual metal antenna 162, it can also set in the every layer of metal antenna 162 in the top of the semiconductor chip 12 multiple described
Metal antenna 162, and each metal antenna 162 in every layer of metal antenna 162 and the semiconductor chip 12 1
About one is correspondingly arranged.
The present invention in the first surface of the capsulation material layer 13 by forming the antenna structure 16, the antenna structure
16 are located at the top of the semiconductor chip 12, can greatly save spatial area so that the volume of encapsulating structure is smaller；It is described
The metal antenna 162 in antenna structure 16 uses stacked structure and helical structure, can be formed in less region area
The antenna of larger area length, substantially increases the gain of antenna, both ensure that the stability of radio frequency chip, has also improved simultaneously
Communication distance；Metal antenna 162 in the antenna structure 16 can be prepared by dry etch process, and its line width can accomplish very
It is small, the density of the metal antenna 162 in the antenna structure 16 can be greatly increased；The encapsulating structure of the present invention has more preferable
Conformability.
As an example, the re-wiring layer 14 includes：Insulating barrier 141, the insulating barrier 141 are located at the capsulation material
On the second surface of layer 13；At least one layer of metal line layer 142, the metal line layer 142 are located in the insulating barrier 141, and with
The semiconductor chip 12 and the conductive pole 15 electrically connect；Underbump metallization layer 143, the Underbump metallization layer 143 are located at
In the insulating barrier 142 and surface of the insulating barrier 141 away from the capsulation material layer 13, and with the metal line layer 142
And the solder projection 17 electrically connects.As an example, the height of the soldered ball projection 17 can be but be not limited only to 190 μm.
In summary, fan-out-type antenna packages structure of the invention and preparation method thereof, the fan-out-type antenna packages knot
Structure includes：Semiconductor chip；Capsulation material layer, including relative first surface and second surface, the capsulation material layer plastic packaging
In the periphery of the semiconductor chip, and expose the front of the semiconductor chip；Formed with sharp in the capsulation material layer
Light through hole, capsulation material layer described in the laser via up/down perforation；Conductive pole, it is filled in the laser via, and up and down
Penetrate the capsulation material layer；Antenna structure, it is electrically connected on the first surface of the capsulation material layer, and with the conductive pole
Connect；Re-wiring layer, on the second surface of the capsulation material layer, and it is electric with the semiconductor chip and the conductive pole
Connection；Solder projection, on surface of the re-wiring layer away from the capsulation material layer, and with the re-wiring layer
Electrical connection.The present invention forms antenna structure by the first surface in capsulation material layer, and antenna structure is located at semiconductor chip
Top, spatial area can be greatlyd save so that the volume of encapsulating structure is smaller；Metal day in antenna structure in the present invention
Line uses stacked structure and helical structure, and the antenna of larger area length can be formed in less region area, is greatly improved
The gain of antenna, both ensure that the stability of radio frequency chip, while also improve communication distance；Antenna structure in the present invention
In the line width of metal antenna can accomplish very little, the density of the metal antenna in antenna structure can be greatly increased；The present invention
Encapsulating structure there is more preferable conformability；The present invention by forming antenna in the encapsulating structure of radio frequency chip so that its
Antenna layout need not be carried out during subsequent applications, existing radio frequency chip is solved when in use to ensure antenna gain, causes
The problem of pcb board area increases, both ensure that the antenna gain of radio frequency chip was sufficiently large, while also ensure that the area of pcb board
It is sufficiently small.
The above-described embodiments merely illustrate the principles and effects of the present invention, not for the limitation present invention.It is any ripe
Know the personage of this technology all can carry out modifications and changes under the spirit and scope without prejudice to the present invention to above-described embodiment.Cause
This, those of ordinary skill in the art is complete without departing from disclosed spirit and institute under technological thought such as
Into all equivalent modifications or change, should by the present invention claim be covered.
Claims (13)
1. a kind of fan-out-type antenna packages structure, it is characterised in that the fan-out-type antenna packages structure includes：
Semiconductor chip；
Capsulation material layer, including relative first surface and second surface, the capsulation material layer plastic packaging is in the semiconductor core
The periphery of piece, and expose the front of the semiconductor chip；Formed with laser via, the laser in the capsulation material layer
Capsulation material layer described in through hole up/down perforation；
Conductive pole, it is filled in the laser via, and capsulation material layer described in up/down perforation；
Antenna structure, electrically connected on the first surface of the capsulation material layer, and with the conductive pole；
Re-wiring layer, on the second surface of the capsulation material layer, and with the semiconductor chip and the conductive pole
Electrical connection；
Solder projection, on surface of the re-wiring layer away from the capsulation material layer, and with the re-wiring layer
Electrical connection.
2. fan-out-type antenna packages structure according to claim 1, it is characterised in that the semiconductor chip includes：
Bare chip；
Contact pad, electrically connected on the bare chip, and with the bare chip；Wherein, the table where the contact pad
Face is the front of the semiconductor chip.
3. fan-out-type antenna packages structure according to claim 1, it is characterised in that the conductive column section is shaped as
Inverted trapezoidal.
4. fan-out-type antenna packages structure according to claim 1, it is characterised in that the antenna structure includes alternately folded
The dielectric layer and metal antenna put, and the top layer of the antenna structure is metal antenna, between the adjacent metal antenna and institute
State and electrically connected between metal antenna and the conductive pole via metal plug.
5. fan-out-type antenna packages structure according to claim 1, it is characterised in that the antenna structure includes one layer of gold
Belong to antenna.
6. the fan-out-type antenna packages structure according to claim 4 or 5, it is characterised in that the shape of the metal antenna
Rectangular helical form.
7. fan-out-type antenna packages structure according to claim 6, it is characterised in that the quantity of the metal antenna is more
Individual, multiple metal antennas are arranged in array along the direction that the dielectric layer surface extends.
8. fan-out-type antenna packages structure according to claim 1, it is characterised in that the re-wiring layer includes：
Insulating barrier, on the second surface of the capsulation material layer；
At least one layer of metal line layer, electrically connected in the insulating barrier, and with the semiconductor chip and the conductive pole；
Underbump metallization layer, in the insulating barrier and surface of the insulating barrier away from the capsulation material layer, and with institute
State metal line layer and solder projection electrical connection.
A kind of 9. preparation method of fan-out-type antenna packages structure, it is characterised in that the system of the fan-out-type antenna packages structure
Preparation Method comprises the following steps：
1) carrier is provided, and peel ply is formed in the upper surface of the carrier；
2) semiconductor chip is provided, the semiconductor chip is just being installed in the surface of the peel ply down；
3) capsulation material layer is formed in the surface of the peel ply, the capsulation material layer is by the semiconductor chip plastic packaging；Institute
Stating capsulation material layer includes relative first surface and second surface, second surface and the peel ply of the capsulation material layer
It is in contact；
4) carrier and the peel ply are removed；
5) re-wiring layer, the re-wiring layer and the semiconductor chip are formed in the second surface of the capsulation material layer
Electrical connection；
6) part institute is exposed in forming laser via, the laser via in the capsulation material layer using laser boring technique
State re-wiring layer；
7) in forming conductive pole in the laser via, the conductive pole electrically connects with the re-wiring layer；
8) antenna structure is formed in the first surface of the capsulation material layer, the antenna structure electrically connects with the conductive pole；
9) form soldered ball projection in surface of the re-wiring layer away from the capsulation material layer, the soldered ball projection with it is described
Re-wiring layer electrically connects.
10. the preparation method of fan-out-type antenna packages structure according to claim 9, it is characterised in that step 8) is in institute
The first surface formation antenna structure for stating capsulation material layer comprises the following steps：
8-1) first layer dielectric layer is formed in the first surface of the capsulation material layer；
8-2) in forming the first opening in the first layer dielectric layer, first opening exposes the upper table of the conductive pole
Face；
8-3) in the first metal plug of formation in the described first opening, and first is formed in the upper surface of the first layer dielectric layer
Layer metal antenna, metal antenna described in first layer electrically connect via first metal plug with the conductive pole；
8-4) second layer is formed in the upper surface of the first medium layer of the upper surface formed with metal antenna described in first layer to be situated between
Metal antenna described in covering first layer is completely covered in matter layer, the second layer dielectric layer；
8-5) in forming the second opening in the second layer dielectric layer, second opening exposes metal described in segments first layer
Antenna；
8-6) in the second metal plug of formation in the described second opening, and in described in the formation second layer on the second layer dielectric layer
Metal antenna.
11. the preparation method of fan-out-type antenna packages structure according to claim 9, it is characterised in that step 8) is in institute
State capsulation material layer first surface formed antenna structure specific method be：Formed in the first surface of the capsulation material layer
Layer of metal antenna is as the antenna structure.
12. the preparation method of the fan-out-type antenna packages structure according to claim 10 or 11, it is characterised in that the gold
Belong to the rectangular helical form of shape of antenna.
13. the preparation method of fan-out-type antenna packages structure according to claim 12, it is characterised in that the metal day
The quantity of line is multiple, and multiple metal antennas are arranged in array along the direction that the dielectric layer surface extends.
Priority Applications (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201711008673.1A CN107706520A (en) | 2017-10-25 | 2017-10-25 | Fan-out-type antenna packages structure and preparation method thereof |
| US16/171,054 US10777515B2 (en) | 2017-10-25 | 2018-10-25 | Fan-out antenna packaging structure and preparation method thereof |
| US16/987,307 US11257772B2 (en) | 2017-10-25 | 2020-08-06 | Fan-out antenna packaging structure and preparation method thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201711008673.1A CN107706520A (en) | 2017-10-25 | 2017-10-25 | Fan-out-type antenna packages structure and preparation method thereof |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN107706520A true CN107706520A (en) | 2018-02-16 |
Family
ID=61182364
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201711008673.1A Pending CN107706520A (en) | 2017-10-25 | 2017-10-25 | Fan-out-type antenna packages structure and preparation method thereof |
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| Country | Link |
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| CN (1) | CN107706520A (en) |
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Address after: No.78 Changshan Avenue, Jiangyin City, Wuxi City, Jiangsu Province (place of business: No.9 Dongsheng West Road, Jiangyin City) Applicant after: Shenghejing micro semiconductor (Jiangyin) Co.,Ltd. Address before: No.78 Changshan Avenue, Jiangyin City, Wuxi City, Jiangsu Province Applicant before: SJ Semiconductor (Jiangyin) Corp. |