CN107632949A - Data wire identification circuit, method and terminal - Google Patents
Data wire identification circuit, method and terminal Download PDFInfo
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- CN107632949A CN107632949A CN201710944527.3A CN201710944527A CN107632949A CN 107632949 A CN107632949 A CN 107632949A CN 201710944527 A CN201710944527 A CN 201710944527A CN 107632949 A CN107632949 A CN 107632949A
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Abstract
The application is related to a kind of data wire identification circuit, method and terminal, and data wire identification circuit is used for the type for identifying the data wire of access, and the type of data wire includes OTG data wires, charging data line and OTG charging data lines.Interface identification circuit, including：Interface module, for accessing OTG data wires, charging data line and OTG charging data lines；Debugging module, it is connected with interface module, debugging module includes the first output end and the second output end, for accessing different data wire types according to interface module, corresponds to the corresponding level signal of output respectively to the first output end, the second output end；Processor, it is connected respectively with the first output end, the second output end, for obtaining the first output end, the level signal of the second output end output, and the type of the data wire accessed according to the level signal of output identification interface module.By above-mentioned data wire identification circuit, data-transformation facility and charge function can be realized simultaneously, improve the Experience Degree of user.
Description
Technical field
The application is related to data interface techniques field, more particularly to data wire identification circuit, method and terminal.
Background technology
Mobile terminal (electronic equipment such as mobile phone or tablet personal computer) is most at present all uses Micro-USB interfaces, uses
Family can be using OTG functions to realize data transfer by Micro-USB interfaces, or it is charged.Micro-USB interfaces
USD_ID pin be for identify be the data wire of access when be to be used to charge, or for data transfer.
And traditional Micro-USB interfaces when using OTG functions, then can not be realized only with a USB_ID pin
To charging, made troubles to user.
The content of the invention
The embodiment of the present application provides a kind of data wire identification circuit, method and terminal, can realize charging and transmission simultaneously
The function of data.
A kind of data wire identification circuit, the type of the data wire for identifying access, the type of the data wire include OTG
Data wire, charging data line and OTG charging data lines；
The interface identification circuit, including：
Interface module, for accessing the OTG data wires, charging data line and OTG charging data lines；
Debugging module, it is connected with the interface module, the debugging module includes the first output end and the second output end, uses
In accessing different data wire type according to the interface module, the corresponding level signal of output is corresponded to respectively to described first defeated
Go out end, the second output end；
Processor, it is connected respectively with first output end, the second output end, for obtaining first output end,
The level signal of two output ends output, and the data accessed according to the level signal of the output identification interface module
The type of line.
A kind of data wire recognition methods, the type of the data wire for identifying access, the type of the data wire include OTG
Data wire, charging data line and OTG charging data lines；The recognition methods is based on data wire identification circuit, and the data wire is known
Other circuit, including interface module, debugging module and the processor being sequentially connected；The debugging module includes the first output end and the
Two output ends；
When the interface module is respectively connected to OTG data wires, charging data line and OTG charging data lines, the debugging
Module corresponds to the corresponding level signal of output to first output end, the second output end respectively；
The processor obtains first output end, the level signal of the second output end output；
The level that the processor exports according to default data wire type and first output end, the second output end is believed
Number truth table, identify the type of the data wire of interface module access.
A kind of terminal, including above-mentioned data wire identification circuit.
By above-mentioned data wire identification circuit, method and terminal, can be charged in the normal identification for not influenceing interface module
On the premise of data wire and OTG data wires, can also identify can realize that the OTG of charge function and data-transformation facility fills simultaneously
Electric data wire.That is, by above-mentioned data wire identification circuit, data-transformation facility and charge function can be realized simultaneously, improved
The Experience Degree of user.
Brief description of the drawings
, below will be to embodiment or existing in order to illustrate more clearly of the embodiment of the present application or technical scheme of the prior art
There is the required accompanying drawing used in technology description to be briefly described, it should be apparent that, drawings in the following description are only this
Some embodiments of application, for those of ordinary skill in the art, on the premise of not paying creative work, can be with
Other accompanying drawings are obtained according to these accompanying drawings.
Fig. 1 is the structural framing figure of data wire identification circuit in one embodiment；
Fig. 2 is the circuit theory diagrams of data wire identification circuit in one embodiment；
Fig. 3 is the flow chart of one embodiment data wire recognition methods；
Fig. 4 is the block diagram of the part-structure of the mobile phone related to terminal.
Embodiment
In order that the object, technical solution and advantage of the application are more clearly understood, it is right below in conjunction with drawings and Examples
The application is further elaborated.It should be appreciated that specific embodiment described herein is only to explain the application, and
It is not used in restriction the application.
As shown in figure 1, the application provides a kind of data wire identification circuit, data wire identification circuit is used for the number for identifying access
According to the type of line, wherein, the type of data wire includes：OTG data wires, charging data line and OTG charging data lines.Data wire is known
Other circuit be applied to OTG functions terminal, wherein, terminal can be mobile phone, tablet personal computer or other there is OTG functions
Electronic equipment.Data wire identification circuit can realize the parallel execution of OTG functions and charge function.
Wherein, in OTG data wires, OTG is On-The-Go abbreviation, and OTG data wires are mainly used to connect OTG equipment, with reality
Existing OTG functions are transmitted data.Charging data line, it can be used for connecting power supply adaptor to realize charge function；OTG charges
Data wire is used for the special installation for connecting the function that can be realized charging and can realize data transfer.
In one embodiment, interface identification circuit includes interface module 110, debugging module 120 and processor 130.Its
In, interface module 110, for accessing OTG data wires, charging data line and OTG charging data lines；Debugging module 120, with interface
Module 110 connects, and debugging module 120 includes the first output end TP1 and the second output end TP2, for being connect according to interface module 110
Enter different data wire types, correspond to the corresponding level signal of output respectively to the first output end TP1, the second output end TP2；Place
Device 130 is managed, is connected respectively with the first output end TP1, the second output end TP2, for identifying the first output end TP1, the second output
Hold the level signal of TP2 outputs, and the type of the data wire accessed according to the level signal of output identification interface module 110.
By above-mentioned data wire identification circuit, can not influence the normal identification charging data line of interface module 110 and
On the premise of OTG data wires, the OTG charge datas that can realize charge function and data-transformation facility simultaneously can also be identified
Line.That is, by above-mentioned data wire identification circuit, data-transformation facility and charge function can be realized simultaneously.
In one embodiment, interface module 110 comprises at least OTG data wires, the identification interface of charging data line, the knowledge
Other interface is connected with the debugging module 120.
It should be noted that interface module 110 is Micro-USB interfaces, wherein, Micro-USB interfaces share 5 signals
Pin, it is respectively：Power pins (VBUS), identification data wire pin (USB_ID), for positive transmission data pin (D+), negative pass
Send data pin (D-) and grounding pin (GND).That is, the identification interface in interface module 110 is in Micro-USB interfaces
Identification data wire pin (USB_ID).
When connecting the OTG data wire access interface modules 110 of OTG equipment, it is equivalent in OTG equipment, USB_ID draws
Pin is grounded；When connecting the charging data line access interface module 110 of power supply adaptor, the USB_ in power supply adaptor is equivalent to
ID pin floatings；When the even OTG charging data line access interface modules 110 of special installation, it is equivalent in special installation
USB_ID pins are grounded by resistance R6.
As shown in Fig. 2 in one embodiment, debugging module 120 also include first switch pipe Q1, second switch pipe Q2 and
Debugging unit 121.First switch pipe Q1 includes the first control terminal, the first connection end and second connection end, and the first control terminal is through adjusting
Examination unit 121 is connected with interface module 110；First connection end is connected with the first power module 140, the first output end TP1 respectively；
Second connection end is grounded.Second switch pipe Q2 includes the second control terminal, the 3rd connection end and the 4th connection end, the second control terminal point
Be not connected with interface module 110, debugging unit 121, the 3rd connection end respectively with the first power module 140, the second output end TP2
Connection；4th connection end is grounded.
The Type Control first switch pipe Q1 for the data wire that debugging unit 121 accesses according to interface module 110 respectively, second
Switching tube Q2 working condition is to export corresponding level signal to the first output end TP1, the second output end TP2.
Further, first switch pipe Q1, second switch pipe Q2 are metal-oxide-semiconductor.Wherein, first switch pipe Q1 grid is
First control terminal, draining as the first connection end, first switch pipe Q1 source electrode for first switch pipe Q1 is second connection end；Second
Switching tube Q2 grid is the second control terminal, and second switch pipe Q2 drain electrode is the 3rd connection end, second switch pipe Q2 source electrode
For the 4th connection end.That is, first switch pipe Q1 grid is connected with the USB_ID pins of interface module 110, first switch pipe
Q1 drain electrode is connected with the first power module 140, the first output end TP1 respectively, first switch pipe Q1 source ground.Second opens
The grid for closing pipe Q2 is connected with the USB_ID pins of interface module 110, second switch pipe Q2 drain electrode respectively with the first power supply mould
Block 140, the second output end TP2 connections, second switch pipe Q2 source ground.Wherein, the first power module 140 is used for processing
Device 130 is powered, to meet the power demands of processor 130.
It is to be further understood that first switch pipe Q1 and second switch pipe Q2 are metal-oxide-semiconductor, the conduction voltage drop of its metal-oxide-semiconductor
For V0.As metal-oxide-semiconductor grid, the pressure drop V of source electrodeGSLess than V0When, metal-oxide-semiconductor is not turned on, in cut-off state, now, metal-oxide-semiconductor drain electrode
Resistance with source electrode is equivalent to infinity.As metal-oxide-semiconductor grid, the pressure drop V of source electrodeGSMore than V0When, metal-oxide-semiconductor conducting, now, MOS
Pipe drains and the impedance of source electrode is equivalent to 0ohm.
Wherein, when first switch pipe Q1 is turned on, the level signal of its first output end TP1 outputs is low level signal；
When first switch pipe Q1 ends, the level signal of its first output end TP1 outputs is high level signal.Accordingly, when second
When switching tube Q2 is turned on, the level signal of its second output end TP2 outputs is low level signal；When second switch pipe Q2 ends
When, the level signal of its second output end TP2 outputs is high level signal.
Type Control first switch pipe Q1, the second switch for the data wire that debugging unit 121 accesses according to interface module 110
Pipe Q2 working condition (on or off) is to export corresponding level signal to the first output end TP1, the second output end TP2.
Optionally, first switch pipe Q1, second switch pipe Q2 can also be triode or other have the electricity of conducting voltage
Sub switch pipe.
In one embodiment, processor 130 is provided with multiple GPIO interfaces, its first output end TP1, the second output end
TP2 is corresponded to be connected with two GPIO interfaces on processor 130 respectively.
Processor 130 receives the level signal of the first output end TP1, the second output end TP2 output, and processor 130 can be with
According to truth table (such as table 1 of the data wire type of storage and the first output end TP1, the second output end TP2 level signal exported
It is shown), identify insertion interface module 110 data wire type.
Table 1 is the truth table of data wire type and the level signal of the first output end TP1, the second output end TP2 output
| The type of data wire | First output end TP1 | Second output TP2 |
| OTG data wires | 1 | 1 |
| Charging data line | 0 | 0 |
| OTG charging data lines | 0 | 1 |
Specifically, when the level signal of the first output end TP1, the second output end TP2 output is high level, data wire
For OTG data wires；When the level signal of the first output end TP1, the second output end TP2 output is low level, data wire is
Charging data line；When the level signal of the first output end TP1 outputs is low level and the level letter of the second output end TP2 outputs
When number being high level, data wire is OTG charging data lines.
By above-mentioned data wire identification circuit, processor 130 can be defeated according to the first output end TP1, the second output end TP2
The level signal gone out, the type of the data wire of insertion interface module 110 can be identified, that is, can identify with data
The OTG data wires of transfer function, have charge function charging data line and be provided simultaneously with data-transformation facility and charging work(
The OTG charging data lines of energy.That is, by above-mentioned data wire identification circuit, data-transformation facility and charging can be realized simultaneously
The parallel execution of function.
In one embodiment, debugging module includes first resistor R1, second resistance R2 and the 3rd resistor being sequentially connected
R3, first resistor R1, second resistance R2,3rd resistor R3 are used for partial pressure.First resistor R1 one end and second source module 140
Connection, first resistor R1, second resistance R2 common port are connected with the first control terminal；Second resistance R2,3rd resistor R3 public affairs
End is connected with interface module 110, the second control terminal respectively altogether, 3rd resistor R3 other end ground connection.Wherein, second source module
140 be DC power supplier, and its DC voltage exported is represented with V2, and V2 can be 3.3 volts.
When the USB_ID pin interface OTG data wires of interface module 110, the voltage V of first switch pipe Q1 gridsG1=
V2*R2/ (R1+R2), second switch pipe Q2 grid voltage are 0V, and second switch pipe Q2 is not turned on.
When the USB_ID pin interface charging data lines of interface module 110, the voltage V of first switch pipe Q1 gridsG1'=
V2*R3/(R1+R2+R3)；Second switch pipe Q2 grid voltage is VG2'=V2* (R2+R3)/(R1+R2+R3).
Due to when the even OTG charging data line access interface modules 110 of special installation, being equivalent in special installation
USB_ID pins are grounded through resistance R6.When the USB_ID pin interface OTG charging data lines of interface module 110, second switch
The impedance R of pipe Q2 grid over the groundX=R6*R3/ (R6+R3), now, the voltage V of first switch pipe Q1 gridsG1"=V2* (R2+
Rx)/(R1+R2+Rx), the voltage V of second switch pipe Q2 gridsG2"=V2*Rx/ (R1+R2+Rx).
When the level signal of the first output end TP1, the second output end TP2 output is high level, it can be determined that go out to connect
The data wire of incoming interface module 110 is OTG data wires；Namely, it is necessary to first switch pipe Q1, second switch pipe Q2 is set to be in cutting
Only state (being not turned on), meet condition VG1=V2*R2/ (R1+R2) ＜ V0.
When the level signal of the first output end TP1, the second output end TP2 output is low level, data wire is charging
Data wire；Namely, it is necessary to make first switch pipe Q1, second switch pipe Q2 be in conducting state, meet condition VG1'=V2*R3/
(R1+R2+R3) ＞ V0；V2* (R2+R3)/(R1+R2+R3) ＞ V0。
When the first output end TP1 output level signal be low level and the second output end TP2 output level signal be
During high level, data wire is OTG charging data lines.Namely, it is necessary to make that first switch pipe Q1 is in the conduction state, second switch pipe
Q2 is in cut-off state (being not turned on), meets condition：VG1"=V2* (R2+Rx)/(R1+R2+Rx) ＞ V0；VG2"=V1*Rx/
(R1+R2+Rx) ＜ V0。
By setting first resistor R1, second resistance R2,3rd resistor R3 and resistance in rational partial pressure unit
R6 resistance, when interface module 110 inserts different types of data wire, processor 130 can according to the first output end TP1,
The level signal of second output end TP2 outputs, you can judge the type for the data wire that interface module 110 is inserted.
In one embodiment, debugging module 120 also includes the first pull-up resistor R4 and the second pull-up resistor R5.On first
Pull-up resistor R4 one end is connected with the first power module 140, the first pull-up resistor R4 other end respectively with the first output end
TP1, the connection of the first connection end；Second pull-up resistor R5 one end is connected with the first power module 140, the second pull-up resistor R5's
The other end is connected with the second output end TP2, the 3rd connection end respectively.Wherein, the first pull-up resistor R4, the second pull-up resistor R5
Resistance is 10k ohms.
The application also provides a kind of data wire recognition methods, the type of the data wire for identifying access, the class of data wire
Type is OTG data wires, charging data line and OTG charging data lines.
It should be noted that in OTG data wires, OTG is On-The-Go abbreviation, and OTG data wires are mainly used to connect OTG
Equipment, to realize that OTG functions are transmitted data.Charging data line, it can be used for connecting power supply adaptor to realize charging work(
Energy；OTG charging data lines are used for the special installation for connecting the function that can be realized charging and can realize data transfer.
Data wire recognition methods is based on data wire identification circuit, and data wire identification circuit includes the interface mould being sequentially connected
Block, debugging module and processor；Debugging module includes the first output end and the second output end.
Data wire recognition methods includes：
Step 302：When interface module is respectively connected to OTG data wires, charging data line and OTG charging data lines, debugging
Module corresponds to the corresponding level signal of output to the first output end, the second output end respectively.
Specifically, interface module is Micro-USB interfaces, wherein, Micro-USB interfaces share 5 signal pins, respectively
For：Power pins (VBUS), identification data wire pin (USB_ID), draw for positive transmission data pin (D+), negative transmission data
Pin (D-) and grounding pin (GND).That is, the identification interface in interface module is the identification data line in Micro-USB interfaces
Pin (USB_ID), is connected with debugging module.
When connecting the OTG data wire access interface modules of OTG equipment, it is equivalent in OTG equipment, USB_ID pins connect
Ground；When connecting the charging data line access interface module of power supply adaptor, the USB_ID pins in power supply adaptor are equivalent to
Floating；When the even OTG charging data line access interface modules of special installation, it is equivalent to the USB_ID pins in special installation and passes through
Cross resistance eutral grounding.
When interface module is respectively connected to any data line in OTG data wires, charging data line and OTG charging data lines
When, debugging module is according to the data wire type of access, the corresponding corresponding level signal of output to the first output end, the second output
End.
Step 304：Processor obtains the first output end, the level signal of the second output end output.
In one embodiment, processor is provided with multiple GPIO interfaces, and its first output end, the second output end correspond to respectively
It is connected with two GPIO interfaces on processor.
Processor receives the first output end, the level signal of the second output end output by the way that two GPIO interfaces are corresponding.
Step 306：The level that processor exports according to default data wire type and the first output end, the second output end is believed
Number truth table, identification interface module access data wire type.
Processor receives the first output end, the level signal of the second output end output, and processor can be according to the number of storage
The truth table (as shown in table 1) of the level signal exported according to line type and the first output end, the second output end, identifies that insertion connects
The type of the data wire of mouth mold block.
Specifically, when the level signal of the first output end that processor receives, the output of the second output end is high level
When, data wire is OTG data wires；When the level signal of the first output end that processor receives, the output of the second output end is
During low level, data wire is charging data line；The level signal of the first output end output received when processor is low level,
And second output end output level signal when being high level, data wire is OTG charging data lines.
By above-mentioned data wire recognition methods, processor can be according to the first output end, the level of the second output end output
Signal, the type of the data wire of insertion interface module can be identified, that is, can identify with data-transformation facility
OTG data wires, the charging data line with charge function and the OTG chargings for being provided simultaneously with data-transformation facility and charge function
Data wire.That is, by above-mentioned data wire recognition methods, it can realize that data-transformation facility and the parallel of charge function are held simultaneously
OK.
In one embodiment, debugging module also includes first switch pipe, second switch pipe and debugging unit；Wherein,
One switching tube includes the first control terminal, the first connection end and second connection end, the adapted unit of the first control terminal and interface module
Connection；First connection end is connected with the first power module, the first output end respectively；Second connection end is grounded；Second switch pipe bag
The second control terminal, the 3rd connection end and the 4th connection end are included, the second control terminal is connected with interface module, debugging unit respectively, the
Three connection ends are connected with the first power module, the second output end respectively；4th connection end is grounded.
Further, first switch pipe, second switch pipe are metal-oxide-semiconductor.Wherein, the grid of first switch pipe is the first control
End processed, draining as the first connection end, the source electrode of first switch pipe for first switch pipe is second connection end；The grid of second switch pipe
Extremely the second control terminal, draining as the 3rd connection end, the source electrode of second switch pipe for second switch pipe is the 4th connection end.
That is, the USB_ID pins connection of the grid of first switch pipe and interface module, the drain electrode of first switch pipe respectively with the first power supply
Module, the connection of the first output end, the source ground of first switch pipe.The grid of second switch pipe and the USB_ID of interface module draw
Pin is connected, and the drain electrode of second switch pipe is connected with the first power module, the second output end respectively, and the source electrode of second switch pipe connects
Ground.Wherein, the first power module is used to power to processor, to meet the power demands of processor.
Specifically, when first switch pipe turns on, the level signal of the first output end output is low level；Work as first switch
When pipe ends, the level signal of the first output end output is high level；When second switch pipe turns on, the output of the second output end
Level signal is low level；When second switch pipe ends, the level signal of the second output end output is high level.
The work of Type Control the first switch pipe, second switch pipe of the data wire that debugging unit accesses according to interface module
State (on or off) is to export corresponding level signal to the first output end, the second output end.
In one embodiment, debugging module includes first resistor R1, second resistance R2 and the 3rd resistor being sequentially connected
R3, first resistor R1, second resistance R2,3rd resistor R3 are used for partial pressure.First resistor R1 one end connects with second source module
Connect, first resistor R1, second resistance R2 common port are connected with the first control terminal；Second resistance R2,3rd resistor R3 it is public
End is connected with interface module, the second control terminal respectively, 3rd resistor R3 other end ground connection.Wherein, second source module is straight
Power module is flowed, its DC voltage exported is represented with V2, and V2 can be 3.3 volts.
When the USB_ID pin interface OTG data wires of interface module, the voltage V of first switch tube gridG1=V2*R2/
(R1+R2), the grid voltage of second switch pipe is 0V, and second switch pipe is not turned on.
When the USB_ID pin interface charging data lines of interface module 110, the voltage V of first switch tube gridG1'=
V2*R3/(R1+R2+R3)；The grid voltage of second switch pipe is VG2'=V2* (R2+R3)/(R1+R2+R3).
Due to when the even OTG charging data line access interface modules of special installation, being equivalent to the USB_ in special installation
ID pins are grounded through resistance R6.When the USB_ID pin interface OTG charging data lines of interface module, the grid of second switch pipe
Impedance R over the groundX=R6*R3/ (R6+R3), now, the voltage V of first switch tube gridG1"=V2* (R2+Rx)/(R1+R2+
Rx), the voltage V of second switch tube gridG2"=V2*Rx/ (R1+R2+Rx).
When the level signal that the first output end, the second output end export is high level, it can be determined that go out access interface
The data wire of module is OTG data wires；Namely (do not led, it is necessary to make first switch pipe, second switch pipe be in cut-off state
It is logical), acquisition meets condition 1：VG1=V2*R2/ (R1+R2) ＜ V0。
When the level signal that the first output end, the second output end export is low level, data wire is charging data line；
Namely, it is necessary to make first switch pipe, second switch pipe be in conducting state, acquisition meets condition 2：VG1'=V2*R3/ (R1+
R2+R3) ＞ V0；V2* (R2+R3)/(R1+R2+R3) ＞ V0。
When the level signal of the first output end output is that the level signal that low level and the second output end export is high level
When, data wire is OTG charging data lines.Namely, it is necessary to make that first switch pipe is in the conduction state, second switch pipe is in cutting
Only state (being not turned on), acquisition meet condition 3：VG1"=V2* (R2+Rx)/(R1+R2+Rx) ＞ V0；VG2"=V1*Rx/ (R1+R2
+ Rx) ＜ V0。
When the condition that meets 1,2,3 while when setting up, calculate first resistor R1 in partial pressure unit, second resistance R2,
3rd resistor R3 and resistance R6 resistance, and assignment is carried out to corresponding resistance.When interface module inserts different types of number
During according to line, processor be able to can be identified with data transfer according to the first output end, the level signal of the second output end output
The OTG data wires of function, the charging data line with charge function and it is provided simultaneously with data-transformation facility and charge function
OTG charging data lines.That is, by above-mentioned data wire recognition methods, data-transformation facility and charge function can be realized simultaneously
Parallel execution.
The application also provides a kind of terminal, and the terminal possesses with OTG functions, and terminal is including in any of the above-described embodiment
Data wire identification circuit.By setting data wire identification circuit in terminal, the OTG with data-transformation facility can be identified
Data wire, the charging data line with charge function and the OTG charging numbers for being provided simultaneously with data-transformation facility and charge function
According to line.That is, terminal realizes the parallel transmission of data-transformation facility and charge function by OTG charging data lines simultaneously.
As shown in figure 4, for convenience of description, it illustrate only the part related to the embodiment of the present application, particular technique details
Do not disclose, refer to the embodiment of the present application method part.The terminal can be to include mobile phone, tablet personal computer, PDA
(Personal Digital Assistant, personal digital assistant), POS (Point of Sales, point-of-sale terminal), vehicle mounted electric
Any terminal device such as brain, Wearable, so that terminal is mobile phone as an example：
Fig. 4 is the block diagram of the part-structure of the mobile phone related to the terminal of the embodiment of the present application offer.With reference to figure 4, mobile phone
Including：Radio frequency (Radio Frequency, RF) circuit 410, memory 420, input block 430, display unit 440, sensor
450th, voicefrequency circuit 460, Wireless Fidelity (wireless fidelity, WiFi) module 470, processor 480 and power supply 490
Deng part.It will be understood by those skilled in the art that the handset structure shown in Fig. 4 does not form the restriction to mobile phone, can include
Than illustrating more or less parts, some parts or different parts arrangement are either combined.
Wherein, RF circuits 410 can be used for receive and send messages or communication process in, the reception and transmission of signal can be by base stations
After downlink information receives, handled to processor 480；Up data can also be sent to base station.Generally, RF circuits include but
Be not limited to antenna, at least one amplifier, transceiver, coupler, low-noise amplifier (Low Noise Amplifier,
LNA), duplexer etc..In addition, RF circuits 410 can also be communicated by radio communication with network and other equipment.Above-mentioned channel radio
Letter can use any communication standard or agreement, including but not limited to global system for mobile communications (Global System of
Mobile communication, GSM), general packet radio service (General Packet Radio Service,
GPRS), CDMA (Code Division Multiple Access, CDMA), WCDMA (Wideband Code
Division Multiple Access, WCDMA), Long Term Evolution (Long Term Evolution, LTE)), Email,
Short Message Service (Short Messaging Service, SMS) etc..
Memory 420 can be used for storage software program and module, and processor 480 is stored in memory 420 by operation
Software program and module, so as to perform the various function application of mobile phone and data processing.Memory 420 can mainly include
Program storage area and data storage area, wherein, program storage area can storage program area, the application journey needed at least one function
Sequence (such as the application program of sound-playing function, application program of image player function etc.) etc.；Data storage area can store root
Created data (such as voice data, address list etc.) etc. are used according to mobile phone.In addition, memory 420 can be included at a high speed
Random access memory, can also include nonvolatile memory, a for example, at least disk memory, flush memory device or
Other volatile solid-state parts.
Input block 430 can be used for the numeral or character information for receiving input, and produces and set with the user of mobile phone 400
And the key signals input that function control is relevant.Specifically, input block 430 may include contact panel 431 and other inputs
Equipment 432.Contact panel 431, alternatively referred to as touch-screen, collect touch operation (such as user of the user on or near it
Use the operation of any suitable object such as finger, stylus or annex on contact panel 431 or near contact panel 431),
And corresponding attachment means are driven according to formula set in advance.In one embodiment, contact panel 431 may include to touch inspection
Survey two parts of device and touch controller.Wherein, the touch orientation of touch detecting apparatus detection user, and detect touch operation
The signal brought, transmits a signal to touch controller；Touch controller receives touch information from touch detecting apparatus, and will
It is converted into contact coordinate, then gives processor 480, and the order sent of reception processing device 480 and can be performed.In addition,
The polytypes such as resistance-type, condenser type, infrared ray and surface acoustic wave can be used to realize contact panel 431.Except touch surface
Plate 431, input block 430 can also include data wire identification circuit 432.Display unit 440 can be used for display to be inputted by user
Information or be supplied to the information of user and the various menus of mobile phone.Display unit 440 may include display panel 441.One
In individual embodiment, liquid crystal display (Liquid Crystal Display, LCD), Organic Light Emitting Diode can be used
Forms such as (Organic Light-Emitting Diode, OLED) configures display panel 441.In one embodiment, touch
Control panel 431 can cover display panel 441, after contact panel 431 detects the touch operation on or near it, send to
Processor 480 is followed by subsequent processing device 480 according to the type of touch event on display panel 441 to determine the type of touch event
Corresponding visual output is provided.Although in Fig. 4, contact panel 431 is that the part independent as two comes with display panel 441
Input and the input function of mobile phone are realized, but in some embodiments it is possible to contact panel 431 and display panel 441 are collected
Into and realize input and the output function of mobile phone.
Mobile phone 400 may also include at least one sensor 450, such as optical sensor, motion sensor and other sensings
Device.Specifically, optical sensor may include ambient light sensor and proximity transducer, wherein, ambient light sensor can be according to environment
The light and shade of light adjusts the brightness of display panel 441, and proximity transducer can close display panel when mobile phone is moved in one's ear
441 and/or backlight.Motion sensor may include acceleration transducer, can detect by acceleration transducer and adds in all directions
The size of speed, size and the direction of gravity are can detect that when static, application (such as the horizontal/vertical screen available for identification mobile phone posture
Switching), Vibration identification correlation function (such as pedometer, tap) etc.；In addition, mobile phone can also configure gyroscope, barometer, humidity
Other sensors such as meter, thermometer, infrared ray sensor etc..
Voicefrequency circuit 460, loudspeaker 461 and microphone 462 can provide the COBBAIF between user and mobile phone.Audio-frequency electric
Electric signal after the voice data received conversion can be transferred to loudspeaker 461, sound is converted to by loudspeaker 461 by road 460
Signal output；On the other hand, the voice signal of collection is converted to electric signal by microphone 462, is turned after being received by voicefrequency circuit 460
Voice data is changed to, then after voice data output processor 480 is handled, another mobile phone can be sent to through RF circuits 410, or
Person exports voice data to memory 420 so as to subsequent treatment.
WiFi belongs to short range wireless transmission technology, and mobile phone can help user's transceiver electronicses postal by WiFi module 470
Part, browse webpage and access streaming video etc., it has provided the user wireless broadband internet and accessed.Although Fig. 4 is shown
WiFi module 470, but it is understood that, it is simultaneously not belonging to must be configured into for mobile phone 400, can omit as needed.
Processor 480 is the control centre of mobile phone, using various interfaces and the various pieces of connection whole mobile phone, is led to
Cross operation or perform the software program and/or module being stored in memory 420, and call and be stored in memory 420
Data, the various functions and processing data of mobile phone are performed, so as to carry out integral monitoring to mobile phone.In one embodiment, handle
Device 480 may include one or more processing units.In one embodiment, processor 480 can integrate application processor and modulation
Demodulation processor, wherein, application processor mainly handles operating system, user interface and application program etc.；Modulation /demodulation is handled
Device mainly handles radio communication.It is understood that above-mentioned modem processor can not also be integrated into processor 480.
Mobile phone 400 also includes the power supply 490 (such as battery) to all parts power supply, it is preferred that power supply can pass through electricity
Management system and processor 480 are logically contiguous, so as to realize management charging, electric discharge and power consumption by power-supply management system
The functions such as management.
In one embodiment, mobile phone 400 can also include camera, bluetooth module etc..
Any reference to memory, storage, database or other media used in this application may include non-volatile
And/or volatile memory.Suitable nonvolatile memory may include read-only storage (ROM), programming ROM (PROM),
Electrically programmable ROM (EPROM), electrically erasable ROM (EEPROM) or flash memory.Volatile memory may include arbitrary access
Memory (RAM), it is used as external cache.By way of illustration and not limitation, RAM is available in many forms, such as
It is static RAM (SRAM), dynamic ram (DRAM), synchronous dram (SDRAM), double data rate sdram (DDR SDRAM), enhanced
SDRAM (ESDRAM), synchronization link (Synchlink) DRAM (SLDRAM), memory bus (Rambus) direct RAM
(RDRAM), direct memory bus dynamic ram (DRDRAM) and memory bus dynamic ram (RDRAM).
Embodiment described above only expresses the several embodiments of the application, and its description is more specific and detailed, but simultaneously
Therefore the limitation to the application the scope of the claims can not be interpreted as.It should be pointed out that for one of ordinary skill in the art
For, on the premise of the application design is not departed from, various modifications and improvements can be made, these belong to the guarantor of the application
Protect scope.Therefore, the protection domain of the application patent should be determined by the appended claims.
Claims (10)
1. a kind of data wire identification circuit, it is characterised in that for the type for the data wire for identifying access, the class of the data wire
Type includes OTG data wires, charging data line and OTG charging data lines；
The interface identification circuit, including：
Interface module, for accessing the OTG data wires, charging data line and OTG charging data lines；
Debugging module, it is connected with the interface module, the debugging module includes the first output end and the second output end, for root
Different data wire types is accessed according to the interface module, corresponds to the corresponding level signal of output respectively to the described first output
End, the second output end；
Processor, it is connected respectively with first output end, the second output end, for obtaining first output end, second defeated
Go out to hold the level signal of output, and the data wire accessed according to the level signal of the output identification interface module
Type.
2. data wire identification circuit according to claim 1, it is characterised in that the debugging module, in addition to first open
Guan Guan, second switch pipe and debugging unit；
The first switch pipe includes the first control terminal, the first connection end and second connection end, described in the first control terminal warp
Debugging unit is connected with the interface module；First connection end is connected with the first power module, the first output end respectively；Institute
State second connection end ground connection；
The second switch pipe includes the second control terminal, the 3rd connection end and the 4th connection end, second control terminal respectively with
The interface module, debugging unit connection, the 3rd connection end connect with first power module, the second output end respectively
Connect；The 4th connection end ground connection；
The debugging unit, the type of the data wire for being accessed according to the interface module control the first switch respectively
Pipe, the working condition of second switch pipe are to export corresponding level signal to first output end, the second output end.
3. data wire identification circuit according to claim 2, it is characterised in that the debugging module debugging unit include according to
First resistor, second resistance and the 3rd resistor of secondary connection；
One end of the first resistor is connected with second source module, the first resistor, second resistance common port with it is described
First control terminal connects；The second resistance, the common port of 3rd resistor connect with the interface module, the second control terminal respectively
Connect, the other end ground connection of the 3rd resistor.
4. data wire identification circuit according to claim 2, it is characterised in that the first switch pipe, second switch pipe
It is metal-oxide-semiconductor；
The grid of the first switch pipe is first control terminal, and the drain electrode of the first switch pipe is the described first connection
End, the source electrode of the first switch pipe are the second connection end；
The grid of the second switch pipe is second control terminal, and the drain electrode of the second switch pipe is the described 3rd connection
End, the source electrode of the second switch pipe are the 4th connection end.
5. data wire identification circuit according to claim 2, it is characterised in that the debugging module also includes the first pull-up
Resistance and the second pull-up resistor；
One end of first pull-up resistor is connected with first power module, the other end difference of first pull-up resistor
It is connected with first output end, first connection end；
One end of second pull-up resistor is connected with first power module, the other end difference of second pull-up resistor
It is connected with second output end, the 3rd connection end.
6. data wire identification circuit according to claim 1, it is characterised in that the interface module, which comprises at least, to be used to know
Not described OTG data wires, the identification interface of charging data line, the identification interface are connected with the debugging module.
7. a kind of data wire recognition methods, it is characterised in that for the type for the data wire for identifying access, the class of the data wire
Type includes OTG data wires, charging data line and OTG charging data lines；The recognition methods is based on data wire identification circuit, described
Data wire identification circuit, including interface module, debugging module and the processor being sequentially connected；It is defeated that the debugging module includes first
Go out end and the second output end；
When the interface module is respectively connected to OTG data wires, charging data line and OTG charging data lines, the debugging module
The corresponding level signal of output is corresponded to respectively to first output end, the second output end；
The processor obtains first output end, the level signal of the second output end output；
The level signal that the processor exports according to default data wire type and first output end, the second output end
Truth table, identify the type of the data wire of the interface module access.
8. data wire recognition methods according to claim 7, it is characterised in that the identification interface module access
The type of the data wire, including：
When the level signal that first output end, the second output end export is high level, the data wire is OTG data
Line；
When the level signal that first output end, the second output end export is low level, the data wire is charging number
According to line；
When the level signal of first output end output is that the level signal that low level and the second output end export is high level
When, the data wire is OTG charging data lines.
9. data wire recognition methods according to claim 8, it is characterised in that the debugging module also includes first switch
Pipe, second switch pipe and debugging unit；Wherein, the first switch pipe includes the first control terminal, the first connection end and second connects
End is connect, first control terminal is connected through the debugging unit with the interface module；First connection end is respectively with first
Power module, the connection of the first output end；The second connection end ground connection；The second switch pipe includes the second control terminal, the 3rd
Connection end and the 4th connection end, second control terminal are connected with the interface module, debugging unit respectively, the 3rd connection
End is connected with first power module, the second output end respectively；The 4th connection end ground connection；
When the first switch pipe turns on, the level signal of the first output end output is low level；
When the first switch pipe ends, the level signal of the first output end output is high level；
When the second switch pipe turns on, the level signal of the second output end output is low level；
When the second switch pipe ends, the level signal of the second output end output is high level.
10. a kind of terminal, it is characterised in that including the data wire identification circuit as described in any in claim 1~6.
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| CN201710944527.3A CN107632949B (en) | 2017-09-30 | 2017-09-30 | Data line identification circuit, method and terminal |
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| CN108647160A (en) * | 2018-06-28 | 2018-10-12 | 努比亚技术有限公司 | USB force downloads circuit, mobile terminal, method for down loading and data line |
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| CN115391258A (en) * | 2022-08-16 | 2022-11-25 | 云码智能(海南)科技有限公司 | Interface management circuit, method, apparatus, device, storage medium, and program product |
| CN115391258B (en) * | 2022-08-16 | 2023-05-02 | 云码智能(海南)科技有限公司 | Interface management circuit, method, apparatus, device, storage medium, and program product |
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