CN107613640B - Surface mounting method and printed circuit board assembly - Google Patents
Surface mounting method and printed circuit board assembly Download PDFInfo
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- CN107613640B CN107613640B CN201710701953.4A CN201710701953A CN107613640B CN 107613640 B CN107613640 B CN 107613640B CN 201710701953 A CN201710701953 A CN 201710701953A CN 107613640 B CN107613640 B CN 107613640B
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Abstract
The invention relates to a surface mounting method, which comprises the following steps: a. preparing a sub printed circuit board to be soldered to a main printed circuit board, wherein the sub printed circuit board is provided with a first intermediate pad and a first peripheral pad, the main printed circuit board is provided with a second peripheral pad, and the first peripheral pad and the second peripheral pad correspond to the same device package; b. welding a chip to be welded on a first middle bonding pad of the sub-printed circuit board; c. overlaying the sub printed circuit board on the main printed circuit board by soldering the first peripheral pad and the second peripheral pad to each other. The invention also relates to a printed circuit board assembly.
Description
Technical Field
The present invention relates to the field of electronic circuit technology, and more particularly, to a surface mounting method and a printed circuit board assembly.
Background
In the manufacturing process of electronic circuits, it is often found that some mass-produced printed circuit boards have defects or that the actual chips do not conform to the pads on the circuit board, resulting in some chips not being properly soldered to the printed circuit board. Accordingly, there is a need for an improved surface mounting method.
Disclosure of Invention
The technical problem to be solved by the invention is as follows: the problem of printed circuit board pads incompatible with chip packaging.
In order to solve the technical problems, the invention adopts the technical scheme that:
in a first aspect, the present invention provides a surface mounting method, including: a. preparing a sub printed circuit board to be soldered to a main printed circuit board, wherein the sub printed circuit board is provided with a first intermediate pad and a first peripheral pad, the main printed circuit board is provided with a second peripheral pad, and the first peripheral pad and the second peripheral pad correspond to the same device package; b. welding a chip to be welded on a first middle bonding pad of the sub-printed circuit board; c. overlaying the sub printed circuit board on the main printed circuit board by soldering the first peripheral pad and the second peripheral pad to each other.
In another aspect, the present invention provides a printed circuit board assembly manufactured using the above surface mounting method.
In a further aspect, the present invention provides a printed circuit board assembly, comprising a main printed circuit board and a sub printed circuit board, wherein the sub printed circuit board is stitch-bonded on the main printed circuit board, the sub printed circuit board is provided with a first intermediate pad for bonding a chip to be bonded and a first peripheral pad for bonding a peripheral circuit device associated with the chip to be bonded.
The invention has the beneficial effects that: the chip with the packaging form incompatible with the main printed circuit board is mounted on the printed circuit board assembly by utilizing the sub printed circuit board, and the normal work of the chip and other circuit elements is not influenced, so that the problem of replacing incompatible materials is solved, the manufacturing cost of products is reduced, and the device waste is reduced.
Drawings
Fig. 1 is a flowchart of a surface mounting method according to an embodiment of the present invention;
FIG. 2 is a schematic view of a main printed circuit board according to an embodiment of the present invention;
FIG. 3 is a schematic view of a daughter printed circuit board according to an embodiment of the present invention;
fig. 4 is a schematic diagram of a printed circuit board assembly according to an embodiment of the present invention.
Description of reference numerals:
1. a main printed circuit board; 2. a sub-printed circuit board; 11. a second intermediate pad; 12. a second peripheral pad; 21. a first intermediate pad; 22. a first peripheral pad; 23. a peripheral pad.
Detailed Description
In order to explain technical contents, achieved objects, and effects of the present invention in detail, the following description is made with reference to the accompanying drawings in combination with the embodiments.
The most critical concept of the present invention is to mount a chip having a packaging form incompatible with a main printed circuit board on a printed circuit board assembly using a sub printed circuit board, thereby solving the problem of substitution of incompatible materials.
Referring to fig. 1, a surface mounting method according to an embodiment of the present invention includes the steps of:
a. preparing a sub printed circuit board 2 to be used for soldering to a main printed circuit board 1, wherein the sub printed circuit board 2 is provided with a first intermediate pad 21 and a first peripheral pad 22, the main printed circuit board 1 is provided with a second peripheral pad 12, and the first peripheral pad 22 and the second peripheral pad 12 correspond to the same device package; b. a chip to be soldered (not shown in the drawings, such as a multi-pin chip) is soldered on the first intermediate pad 21 of the sub printed circuit board 2; c. the sub printed circuit board 2 is stitch-bonded on the main printed circuit board 1 by soldering the first peripheral land 22 and the second peripheral land 12 to each other.
Referring to fig. 1 to 3, a printed circuit board assembly according to an embodiment of the present invention includes a main printed circuit board 1 and a sub printed circuit board 2, wherein the sub printed circuit board 2 is stitch-bonded on the main printed circuit board 1, the sub printed circuit board 2 is provided with a first intermediate pad 21 and a first peripheral pad 22, the first intermediate pad 21 is used for bonding a chip to be bonded, and the first peripheral pad 22 is used for bonding a peripheral circuit device associated with the chip to be bonded.
By using the method and the printed circuit board assembly, the problem of incompatibility between the PCB and the chip material can be solved, the manufacturing cost of the product is reduced, and the waste of devices is reduced.
Optionally, step b further comprises soldering peripheral circuit elements associated with the chip to be soldered to the first peripheral pad 22. The peripheral circuit element and the chip to be welded are welded on the sub-printed circuit board together, so that the influence of the working process of the chip to be welded can be reduced as much as possible.
Optionally, the main pcb 1 is further provided with a second intermediate pad 11, and the first intermediate pad 21 and the second intermediate pad 11 correspond to different device packages. This solves the problem of incompatibility of the intermediate pads of the main printed circuit board with the packaging of the chip to be soldered.
Optionally, the first peripheral pad 22 has a smaller surface area than the second peripheral pad 12. This allows some gaps to exist between the sub printed circuit board and the main printed circuit board without affecting other pads, thereby facilitating soldering between the sub printed circuit board and the main printed circuit board.
Alternatively, the distance between the first peripheral pad 22 and the first intermediate pad 21 is smaller with respect to the distance between the second peripheral pad 12 and the second intermediate pad 11. By narrowing the distance between the first peripheral land 22 and the second intermediate land 11, the area of the sub-printed circuit board can be reduced, thereby facilitating mounting.
Optionally, the peripheral circuit elements comprise capacitors, resistors and/or inductors in the form of a chip package.
Alternatively, the first intermediate pad 21 has a different number of sub-pads from the second intermediate pad 11. Alternatively, the first intermediate pad 21 has a different pad shape from the second intermediate pad 11. Optionally, the first intermediate pad 21 has a different pad size than the second intermediate pad 11. So that the first intermediate pad and the second intermediate pad may have different specifications.
Optionally, the first peripheral pad 22 is located on a side or a back surface of the sub printed circuit board 2. This facilitates soldering of the first peripheral lands 22 with lands (e.g., second peripheral lands) on the main printed circuit board 1, thereby soldering the sub printed circuit board 2 on the main printed circuit board 1.
Optionally, the first peripheral pads 22 further include peripheral pads 23 located at the edge of the sub-pcb 2, corresponding to all external signal ports of the chip to be soldered and its peripheral circuit elements one to one. The provision of the peripheral pads can facilitate the detection of the function of the sub printed circuit board and can further enhance the fixation between the sub printed circuit board and the main printed circuit board.
Optionally, the method further includes a step of performing solder resist processing on the second intermediate pad 11. The solder resist process can prevent the second intermediate pad 11 of the main printed circuit board from short-circuiting. Since the second intermediate pad 11 is a pad that is not currently used, it should not be made to affect the circuit operation.
Optionally, a ground pad is provided in the center of the second intermediate pad 11 for connecting the sub printed circuit board to the main printed circuit board 1. This can ensure reliability of stitch welding and improve drop resistance.
Optionally, the peripheral pads 23 comprise semi-circular through holes for soldering with the main printed circuit board 1. The semi-circular through holes may facilitate leakage out of the pads on the main printed circuit board below the peripheral pads and subsequent soldering operations.
Optionally, the chip to be soldered is a chip in the form of a package such as an SOP, SOT, QFP, PLCC, BGA, and/or QFN.
FIG. 2 shows a schematic diagram of a main printed circuit board according to an embodiment of the invention. The main printed circuit board 1 is provided with a second intermediate pad 11 and a second peripheral pad 12. Wherein the second intermediate pad 11 is a pad that needs to be replaced because it is not compatible with the package (or pad) of the chip to be soldered. The chip to be soldered is, for example, a DC/DC switching power supply chip, and the second intermediate pad 11 corresponds to a pad of the first type of the DC/DC switching power supply chip, so that the second intermediate pad 11 generally has a plurality of sub-pads. The pads to be soldered may be chips in the form of packages such as SOPs, SOTs, QFPs, PLCCs, BGAs and/or QFNs, so that the second intermediate pads 11 have sub-pads corresponding to the packages of the chips. Although the second intermediate pad 11 is shown in fig. 1 as having 10 sub-pads, it may have any number of sub-pads. And the second peripheral pad 12 is a peripheral circuit of the chip to be soldered, such as a capacitor, a resistor and/or an inductor, so that the second peripheral pad 12 generally comprises two sub-pads.
Fig. 3 shows a schematic view of a daughter printed circuit board according to an embodiment of the present invention. The sub printed circuit board 2 is provided with a first intermediate land 21 and a first peripheral land 22. The first intermediate pad 21 is also used for soldering of a DC/DC switching power supply chip, but the first intermediate pad 21 has a different specification from the second intermediate pad 11, for example, the first intermediate pad 21 corresponds to a chip having 8 legs, and thus can be used for soldering different models of chips. Therefore, with a daughter printed circuit board, a chip with 8 solder tails would be used in place of a chip with 10 solder tails to address the issue of chip package incompatibility with the main printed circuit board.
The first peripheral pad 22 generally has the same pad as the second peripheral pad 12 because it is generally used for bonding peripheral circuit devices such as capacitors, resistors, and the like. Whereas in order to make the sub-printed circuit board 2 have an area as small as possible, i.e. to make the use of the remaining pads or devices on the main printed circuit board as little as possible, the first peripheral pads 22 may have an area smaller than the second peripheral pads 12, and the distance between the first peripheral pads 22 and the first intermediate pads 21 may be smaller relative to the distance between the second peripheral pads 12 and the second intermediate pads 11. So that the sub printed circuit board 2 can have a smaller footprint when it is stitch-bonded to the main printed circuit board 1 to minimize the influence on the remaining devices on the main printed circuit board 1. The first peripheral land 22 may be located on a side or a rear surface of the sub printed circuit board, with it preferably surrounding the first intermediate land 21.
The first peripheral pads 22 may further include peripheral pads 23 at the edge of the sub-pcb 2 in one-to-one correspondence with all external signal ports of the chip to be soldered and its peripheral circuit elements. The peripheral pads 23 may be used to solder with corresponding signal ports on the main printed circuit board 1 to provide signal output to the main printed circuit board 1 or to receive input signals from the main printed circuit board 1, and may additionally facilitate signal detection by a user for the sub printed circuit board 1. The peripheral land 23 further fixedly connects the sub printed circuit board 2 with the main printed circuit board 1. The peripheral land 23 may include a semicircular through-hole, i.e., a groove located at the edge of the sub printed circuit board 2.
In an alternative example, a ground pad may be provided at the center of the second intermediate land for connecting the sub printed circuit board 2 to the main printed circuit board 1, thereby reinforcing the fixation between the sub printed circuit board 2 and the main printed circuit board 1.
Fig. 4 shows a schematic diagram of a printed circuit board assembly according to an embodiment of the invention. The printed circuit board assembly comprises a main printed circuit board 1 and a sub printed circuit board 2, wherein the sub printed circuit board 2 is stitch-welded on the main printed circuit board 1, the sub printed circuit board 2 is provided with a first middle bonding pad 21 and a first peripheral bonding pad 22, the first middle bonding pad 21 is used for welding a chip to be welded, the first peripheral bonding pad 22 is used for welding a peripheral circuit device related to the chip to be welded, and the first peripheral bonding pad 22 further comprises a peripheral bonding pad 23 which is located at the edge of the sub printed circuit board and corresponds to all external signal ports of the chip to be welded and the peripheral circuit device thereof one to one. In order to replace the second intermediate land 11 with the first intermediate land 21, the sub-pcb 2 will cover a partial area of the main pcb 1, but may work instead of a partial area of the main pcb 1, thereby solving the problem of incompatibility of materials, especially lands. It should be noted that fig. 4 shows hidden from view the portion of the main printed circuit board that should be exposed from the vicinity of the sub printed circuit board 2.
The above description is only an embodiment of the present invention, and not intended to limit the scope of the present invention, and all equivalent changes made by using the contents of the present specification and the drawings, or applied directly or indirectly to the related technical fields, are included in the scope of the present invention.
Claims (12)
1. A surface mounting method is characterized by comprising the following steps:
a. preparing a sub printed circuit board to be soldered to a main printed circuit board, wherein the sub printed circuit board is provided with a first intermediate pad and a first peripheral pad, the main printed circuit board is provided with a second peripheral pad, and the first peripheral pad and the second peripheral pad correspond to the same device package; the main printed circuit board is also provided with a second intermediate bonding pad, and the first intermediate bonding pad and the second intermediate bonding pad correspond to different device packages;
b. welding a chip to be welded on a first middle bonding pad of the sub-printed circuit board; step b further comprises soldering peripheral circuit elements associated with the chip to be soldered to the first peripheral pad;
the first peripheral bonding pad also comprises peripheral bonding pads which are positioned at the edge of the sub-printed circuit board and correspond to all external signal ports of the chip to be welded and the peripheral circuit elements thereof one by one;
the peripheral pad comprises a semicircular through hole for welding with the main printed circuit board;
the surface area of the first peripheral pad is smaller than the surface area of the second peripheral pad;
a distance between the first peripheral pad and the first intermediate pad is smaller relative to a distance between the second peripheral pad and the second intermediate pad;
c. overlaying the sub printed circuit board on the main printed circuit board by soldering the first peripheral pad and the second peripheral pad to each other.
2. A surface mounting method according to claim 1, further comprising the step of solder-resist processing said second intermediate pad.
3. A surface mounting method according to claim 1, wherein a ground pad is provided at the center of said second intermediate land for connecting said sub-pcb to said main pcb.
4. A printed circuit board assembly made by the method of any of claims 1-3.
5. A printed circuit board assembly comprising a main printed circuit board and a sub printed circuit board, wherein the sub printed circuit board is stitch-bonded on the main printed circuit board, the sub printed circuit board is provided with a first intermediate pad and a first peripheral pad, the main printed circuit board is provided with a second peripheral pad, the first intermediate pad is used for bonding a chip to be bonded, and the first peripheral pad and the second peripheral pad correspond to the same device package;
the main printed circuit board is also provided with a second intermediate bonding pad, and the first intermediate bonding pad and the second intermediate bonding pad correspond to different device packages;
the sub-printed circuit board also comprises peripheral bonding pads which are positioned at the edge of the sub-printed circuit board and correspond to all external signal ports of the chip to be welded and the peripheral circuit elements thereof one by one;
the peripheral pad comprises a semicircular through hole for welding with the main printed circuit board;
the surface area of the first peripheral pad is smaller than the surface area of the second peripheral pad;
a distance between the first peripheral pad and the first intermediate pad is smaller relative to a distance between the second peripheral pad and the second intermediate pad;
the first peripheral bonding pad is used for bonding a peripheral circuit device related to the chip to be bonded.
6. The printed circuit board assembly of claim 5, wherein the peripheral circuit elements comprise capacitors, resistors and/or inductors in a chip package.
7. The printed circuit board assembly of claim 5, wherein the first intermediate pad has a different number of sub-pads than the second intermediate pad.
8. The printed circuit board assembly of claim 5, wherein the first intermediate pad has a different pad shape than the second intermediate pad.
9. The printed circuit board assembly of claim 6, wherein the first intermediate pad has a different pad size than the second intermediate pad.
10. The printed circuit board assembly of claim 5, wherein the first perimeter pad is located on a side or back of the daughter printed circuit board.
11. A printed circuit board assembly according to claim 10, wherein the peripheral pads are soldered to signal port pads on the main printed circuit board associated with the chip to be soldered and its peripheral circuit elements.
12. A printed circuit board assembly according to claim 5, characterized in that the chip to be soldered is a chip having the form of an SOP, SOT, QFP, PLCC, BGA and/or QFN package and the peripheral circuit elements comprise capacitors, resistors and/or inductors having the form of a chip package.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710701953.4A CN107613640B (en) | 2017-08-16 | 2017-08-16 | Surface mounting method and printed circuit board assembly |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710701953.4A CN107613640B (en) | 2017-08-16 | 2017-08-16 | Surface mounting method and printed circuit board assembly |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN107613640A CN107613640A (en) | 2018-01-19 |
| CN107613640B true CN107613640B (en) | 2020-03-17 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN201710701953.4A Active CN107613640B (en) | 2017-08-16 | 2017-08-16 | Surface mounting method and printed circuit board assembly |
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Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110312363B (en) * | 2019-06-24 | 2020-10-16 | 维沃移动通信有限公司 | Printed circuit board assembly and terminal |
| CN113709970B (en) * | 2021-07-16 | 2022-03-04 | 北京金百泽科技有限公司 | Electronic equipment, PCB and chip packaging structure thereof |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2006339293A (en) * | 2005-05-31 | 2006-12-14 | Sanyo Electric Co Ltd | Circuit module |
| WO2007072616A1 (en) * | 2005-12-22 | 2007-06-28 | Murata Manufacturing Co., Ltd. | Module having built-in component and method for fabricating such module |
| US9693459B2 (en) * | 2015-07-16 | 2017-06-27 | Delphi Technologies, Inc. | Circuit board assembly and method of manufacturing same |
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| CN107613640A (en) | 2018-01-19 |
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