CN107562379A - A kind of method for lifting solid storage device reading performance - Google Patents
A kind of method for lifting solid storage device reading performance Download PDFInfo
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- CN107562379A CN107562379A CN201710750084.4A CN201710750084A CN107562379A CN 107562379 A CN107562379 A CN 107562379A CN 201710750084 A CN201710750084 A CN 201710750084A CN 107562379 A CN107562379 A CN 107562379A
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Abstract
The invention discloses a kind of method for lifting solid storage device reading performance, it is characterized in that the mapping logic module made of ASIC integrated circuit modules of increase customization, the mapping logic module realizes the function that physical address is converted to according to the logical address of input, the mapping logic module is controlled by FLASH controller, in solid state hard disc power-up initializing, solid-state hard disk controller sets the initial address of mapping table and length to FLASH controller.Logical address is completed to the conversion of physical address so as to reach the purpose of lifting reading performance by using the ASIC logics substitution universal cpu of customization.
Description
Technical field
The present invention relates to storage device control field, more particularly to a kind of method for lifting solid storage device reading performance.
Background technology
Solid storage device realizes conversion of the logical address to physical address by the way of page mapping mostly at present.Using
Page mapping mode needs a very big mapping table, therefore is generally required for extra capacity big for solid storage device but visits
Ask that the relatively low DRAM of speed carrys out memory map assignments.Needing CPU to search mapping table in the request process of processing read command will logically
Location is converted to physical address.It is relatively low that DRAM speed is accessed because of CPU, therefore in high-performance solid storage device, it can turn into herein
Reading performance bottleneck, the tape reading for influenceing solid storage device are wide.
The content of the invention
For disadvantages described above, the present invention seeks to how reduce because CPU searches the less efficient of mapping table, reduction is brought
The problem of tape reading width of solid storage device.
A kind of method for lifting solid storage device reading performance is proposed in order to solve the problem above present invention, its feature exists
In the mapping logic module made of ASIC integrated circuit modules of increase customization, the mapping logic module is realized according to input
Logical address be converted to the function of physical address, the mapping logic module is controlled by FLASH controller, on solid state hard disc
During electricity initialization, solid-state hard disk controller sets the initial address of mapping table and length to FLASH controller.
The method of described lifting solid storage device reading performance, it is characterised in that perform data in accordance with the following steps and read
Take：Solid-state hard disk controller receives user's read command；Solid-state hard disk controller is according to the logical address that read command carries to reading to order
Order is decomposed, and is decomposed into reading unit；According to the read request for reading unit generation carrying logical address；Read request is submitted to
FLASH controller, and continue to decompose read command, until completion is all decomposed in read command；FLASH controller receives reading please
After asking, the logical address entrained by read request is inputed into mapping logic module, realized by mapping logic module from mapping
Physical address corresponding to being searched in table, realizes address conversion and returns to FLASH controller, FLASH controller is according to acquisition
Actual perform from FLASH of physical address reads data, and the data of reading are returned into user.
By the present invention in that with customization ASIC logics substitution universal cpu complete logical address to physical address conversion from
And reach the purpose of lifting reading performance.
Brief description of the drawings
Fig. 1 is existing read command handling process；
Fig. 2 is improved read command handling process.
Embodiment
Below in conjunction with the accompanying drawing in the embodiment of the present invention, the technical scheme in the embodiment of the present invention is carried out clear, complete
Site preparation describes, it is clear that described embodiment is only part of the embodiment of the present invention, rather than whole embodiments.It is based on
Embodiment in the present invention, those of ordinary skill in the art are obtained every other under the premise of creative work is not made
Embodiment, belong to the scope of protection of the invention.
Fig. 1 is existing read command handling process；When main frame has user's read command request, to solid-state hard disk controller
CPU issues user's read command, and when CPU receives user's read command, read command is decomposed, and is decomposed into multiple reading units, by
Individual to handle reading unit, logical address is converted to physical address by each unit of reading respectively by searching mapping table, and
Read request is submitted to FLASH controller, until the reading unit of all decomposition has all been handled；It is specific actual complete by FLASH controller
Into the read operation of data, FLASH controller feeds back to user after completing read request, completes the reading of this subcommand.Therefore such as
When fruit FLASH spaces are big, and store data volume it is big when, mapping table will be very huge, thus search mapping table realize logically
The operation that location is converted to physical address will have a strong impact on reading performance.
Fig. 2 is improved read command handling process；The search procedure of mapping table is patrolled in FLASH controller by mapping
Module is collected to realize, is realized by special AS I B logics.In initial phase, the initial address of mapping table and length are set
Put FLASH controller；By being carried logically in the read request for submit to FLASH controller in read command handling process
Location information, conversion of the logical address to physical address is completed by FLASH controller.Specially：Solid-state hard disk controller, which receives, to be used
Family read command；The logical address that solid-state hard disk controller carries according to read command is decomposed to read command, is decomposed into reading unit；
According to the read request for reading unit generation carrying logical address；Read request is submitted into FLASH controller, and continued to reading to order
Order is decomposed, until completion is all decomposed in read command；After FLASH controller receives read request, by patrolling entrained by read request
Collect address information and input to mapping logic module, physical address corresponding to being searched from mapping table is realized as mapping logic module,
Realize address conversion and return to FLASH controller, FLASH controller is performed from FLASH according to the physical address of acquisition is actual
Data are read, and the data of reading are returned into user.
The above disclosed interest field for being only an embodiment of the present invention, sheet can not being limited with this certainly,
One of ordinary skill in the art will appreciate that all or part of flow of above-described embodiment is realized, and according to the claims in the present invention institute
The equivalent variations of work, still fall within the scope that the present invention is covered.
Claims (2)
1. it is a kind of lifted solid storage device reading performance method, it is characterised in that increase customization by AS I C integrated circuit dies
Mapping logic module made of block, the mapping logic module realize the work(that physical address is converted to according to the logical address of input
Energy, the mapping logic module is controlled by FLASH controller, and in solid state hard disc power-up initializing, solid-state hard disk controller will
The initial address and length of mapping table are set to FLASH controller.
2. the method for lifting solid storage device reading performance according to claim 1, it is characterised in that in accordance with the following steps
Perform digital independent：Solid-state hard disk controller receives user's read command；The logic that solid-state hard disk controller carries according to read command
Address is decomposed to read command, is decomposed into reading unit；According to the read request for reading unit generation carrying logical address；It will read
FLASH controller is submitted in request, and continues to decompose read command, until completion is all decomposed in read command；FLASH controller
After receiving read request, the logical address entrained by read request is inputed into mapping logic module, by mapping logic module
Physical address corresponding to being searched from mapping table is realized, address conversion is realized and returns to FLASH controller, FLASH controller
Data are read according to actual perform from FLASH of the physical address of acquisition, and the data of reading are returned into user.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
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| CN201710750084.4A CN107562379A (en) | 2017-08-28 | 2017-08-28 | A kind of method for lifting solid storage device reading performance |
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| Application Number | Priority Date | Filing Date | Title |
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| CN201710750084.4A CN107562379A (en) | 2017-08-28 | 2017-08-28 | A kind of method for lifting solid storage device reading performance |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109101444A (en) * | 2018-08-22 | 2018-12-28 | 深圳忆联信息***有限公司 | A kind of method and device reducing the random read latency of solid state hard disk |
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| CN101727395A (en) * | 2008-10-17 | 2010-06-09 | 深圳市朗科科技股份有限公司 | Flash memory device and management system and method thereof |
| CN102298561A (en) * | 2011-08-10 | 2011-12-28 | 北京百度网讯科技有限公司 | Method for conducting multi-channel data processing to storage device and system and device |
| US20140289454A1 (en) * | 2013-03-21 | 2014-09-25 | Kabushiki Kaisha Toshiba | Storage device and controller |
| CN105005536A (en) * | 2015-07-01 | 2015-10-28 | 忆正科技（武汉）有限公司 | Working methods for solid-state storage equipment and host, solid-state storage equipment and host |
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2017
- 2017-08-28 CN CN201710750084.4A patent/CN107562379A/en active Pending
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101727395A (en) * | 2008-10-17 | 2010-06-09 | 深圳市朗科科技股份有限公司 | Flash memory device and management system and method thereof |
| CN102298561A (en) * | 2011-08-10 | 2011-12-28 | 北京百度网讯科技有限公司 | Method for conducting multi-channel data processing to storage device and system and device |
| US20140289454A1 (en) * | 2013-03-21 | 2014-09-25 | Kabushiki Kaisha Toshiba | Storage device and controller |
| CN105005536A (en) * | 2015-07-01 | 2015-10-28 | 忆正科技（武汉）有限公司 | Working methods for solid-state storage equipment and host, solid-state storage equipment and host |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109101444A (en) * | 2018-08-22 | 2018-12-28 | 深圳忆联信息***有限公司 | A kind of method and device reducing the random read latency of solid state hard disk |
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Application publication date: 20180109 |