CN107544931B - Computer system with PCI-E intensifier and setting method of PCI-E intensifier - Google Patents
Computer system with PCI-E intensifier and setting method of PCI-E intensifier Download PDFInfo
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- CN107544931B CN107544931B CN201610482327.6A CN201610482327A CN107544931B CN 107544931 B CN107544931 B CN 107544931B CN 201610482327 A CN201610482327 A CN 201610482327A CN 107544931 B CN107544931 B CN 107544931B
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Abstract
The invention discloses a computer system with a PCI-E (peripheral component interconnect-express) enhancer and a setting method of the PCI-E enhancer. When the computer system is started, the central processing unit is connected to the PCI-E module connected with the PCI-E connector and obtains the information of the PCI-E module. The CPU then sets the register of the logic unit according to the obtained information, and the logic unit outputs a corresponding signal to the PCI-E switch according to the setting value of the register, so that the PCI-E switch performs corresponding configuration setting on the PCI-E connector. The BIOS of the computer system generates a corresponding control command according to the information of the PCI-E module and transmits the control command to the PCI-E intensifier so as to adjust the internal parameters of the PCI-E intensifier, and the setting of the PCI-E intensifier conforms to the PCI-E module.
Description
Technical Field
The present invention relates to a computer system and a setting method thereof, and more particularly, to a computer system having a PCI-E enhancer and a setting method thereof.
Background
The PCI Express (PCI-E) is one of the common connection interfaces in computers today. When a computer system needs to be expanded to connect various functional modules (such as network cards, display cards, etc.), the connection can be generally made through a PCI-E connector on the motherboard of the computer system.
Furthermore, since the transmission speed of PCI-E is very fast (e.g. PCI-E4.0 can reach a transmission rate of about 16 GT/s), when the transmission distance is too long, a PCI-E enhancer (driver) is needed to enhance the signal to maintain the integrity of the PCI-E signal.
However, different PCI-E function modules have different information (e.g., different models, different chips used inside, etc.), so the parameters of the PCI-E enhancer on the computer system must be adjusted accordingly to match the connected PCI-E function module.
In the prior art, the parameters of the PCI-E enhancer are generally adjusted by using a hardware setting (hardwire setting), for example, a corresponding resistor is externally connected to the PCI-E enhancer, and the parameters of the PCI-E enhancer are adjusted by changing the resistance value. However, the resistor is connected to the motherboard of the computer system by manual welding, and when the connected PCI-E functional module is replaced, the user must manually replace the resistor. Such an adjustment takes a long time and causes a considerable inconvenience to the user. Moreover, the motherboard will be damaged by repeatedly replacing the resistor.
In addition, a dial switch is disposed on part of the motherboard, and the parameters of the PCI-E enhancer are adjusted by operating the dial switch. However, the dip switch still requires manual operation by the user, and the operation mode must be compared with the original factory specifications and is not intuitive. Moreover, the dip switch occupies valuable space on the motherboard, resulting in an excessive area of the motherboard, and thus is not favored by the market.
Disclosure of Invention
The main objective of the present invention is to provide a computer system with a PCI-E enhancer and a setting method of the PCI-E enhancer, which can automatically set the configuration of a PCI-E switch according to the information of an external PCI-E module and automatically adjust the parameters of the PCI-E enhancer, so that the PCI-E signals received/transmitted by the PCI-E module can be complete.
To achieve the above object, the present invention discloses a computer system with a PCI-E enhancer, comprising:
a PCI-E connector for expanding and connecting a PCI-E module;
a PCI-E intensifier connected with the PCI-E connector;
a PCI-E switch connected to the PCI-E enhancer and connected to the PCI-E connector through the PCI-E enhancer;
a logic unit connected to the PCI-E switch and having a register; and
a CPU connected to the PCI-E switch and the logic unit for obtaining the information of the PCI-E module after the computer system is started and setting the temporary memory based on the information;
the logic unit outputs a corresponding signal to the PCI-E switcher according to the setting value of the temporary storage, and the PCI-E switcher configures the PCI-E connector according to the corresponding signal;
the central processing unit executes a BIOS after the computer system is started, the BIOS generates a corresponding control command according to the information and transmits the control command to the PCI-E enhancer, and the PCI-E enhancer adjusts an internal parameter according to the control command to be in line with the PCI-E module.
As described above, the logic unit is a Complex Programmable Logic Device (CPLD).
As described above, wherein the PCI-E switch sets the logic of the PCI-E connector to a set of PCI-E X8 connectors when the corresponding signal is a low signal; when the corresponding signal is a high-level signal, the PCI-E switch sets the logic of the PCI-E connector to one or two sets of PCI-E X4 connectors.
As described above, the cpu is connected to the PCI-E connector through a System Management Bus (SMB) to read the information of the PCI-E module, and the BIOS transmits the control command to the PCI-E enhancer through the System Management Bus.
As mentioned above, the computer system further comprises a system management bus switch connected to the CPU, the PCI-E boosters and the PCI-E connectors for staggering the addresses of the PCI-E boosters and the PCI-E connectors.
As described above, the information includes at least one of the name, the model, a chip number of a chip used, and a PCI-E configuration applicable, and the internal parameters include an Equalization value (EQ) and a Emphasis value (De-Emphasis, DEM).
In order to achieve the above object, the present invention further discloses a method for setting a PCI-E enhancer used in the computer system, comprising:
a) the central processing unit obtains the information of the PCI-E module after the computer system is started;
b) the central processing unit sets the temporary storage of the logic unit according to the information;
c) the logic unit outputs the corresponding signal to the PCI-E switcher according to the setting value of the temporary storage;
d) the PCI-E switcher configures the PCI-E connector according to the corresponding signal;
e) the central processing unit executes the BIOS after the computer system is started;
f) the BIOS generates a corresponding control command according to the information and transmits the control command to the PCI-E enhancer;
g) the PCI-E enhancer adjusts an internal parameter to be consistent with the PCI-E module according to the control command; and
h) the BIOS sends out a reset signal to restart the computer system.
As described above, the information includes at least one of the name, the model, a chip number of a chip used, and a PCI-E configuration applicable, and the internal parameters include an Equalization value (EQ) and a Emphasis value (De-Emphasis, DEM).
As mentioned above, in the step a, the cpu is connected to the PCI-E connector through a System Management Bus (SMB) to obtain the information of the PCI-E module, and in the step f, the BIOS transmits the control command to the PCI-E enhancer through the system management Bus.
As described above, in the step d, when the corresponding signal is a low signal, the PCI-E switch sets the logic of the PCI-E connector to be a set of PCI-E X8 connectors, and when the corresponding signal is a high signal, the PCI-E switch sets the logic of the PCI-E connector to be one set or two sets of PCI-E X4 connectors.
As mentioned above, the step g further comprises the following steps:
g1) the BIOS determines whether a manual adjustment function is enabled;
g2) displaying a BIOS setting page when the manual adjustment function is enabled, wherein the BIOS setting page displays the internal parameters of the PCI-E enhancer;
g3) receiving an external operation through the BIOS setting page to adjust the internal parameters of the PCI-E enhancer; and
g4) and executing the step h when the BIOS setting page is left.
By the technical means of the invention, the user of the computer system does not need to manually set the configuration of the PCI-E switcher and manually adjust the parameters of the PCI-E intensifier. The computer system can automatically complete the related setting and adjustment of the PCI-E switcher and the PCI-E intensifier in the normal starting process according to the information of the PCI-E module, and is quite convenient.
Drawings
FIG. 1 is a system architecture diagram of a first embodiment of the present invention;
FIG. 2 is a system architecture diagram of a second embodiment of the present invention;
FIG. 3 is a diagram of a system management bus switch according to a first embodiment of the present invention;
FIG. 4A is a PCI-E switch configuration diagram according to a first embodiment of the present invention;
FIG. 4B is a PCI-E switch configuration diagram according to a second embodiment of the present invention;
FIG. 4C is a PCI-E switch configuration diagram according to a third embodiment of the present invention;
FIG. 4D is a PCI-E switch configuration diagram according to a fourth embodiment of the present invention;
FIG. 5 is a setting flow chart of the first embodiment of the present invention;
FIG. 6 is a setting flow chart of a second embodiment of the present invention.
Wherein, the reference numbers:
1 … computer system;
10 … system management bus;
11 … central processing unit;
12 … PCI-E switches;
13 … logic cells;
131 … register;
14 … PCI-E enhancer;
141 … a first signal booster;
1411 … a first received signal booster;
1412 … a first transmit signal enhancer;
142 … second signal booster;
1421 … second received signal enhancer;
1422 … second transmit signal enhancer;
15 … PCI-E connector;
151 … first PCI-E connector;
152 … second PCI-E connector;
16 … system management bus switch;
2 … PCI-E module;
S10-S26 … setting step;
steps S230 to S234 … are set.
Detailed Description
A preferred embodiment of the present invention will be described in detail with reference to the accompanying drawings.
Referring to fig. 1, a system architecture diagram of a first embodiment of the present invention is shown. The present invention discloses a computer system (hereinafter, referred to as a computer system 1) with a PCI-E enhancer, as shown in fig. 1, the computer system 1 mainly includes a Central Processing Unit (CPU) 11, a PCI-E switch (PCI-E switch)12, a logic Unit 13, a PCI-E enhancer (PCI-E driver)14, and a PCI-E connector (PCI-E slot) 15.
The PCI-E connector 15 is used as an expansion interface of the computer system 1 for expansion connection with an external PCI-E module 2. The PCI-E module 2 may be, for example, an expansion module such as a Local Area Network (LAN) interface card or a display card, but is not limited thereto. In this embodiment, the PCI-E connector 15 can be used to connect different types of PCI-E modules, wherein the different types of PCI-E modules have different models and names, use different chips, and may be suitable for different PCI-E configurations.
The PCI-E enhancer 14 is mainly connected to the PCI-E connector 15 for enhancing the PCI-E signals received/transmitted by the PCI-E connector 15, so that the PCI-E signals transmitted between the PCI-E module 2 and the computer system 1 connected to the PCI-E connector 15 can be more complete. It should be noted that, in the embodiment, a single PCI-E connector 15 and a single PCI-E enhancer 14 are taken as an example for illustration, but the number of the PCI-E connectors 15 and the number of the PCI-E enhancers 14 are not limited to one (detailed later).
The PCI-E switch 12 is connected to the PCI-E enhancer 14 and is connected to the PCI-E connector 15 through the PCI-E enhancer 14. As mentioned above, different types of PCI-E modules 2 may be suitable for different PCI-E configurations, and in this embodiment, the computer system 1 automatically configures the PCI-E connector 15 through the PCI-E switch 12 so that the logic of the PCI-E connector 15 can meet the requirements of the PCI-E module 2.
The logic unit 13 is connected to the PCI-E switch 12, and in this embodiment, the logic unit 13 is controlled by the cpu 11 to assist the PCI-E switch 12 in the configuration described above.
The CPU 11 is mainly connected to the PCI-E switch 12 and the logic unit 13, and the CPU 11 is also connected to the PCI-E connector 15. In the present invention, when the computer system 1 is started, the cpu 11 directly connects to and reads the PCI-E module 2 through the PCI-E connector 15 to obtain information of the PCI-E module 2. Specifically, the information may be, for example, at least one of the name, model, chip number of a chip (not shown) used, and a PCI-E configuration applicable to the PCI-E module 2. However, the above is only one specific example of the present invention, and should not be limited thereto.
The cpu 11 obtains the information of the PCI-E module 2, and then sets a register 131 of the logic unit 13 according to the information. After the CPU 11 is configured, the logic unit 13 outputs a corresponding signal to the PCI-E switch 12 according to the value of the register 131, so that the PCI-E switch 12 can configure the connected PCI-E connector 15 according to the corresponding signal.
It should be noted that, in the present embodiment, the Logic unit 13 may be mainly a Complex Programmable Logic Device (CPLD), and the corresponding signal output by the Logic unit 13 is a Low signal (Low) or a High signal (High). The PCI-E switch 12 identifies the corresponding signals as a low signal and a high signal to configure the PCI-E connector 15 accordingly (described in detail later).
In the present invention, after the computer System 1 is started, the cpu 11 not only reads the information of the PCI-E module 2, but also executes a Basic Input/Output System (BIOS). The BIOS generates a corresponding control command according to the information of the PCI-E module 2 during the booting process of the computer system 1, and transmits the control command to the PCI-E enhancer 14. Thus, the PCI-E enhancer 14 can adjust an internal parameter according to the control command, so that the internal parameter can conform to the requirement of the PCI-E module 2. In this embodiment, the internal parameter may be, for example, an Equalization value (EQ) and a weighting value (De-Emphasis, DEM), but is not limited thereto. The EQ value and DEM value are common parameters of a signal enhancer and are not described herein.
Specifically, in the embodiment, the cpu 11 is mainly connected to the PCI-E connector 15 through a System Management Bus (SMB) 10, and further connected to and reads the PCI-E module 2 through the PCI-E connector 15. Moreover, the BIOS transmits the control command to the PCI-E enhancer 14 through the system management bus 10, so that the PCI-E enhancer 14 can adjust the internal parameter according to the control command.
It should be noted that the system management bus 10 has a unique address, so when the computer system 1 has a plurality of the PCI-E boosters 14 and a plurality of the PCI-E connectors 15, there may be a problem of address confusion, which may cause the cpu 11 not to correctly read the PCI-E module 2 or the BIOS not to correctly transmit the control command to the PCI-E booster 14.
Fig. 2 is a system architecture diagram of a second embodiment of the present invention. In the embodiment, the computer system 1 has two PCI-E enhancers 14 and two PCI-E connectors 15. Specifically, in this embodiment, the PCI-E switch 12 of the computer system 1 is connected to a first signal booster 141 and a second signal booster 142, the first signal booster 141 is connected to a first PCI-E connector 151, the second signal booster 142 is connected to a second PCI-E connector 152, and the second PCI-E connector 152 is connected to the external PCI-E module 2.
In this embodiment, the computer system 1 further comprises a system management bus switch 16, wherein the system management bus switch 16 is connected to the CPU 11 via the system management bus 10 and is simultaneously connected to the first signal booster 141, the second signal booster 142, the first PCI-E connector 151 and the second PCI-E connector 152. When the CPU 11 is connected to the first PCI-E connector 151 or the second PCI-E connector 152, or when the BIOS is to transmit the control command to the first signal booster 141 or the second signal booster 142, the addresses of the PCI-E boosters 14 and the PCI-E connectors 15 can be staggered by the SMBu switch 16 to avoid access errors.
Fig. 3 is a diagram of a system management bus switch according to a first embodiment of the present invention. As shown in fig. 3, the system management bus switch 16 mainly transfers a DATA signal (SMB _ DATA) and a clock signal (SMB _ CLK) to and from the cpu 11 through the system management bus 10, and the system management bus switch 16 uses a unique Address (Address:0x1110111 x).
When the system management bus switch 16 receives the signal from the cpu 11, it first identifies a destination device of the cpu 11 according to the signal, and sends the signal to the first PCI-E connector 151(DATA _ SLOT1/CLK _ SLOT1) or the second PCI-E connector 152(DATA _ SLOT2/CLK-SLOT2) according to the identification result. In this way, the cpu 11 can connect a plurality of PCI-E connectors 15 through the single system management bus 10 to correctly read the information of the PCI-E module 2 without the problem of address confusion.
In addition, in the present embodiment, the first signal enhancer 141 mainly includes a first received signal (Rx1) enhancer 1411 and a first transmitted signal (Tx1) enhancer 1412, and the second signal enhancer 142 mainly includes a second received signal (Rx1) enhancer 1421 and a second transmitted signal (Tx1) enhancer 1422.
After the BIOS generates the control command, the control command is sent to the system management bus switch 16 mainly through the system management bus 10. The system management bus switch 16 first identifies a destination device of the BIOS according to the content of the control command, and sends the control command to the first rx signal enhancer 1411(Address:0xB0), the second rx signal enhancer 1421(0xB2), the first tx signal enhancer 1412(0xB4), or the second tx signal enhancer 1422(0xB6) according to the identification result. Thus, the BIOS can adjust the internal parameters of the PCI-E boosters 14 individually through the unique system management bus 10 without address confusion.
Please refer to fig. 2 and fig. 4A to 4D, wherein fig. 4A to 4D are PCI-E switch configurations according to first to fourth embodiments of the present invention, respectively. In the present invention, the logic unit 13 outputs the corresponding signal to the PCI-E switch 12 according to the setting value of the register 131. More specifically, when the number of the PCI-E connectors 15 is one, the logic unit 13 mainly outputs only one set of the corresponding signals. When the number of the PCI-E connectors 15 is two, the logic unit 13 outputs two sets of the corresponding signals, and so on.
Specifically, the corresponding signal is a Low signal (Low) or a High signal (High). When the corresponding signal is the low signal, the PCI-E switch 12 sets the logic of the corresponding PCI-E connector 15 to a PCI-EX8 connector. When the corresponding signal is the high signal, the PCI-E sets the logic of the corresponding PCI-E connector 15 to be one set of PCI-E X4 connectors or two sets of PCI-E X4 connectors.
As shown in fig. 4A, if the number of the PCI-E connectors 15 is two and the corresponding signal output by the logic unit 13 is two low-level signals, the PCI-E switch 12 sets the logic of the first PCI-E connector 151 as a set of PCI-E X8 connectors and sets the logic of the second PCI-E connector 152 as a set of PCI-E X8 connectors. That is, the PCI-E switch 12 logically switches one set of PCI-E X8 signals to two sets of PCI-E X8 signals for the CPU 11.
As shown in fig. 4B, if the number of the PCI-E connectors 15 is two and the corresponding signal output by the logic unit 13 is two high-level signals, the PCI-E switch 12 sets the logic of the first PCI-E connector 151 as one or two sets of PCI-E X4 connectors and sets the logic of the second PCI-E connector 152 as one or two sets of PCI-E X4 connectors. That is, the PCI-E switch 12 logically switches one set of PCI-E X8 signals to two to four sets of PCI-E X4 signals for the CPU 11.
As shown in fig. 4C, if the number of the PCI-E connectors 15 is two and the corresponding signal output by the logic unit 13 is a low signal + a high signal, the PCI-E switch 12 sets the logic of the first PCI-E connector 151 as one set of PCI-E X8 connectors and sets the logic of the second PCI-E connector 152 as one set or two sets of PCI-E X4 connectors. That is, the PCI-E switch 12 logically switches a set of PCI-E X8 signals to a set of PCI-E X8 signals + one or two sets of PCI-E X4 signals for the CPU 11.
As shown in fig. 4D, if the number of the PCI-E connectors 15 is two and the corresponding signal outputted by the logic unit 13 is a high signal + a low signal, the PCI-E switch 12 sets the logic of the first PCI-E connector 151 as one or two sets of PCI-E X4 connectors and sets the logic of the second PCI-E connector 152 as one set of PCI-E X8 connectors. That is, the PCI-E switch 12 logically switches one set of PCI-E X8 signals to one or two sets of PCI-E X4 signals + one set of PCI-E X8 signals for the CPU 11.
By the corresponding signal sent by the logic unit 13, the computer system 1 of the present invention can automatically perform the configuration of the PCI-E switch 12 after connecting to the PCI-E module 2 and obtaining the information, so that the configuration of the PCI-E switch 12 can be consistent with the requirement of the PCI-E module 2. However, the above description is only one specific example of the present invention, and should not be construed as limiting the invention.
Fig. 5 is a setting flow chart of the first embodiment of the invention. First, the computer system 1 is started by an external operation (step S10), and at this time, if the computer system 1 is connected to the PCI-E module 2 through the PCI-E connector 15, the cpu 11 of the computer system 1 can be connected to and read the PCI-E module 2 through the PCI-E connector 15 (step S12) to obtain the information of the PCI-E module 2 (step S14). In this embodiment, the information may be, but is not limited to, at least one of the name and model of the PCI-E module 2, the chip number of the adopted chip, and the applicable PCI-E configuration.
It should be noted that in the step S12, the cpu 11 is mainly connected to the PCI-E connector 15 through the system management bus 10. And, when the number of the PCI-E connectors 15 is plural (for example, the first PCI-E connector 151 and the second PCI-E connector 152 shown in fig. 2), the cpu 11 is connected to the PCI-E connector 15 connected to the PCI-E module 2 through the system management bus 10 and the system management bus switch 16.
After the cpu 11 obtains the information of the PCI-E module 2, the cpu 11 then sets the register 131 of the logic unit 13 according to the obtained information (step S16). Then, the logic unit 13 outputs the corresponding signal to the PCI-E switch 12 according to the setting value of the register 131, so that the PCI-E switch 12 configures the PCI-E connector 15 according to the corresponding signal (step S18).
In this embodiment, the corresponding signal is a low-level signal or a high-level signal. When the logic unit 13 outputs a low signal, the PCI-E switch 12 sets the logic of the PCI-E connector 15 to a set of PCI-E X8 connectors; when the logic unit 13 outputs a high signal, the PCI-E switch 12 sets the logic of the PCI-E connector 15 to one or two sets of PCI-E X4 connectors.
While the above steps S16 and S18 are performed, the cpu 11 also executes the BIOS and generates the corresponding control command according to the information of the PCI-E module 2 (step S20). Then, the BIOS transmits the control command to the PCI-E enhancer 14, so that the PCI-E enhancer 14 adjusts the internal parameter according to the control command, so that the internal parameter matches the requirement of the PCI-E module 2 (step S22).
It is noted that in the step S22, the BIOS mainly transmits the control command to the PCI-E enhancer 14 through the system management bus 10. Moreover, if there are a plurality of PCI-E boosters 14 (e.g., the first signal booster 141 and the second signal booster 142 shown in fig. 2), the BIOS transmits the control command to the corresponding PCI-E booster 14 mainly through the system management bus 10 and the system management bus switch 16. The PCI-E enhancer 14 mainly adjusts internal parameters such as an equalization value (EQ) and a weighting value (DEM) according to the control command, but not limited thereto.
After the step S22, the BIOS issues a reset signal (step S24), so that the computer system 1 is restarted according to the reset signal (step S26). After the computer system 1 is rebooted, the PCI-E switch 12, the PCI-E enhancer 14 and the PCI-E connector 15 all have used the correct settings. In this way, the PCI-E module 2 can correctly communicate with the cpu 11, and the PCI-E signals transmitted between the PCI-E module 2 and the cpu 11 can be complete.
As described above, the present invention is mainly that the BIOS automatically sets the internal parameters of the PCI-E enhancer 14 during the booting process of the computer system 1, so that the user will not perceive the internal parameters under normal conditions. However, in order to allow the user to adjust the internal parameters of the PCI-E enhancer 14 for other purposes, or to check if the BIOS configuration is incorrect (Debug) if a problem occurs, the present invention further provides a manual adjustment scheme.
Fig. 6 is a setting flow chart of the second embodiment of the invention. As shown in FIG. 6, after the step S22, the BIOS completes the setting of the internal parameters of the PCI-E enhancer 14. Next, the BIOS determines whether a manual adjustment function of the BIOS is enabled (step S230). If the manual adjustment function is not enabled, it indicates that the BIOS setting for the PCI-E enhancer 14 is not required to be intervened by the user, so the BIOS directly performs the step S24.
If the manual adjustment function is enabled, the BIOS further displays a BIOS setup page (step S231), wherein the BIOS setup page displays the setting values (e.g., the Level of equalization value (Level), the value of emphasis value (dB), etc.) of the internal parameters (e.g., equalization value (EQ) and emphasis value (DEM), etc.) set by the PCI-E enhancer 14 in the step S22.
Next, the BIOS determines whether to accept an external operation through the BIOS setup page (step S232). If the external operation is accepted through the BIOS setup page, the BIOS adjusts the internal parameters of the PCI-E enhancer 14 according to the external operation (step S233). Next, the BIOS determines whether to accept an instruction to leave the BIOS setup page (step S234). Before receiving no instruction to leave the BIOS setup page, the BIOS repeatedly performs the steps S232 and S233. After receiving the command to leave the BIOS setup page, the BIOS leaves the BIOS setup page, and the process proceeds to step S24.
With the present invention, the computer system 1 can automatically complete the related settings of the PCI-E switch 12 and the PCI-E enhancer 14 according to the related information of the PCI-E module 2 after the PCI-E module 2 is plugged and started, which is very convenient.
The above description is only a preferred embodiment of the present invention, and not intended to limit the scope of the invention, so that equivalent variations using the teachings of the present invention are also included in the scope of the present invention.
Claims (10)
1. A computer system having a PCI-E enhancer, comprising:
the PCI-E connectors are respectively used for expanding and connecting a PCI-E module;
a plurality of PCI-E intensifiers respectively connected with the plurality of PCI-E connectors;
a PCI-E switch connected to the PCI-E boosters and connected to the PCI-E connectors through the PCI-E boosters;
a logic unit connected to the PCI-E switch and having a register;
a CPU connected to the PCI-E switch and the logic unit for obtaining the information of the PCI-E module after the computer system is started and setting the temporary memory based on the information; and
a system management bus switcher, connected to the CPU, the PCI-E boosters and the PCI-E connectors, for staggering the addresses of the PCI-E boosters and the PCI-E connectors;
the logic unit outputs a corresponding signal to the PCI-E switcher according to the setting value of the temporary storage, and the PCI-E switcher configures the PCI-E connectors according to the corresponding signal;
the central processing unit executes a BIOS after the computer system is started, the BIOS generates a corresponding control command according to the information and transmits the control command to the PCI-E intensifiers, and the PCI-E intensifiers adjust an internal parameter according to the control command to be in line with the PCI-E module.
2. The computer system of claim 1, wherein the logic unit is a complex programmable logic device.
3. The computer system as claimed in claim 2, wherein the PCI-E switch sets the logic of each PCI-E connector to a set of PCI-E X8 connectors when the corresponding signal is a low signal; when the corresponding signal is a high-level signal, the PCI-E switch sets the logic of each PCI-E connector to one or two sets of PCI-E X4 connectors.
4. The computer system as claimed in claim 1, wherein the CPU is coupled to the PCI-E connectors via a system management bus for reading the information of the PCI-E module, and the BIOS transmits the control command to the PCI-E enhancers via the system management bus.
5. The computer system of claim 1, wherein the information includes at least one of a name, a model, a chip number of a chip used, and a PCI-E configuration applicable, and the internal parameters include an equalization value and a weighting value.
6. A method for configuring a PCI-E enhancer used in a computer system according to claim 1, comprising:
a) the central processing unit obtains the information of the PCI-E module after the computer system is started;
b) the central processing unit sets the temporary storage of the logic unit according to the information;
c) the logic unit outputs the corresponding signal to the PCI-E switcher according to the setting value of the temporary storage;
d) the PCI-E switcher configures the PCI-E connectors according to the corresponding signals;
e) the central processing unit executes the BIOS after the computer system is started;
f) the BIOS generates a corresponding control command according to the information and transmits the control command to the PCI-E enhancers;
g) the PCI-E intensifiers adjust an internal parameter to be consistent with the PCI-E module according to the control command; and
h) the BIOS sends out a reset signal to restart the computer system.
7. The method of claim 6, wherein the information includes at least one of a name, a model, a chip number of a chip used, and a PCI-E configuration applicable, and the internal parameters include an equalization value and a weighting value.
8. The method as claimed in claim 6, wherein in step a, the CPU is connected to the PCI-E connectors via a system management bus to obtain the information of the PCI-E module, and in step f, the BIOS transmits the control command to the PCI-E boosters via the system management bus.
9. The method as claimed in claim 6, wherein in the step d, the PCI-E switch sets the logic of each PCI-E connector to one set of PCI-E X8 connectors when the corresponding signal is a low signal, and sets the logic of each PCI-E connector to one or two sets of PCI-E X4 connectors when the corresponding signal is a high signal.
10. The setting method according to claim 6, further comprising the following steps after the step g:
g1) the BIOS determines whether a manual adjustment function is enabled;
g2) displaying a BIOS setting page when the manual adjustment function is enabled, wherein the BIOS setting page displays the internal parameters of the plurality of PCI-E boosters;
g3) receiving an external operation through the BIOS setting page to adjust the internal parameters of the PCI-E boosters; and
g4) and executing the step h when the BIOS setting page is left.
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| CN201610482327.6A CN107544931B (en) | 2016-06-27 | 2016-06-27 | Computer system with PCI-E intensifier and setting method of PCI-E intensifier |
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| CN107544931B true CN107544931B (en) | 2020-05-26 |
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