CN107508478A - For eliminating the method, apparatus, system and storage medium of burst pulse - Google Patents
For eliminating the method, apparatus, system and storage medium of burst pulse Download PDFInfo
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- CN107508478A CN107508478A CN201710593779.6A CN201710593779A CN107508478A CN 107508478 A CN107508478 A CN 107508478A CN 201710593779 A CN201710593779 A CN 201710593779A CN 107508478 A CN107508478 A CN 107508478A
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- threshold value
- phase angle
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
- H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
- H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
- H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/12—Arrangements for reducing harmonics from ac input or output
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
- H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
- H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
- H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M7/53—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
- H02M7/537—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters
- H02M7/539—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters with automatic control of output wave form or frequency
- H02M7/5395—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters with automatic control of output wave form or frequency by pulse-width modulation
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/0048—Circuits or arrangements for reducing losses
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
- Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
- Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Inverter Devices (AREA)
Abstract
The application embodiment provides the method, apparatus, system and storage medium for eliminating burst pulse.This method only eliminates burst pulse purpose by adjusting output voltage vector amplitude while keeping output voltage vector phase angle constant to reach.Method includes：Reference vector is determined, the reference vector includes amplitude and phase angle, and amplitude is worth to according to the voltage magnitude and accumulated error of the voltage vector of desired output, and phase angle is equal to the voltage vector phase angle of desired output；It is determined that corresponding with phase angle have the border in associated amplitude section and the threshold value in amplitude section with burst pulse；By amplitude compared with border and threshold value；If amplitude is more than the lower limit on border and is less than or equal to threshold value, using lower limit as reality output amplitude, and the error amount between cumulative magnitude and lower limit；If amplitude is more than threshold value and is less than or equal to the upper limit on border, using the upper limit as reality output amplitude, and the error amount between cumulative magnitude and the upper limit.The scheme that the application embodiment provides can effectively eliminate burst pulse, improve DC bus-bar voltage utilization rate.
Description
Technical field
The present invention relates to pulse width modulation field, it is used to eliminate the method, apparatus of burst pulse, is more particularly to a kind of
System and storage medium.
Background technology
Pulse width modulating technology (Pulse Width Modulation, PWM) is widely used in electric and electronic power
In the control of converter, such as inverter, frequency converter, motor driver etc..But too small or excessive pwm pulse can not be by power device
Part truly expressed, and there is the problem of burst pulse.The presence of burst pulse, which occurs, makes switching tube loss increase, and output voltage is abnormal
The problems such as becoming, the reduction of dc bus utilization rate, or even power device transient failure can be made.
The burst pulse dispelling tactics for being currently used for space voltage vector control PWM (SVPWM) are based on to each phase PWM ratios
Handled compared with register value, main feature is according to each phase PWM register values, if PWM register values are less than minimum amplitude limit
Value then thinks that burst pulse produces more than maximum limit amplitude, is then handled according to corresponding burst pulse dispelling tactics.
However, there are some shortcomings in prior art.After being eliminated to burst pulse, the phase (frequency) of output voltage goes out
Now shake, the torque pulsation of electric drive system can be caused.After being eliminated in addition to burst pulse, fluctuation and phase because of output voltage amplitude
The shake of (frequency), higher total harmonic voltage distortion rate (THDv) can be produced.
The content of the invention
The purpose of embodiment of the present invention is to provide a kind of method, apparatus, system and storage for eliminating burst pulse and is situated between
Matter, burst pulse can be effectively eliminated, improve DC bus-bar voltage utilization rate.This method is keeping output voltage vector phase angle constant
While, only eliminate burst pulse purpose by adjusting output voltage vector amplitude to reach.
To achieve these goals, the one side of the application provides a kind of method for eliminating burst pulse, methods described
Including：Reference vector is determined, the reference vector includes amplitude and phase angle, and the amplitude is according to the voltage vector of desired output
Voltage magnitude and accumulated error are worth to, and the phase angle is equal to the voltage vector phase angle of the desired output；It is determined that and institute
State corresponding to phase angle and the border in associated amplitude section and the threshold value in the amplitude section be present with burst pulse；By institute
Amplitude is stated compared with the border and the threshold value；If the amplitude is more than the lower limit on the border and is less than or equal to
The threshold value, then using the lower limit as reality output amplitude, and the error amount accumulated between the amplitude and the lower limit；Such as
Amplitude described in fruit is more than the threshold value and less than or equal to the upper limit on the border, then using the upper limit as reality output width
Value, and the error amount accumulated between the amplitude and the upper limit.
Alternatively, methods described also includes：If the amplitude is less than or equal to the lower limit or if the amplitude
More than the upper limit, then using the amplitude as reality output amplitude, and the accumulated error value is emptied.
Alternatively, the threshold value is the half of the upper limit and the lower limit sum.
The another aspect of the application provides a kind of device for being used to eliminate burst pulse, and described device is configured to：It is determined that ginseng
Examine vector, the reference vector includes amplitude and phase angle, the amplitude according to the voltage magnitude of the voltage vector of desired output and
Accumulated error is worth to, and the phase angle is equal to the voltage vector phase angle of the desired output；It is determined that with the phase angle pair
The border in associated amplitude section and the threshold value in the amplitude section be present with burst pulse in that answers；By the amplitude and institute
State border and the threshold value is compared；If the amplitude is more than the lower limit on the border and is less than or equal to the threshold value,
Then using the lower limit as reality output amplitude, and the error amount accumulated between the amplitude and the lower limit；If the width
Value then using the upper limit as reality output amplitude, and is accumulated more than the threshold value and less than or equal to the upper limit on the border
Error amount between the amplitude and the upper limit.
Alternatively, described device is further configured to：If the amplitude is less than or equal to the lower limit or if described
Amplitude is more than the upper limit, then using the amplitude as reality output amplitude, and empties the accumulated error value.
Alternatively, the threshold value is the half of the upper limit and the lower limit sum.
The still another aspect of the application provides a kind of pulse width modulation (PWM) system, and the PWM systems include above-mentioned be used for
Eliminate the device of burst pulse.
Another aspect of the application provides a kind of storage medium, is stored with instruction in the storage medium, the instruction is used for
When being executed by processor so that the above-mentioned method for eliminating burst pulse of the computing device.
Pass through above-mentioned technical proposal, burst pulse can be effectively eliminated, improve DC bus-bar voltage utilization rate.
The further feature and advantage of the application embodiment will be described in detail in subsequent specific embodiment part.
Brief description of the drawings
Accompanying drawing is that embodiment of the present invention is further understood for providing, and a part for constitution instruction, with
Following embodiment is used to explain embodiment of the present invention together, but does not form the limit to embodiment of the present invention
System.In the accompanying drawings：
Fig. 1 is the flow chart for being used to eliminate the method for burst pulse according to the embodiment of the application；
Fig. 2 is the flow chart for being used to eliminate the method for burst pulse according to the further embodiment of the application；
Fig. 3 is the flow chart for being used to eliminate the method for burst pulse according to another embodiment herein；
Fig. 4 is the flow chart for being used to eliminate the method for burst pulse according to the further embodiment of the application；
Fig. 5 is the structured flowchart according to the PWM systems of the embodiment of the application；
Fig. 6, which is shown, to be used according to the application embodiment for eliminating the method for burst pulse and the method for prior art
Actual output voltage phase-contrast；
Fig. 7 is shown using the output voltage wave for being used to eliminate the method for burst pulse according to the application embodiment；
Fig. 8 is shown the voltage waveform exported using the method for prior art and the voltage waveform is entered using MATLAB
The result that row Fast Fourier Transform (FFT) (Fast Fourier Transformation, FFT) analysis obtains；And
Fig. 9 is shown using the voltage waveform exported according to the method for being used to eliminate burst pulse of presently filed embodiment
And the result that fft analysis obtains is carried out to the voltage waveform using MATLAB.
Embodiment
The embodiment of embodiment of the present invention is described in detail below in conjunction with accompanying drawing.It should be appreciated that
Embodiment described herein is merely to illustrate and explain the present invention embodiment, is not intended to limit the invention implementation
Mode.
Fig. 1 is the flow chart for being used to eliminate the method for burst pulse according to the embodiment of the application.As shown in figure 1,
Presently filed embodiment provides a kind of method for eliminating burst pulse, may comprise steps of.
In step s 11, it is determined that the reference vector associated with the voltage vector of desired output, the reference vector include width
Value and phase angle.In this embodiment, reference vector can be the voltage vector of desired output.The voltage vector of desired output
It can be determined according to the PWM strategies of practical application.The determination method can be known to those skilled in the art.
In presently filed embodiment, the amplitude of the voltage vector of desired output can calculate according to formula (1)：
Wherein, | Vref | it is the voltage vector Vref of desired output amplitude, | Vr | it is by V/F controls or vector control
The amplitude for the given vector Vr being calculated is made, Udc is the voltage vector of the DC bus-bar voltage, wherein desired output of inverter
Phase angle θ it is identical with vector Vr phase angle.
In step s 12, it is determined that corresponding with the phase angle of reference vector have associated amplitude section with burst pulse
Border and the threshold value in amplitude section.Border can include upper and lower bound, and it can be determined according to implementing and needing.
In the embodiment of the application, the lower limit on the border in amplitude section can determine according to minimum output pulse it is expected.
Such as minimum output pulse can it is expected with off-line calculation to calculate the lower limit.In the embodiment of the application, amplitude area
Between border the upper limit can be defined as using PWM object (such as inverter) maximum possible output vector size.
Here, corresponding to also refer to amplitude section related with the phase angle θ of reference vector for amplitude region and the phase angle of reference vector
Connection.That is, the phase angle θ of reference vector is different, amplitude section may also be different.Therefore, in the implementation of the application
In mode, the lower and upper limit on the border in corresponding amplitude section under the phase angle θ of current reference vector can be determined in real time.
Threshold value can calculate according to formula (2)：
Threshold value=K (upper limit+lower limit) formula (2)
Wherein, K span is 0 to 1, it is preferable that K=0.5, that is to say, that threshold value is located at the centre in amplitude section.
It will be recognized to those skilled in the art that K value can be according to being actually needed or using flexible selection.Such as K value can be with
Value for 0.4, K can be 0.6, etc..
In step s 13, by the amplitude of reference vector compared with the border in amplitude section and threshold value.
In step S14, if amplitude is more than the lower limit on the border in amplitude section and is less than or equal to threshold value, by lower limit
As reality output amplitude.That is, if it is judged that amplitude (contains threshold value) between lower limit and threshold value, then reality output
The amplitude of voltage vector be equal to the lower limit, phase angle is equal to the phase angle of reference vector.Afterwards can be according to reality output
Voltage vector generates and exports corresponding pwm signal.Here, can be ability according to the method for voltage vector generation pwm signal
Method known to field technique personnel, such as use SVPWM.
In step S15, if amplitude is more than threshold value and the upper limit on the border less than or equal to amplitude section, by the upper limit
As reality output amplitude.Similar with step S14, the amplitude of the voltage vector of reality output is equal to the upper limit in step S15,
Phase angle is equal to the phase angle of reference vector.
In optional step S16, simultaneously output pwm signal is generated.Such as can be according in step S14 or step S15
The reality output amplitude of determination and phase angle generation and output pwm signal is to inverter.
Fig. 2 is the flow chart according to the PWM method of the further embodiment of the application.It is narrow for eliminating shown in Fig. 2
The method of pulse is similar with the method shown in Fig. 1, and difference is, the method shown in Fig. 2 can also comprise the following steps.
In step s 27, if amplitude is less than or equal to the lower limit on the border in amplitude section, or if amplitude is more than width
It is worth the upper limit on the border in section, then using the amplitude of reference vector as reality output amplitude.
In the replaceable or additional embodiment of the application, the accumulation before the amplitude of reference vector can contemplate misses
Difference (produces accumulated error value) in modulation period before.That is, can be according to the amplitude of the voltage vector of desired output
Accumulated error value before obtains the amplitude of current reference vector.
Fig. 3 is the flow chart for being used to eliminate the method for burst pulse according to another embodiment herein.Such as Fig. 3 institutes
Show, in the embodiment of the application, there is provided a kind of method for eliminating burst pulse, may comprise steps of.
In step S31, it is determined that the reference vector associated with the voltage vector of desired output, the reference vector includes width
Value and phase angle.The amplitude of the reference vector can be worth according to the voltage magnitude and accumulated error of the voltage vector of desired output
Arrive.For example, the amplitude of the reference vector can be equal to the voltage magnitude and accumulated error value sum of the voltage vector of desired output.
Phase angle can be equal to the phase angle of the voltage vector of desired output
In step s 32, it is determined that corresponding with reference vector have associated amplitude section with burst pulse and in amplitude
Threshold value in section.
In step S33, by the amplitude of reference vector compared with the border in amplitude section and threshold value.
In step S34, if amplitude is more than the lower limit on the border in amplitude section and is less than or equal to threshold value, by lower limit
As reality output amplitude；Alternatively, the error amount between amplitude and lower limit, i.e. error amount=amplitude-lower limit, and tiring out are calculated
The product error amount.That is, the error amount that the error amount is generated with modulation period before is accumulated.
In step s 35, if amplitude is more than threshold value and the upper limit on the border less than or equal to amplitude section, by the upper limit
As reality output amplitude；Alternatively, the error amount between amplitude and the upper limit, i.e. error amount=amplitude-upper limit, and tiring out are calculated
The product error amount.That is, the error amount that the error amount is generated with modulation period before is accumulated.
In optional step S36, simultaneously output pwm signal is generated.
Some steps in method shown in Fig. 3 are identical with the method shown in Fig. 1, difference be in step S34 or
The step of calculation error value and accumulated error value are added in step S35.
Fig. 4 is the flow chart for being used to eliminate the method for burst pulse according to the further embodiment of the application.Fig. 4 is shown
Method it is similar with the method shown in Fig. 3, difference is, the method shown in Fig. 4 can also comprise the following steps.
In step S47, if amplitude is less than or equal to the lower limit on the border in amplitude section, or if amplitude is more than width
It is worth the upper limit on the border in section, then using the amplitude of reference vector as reality output amplitude；Alternatively, accumulated error value is emptied,
Accumulated error value is reset.That is, after by step S47, the accumulated error value for next modulation period
It is zero, i.e., the amplitude of reference vector is equal to the amplitude of the voltage vector of desired output.
The method for eliminating burst pulse that the embodiment of above of the application provides, can apply to, but be not limited to two
Level Full Bridge inverter, including motor controller of new energy automobile, photovoltaic DC-to-AC converter, frequency converter.The application embodiment provides
The method for eliminating burst pulse, by being adjusted to space voltage vector amplitude, eliminate burst pulse.
According to the application embodiment, a kind of device for being used to eliminate burst pulse is additionally provided, the device can be with
The method for eliminating burst pulse that embodiment of above provides is performed, specifically, the device can include：
First determining unit, the reference vector associated with the voltage vector of desired output is configured to determine, the reference
Vector includes amplitude and phase angle；
Second determining unit, it is configured to determine corresponding with the phase angle of reference vector associated with burst pulse presence
Amplitude section and the threshold value in amplitude section；
Comparing unit, it is configured to the amplitude of reference vector compared with the border in amplitude section and threshold value；
First determining means, it is configured to be more than the lower limit on the border in amplitude section and less than or equal to threshold value in amplitude
In the case of, using lower limit as real output value；
Second determining means, it is configured to be more than threshold value in amplitude and is less than or equal to the upper limit on the border in amplitude section
In the case of, using the upper limit as real output value.
In the further embodiment of the application, what amplitude can according to the voltage vector magnitude of desired output and before
Accumulated error is worth to, and device can also include：
First cumulative unit, it is configured to be more than the lower limit on the border in amplitude section and less than or equal to threshold value in amplitude
In the case of, the error amount between cumulative magnitude and lower limit；
Second cumulative unit, it is configured to be more than threshold value in amplitude and is less than or equal to the upper limit on the border in amplitude section
In the case of, the error amount between cumulative magnitude and the upper limit.
In the further embodiment of the application, device can also include：
3rd determining means, it is configured in the case where amplitude is less than or equal to the lower limit on the border in amplitude section, or
In the case that person is more than the upper limit on the border in amplitude section in amplitude, using the amplitude of reference vector as reality output amplitude.
The device can also include signal generation unit, be configured to the phase according to reality output amplitude and reference vector
Angle generation and output pwm signal.
In the further embodiment of the application, device can also include：
Unit is emptied, is configured in the case where amplitude is less than or equal to the lower limit on the border in amplitude section, Huo Zhe
In the case that amplitude is more than the upper limit on the border in amplitude section, accumulated error value is emptied.
According to the application embodiment, a kind of device for being used to eliminate burst pulse is additionally provided, the device can be with
The method for eliminating burst pulse that embodiment of above provides is performed, specifically, the device may be configured to：
It is determined that the reference vector associated with the voltage vector of desired output, the reference vector includes amplitude and phase angle,
Amplitude can obtain according to the voltage magnitude of the voltage vector of desired output, and phase angle is equal to the voltage vector phase of desired output
Angle；
It is determined that corresponding with the phase angle of reference vector have the border in associated amplitude section and in width with burst pulse
The threshold value being worth in section；
By the amplitude of reference vector compared with the border in amplitude section and threshold value；
If amplitude is more than the lower limit on the border in amplitude section and is less than or equal to threshold value, using lower limit as reality output
Amplitude；
If amplitude is more than threshold value and the upper limit on the border less than or equal to amplitude section, using the upper limit as reality output
Amplitude.
In the further embodiment of the application, the device can be configured to：
If amplitude is more than the lower limit on the border in amplitude section and is less than or equal to threshold value, between cumulative magnitude and lower limit
Error amount；
If amplitude is more than threshold value and the upper limit on the border less than or equal to amplitude section, between cumulative magnitude and the upper limit
Error amount.
The amplitude of reference vector can be worth to according to the amplitude and accumulated error of the voltage vector of desired output.
In the further embodiment of the application, the device can be configured to：
If amplitude is less than or equal to the lower limit on the border in amplitude section, or if amplitude is more than the border in amplitude section
The upper limit, then using the amplitude of reference vector as reality output amplitude.
In the further embodiment of the application, the device can be configured to：
If amplitude is less than or equal to the lower limit on the border in amplitude section, or if amplitude is more than the border in amplitude section
The upper limit, then empty accumulated error value.
The device can be configured to that PWM letters are generated and exported according to the phase angle of reality output amplitude and reference vector
Number.Such as the pwm signal of generation can be output to controlled device (such as gate-controlled switch of the inverter circuit of inverter).
The example of device for eliminating burst pulse can include but is not limited to, general processor, application specific processor, routine
Processor, digital signal processor (DSP), multi-microprocessor, the one or more microprocessors associated with DSP core, control
Device processed, microcontroller, application specific integrated circuit (ASIC), field programmable gate array (FPGA) circuit, other any kind of collection
Into circuit (IC), and/or state machine etc..
Fig. 5 is the structured flowchart according to the PWM systems of the embodiment of the application.As shown in figure 5, according to the application's
One, embodiment there is provided a kind of PWM systems, can include：
Inverter circuit 51, the inverter circuit include multiple gate-controlled switches；And
Controller 52, for multiple gate-controlled switch output pwm signals into inverter circuit.
Gate-controlled switch may, for example, be insulated gate bipolar transistor (Insulated Gate Bipolar
Transistor, IGBT), it will be appreciated by a person skilled in the art that other kinds of gate-controlled switch is also applicable.
The device for being used to eliminate burst pulse that controller 52 can be or be provided including such as embodiment of above.
PWM systems can include but is not limited to inverter (such as two Level Full Bridge inverters).The example of inverter can be with
Including motor controller of new energy automobile, photovoltaic DC-to-AC converter, frequency converter etc..
The one of the application is stored with instruction, the instruction embodiment further provides a kind of storage medium in the storage medium
When being executed by processor for so that the method for eliminating burst pulse that computing device provides according to embodiment of above.
The scheme that presently filed embodiment provides can be modulated in the case where vector angle is constant, reduce output
Voltage THDv and reduction phase angle (frequency) shake, it can in addition contain eliminate burst pulse, improve busbar voltage utilization rate.
Fig. 6 shows the reality for being used to eliminate the method for burst pulse and the method for prior art using the application embodiment
Border output voltage phase-contrast.From fig. 6 it can be seen that the side for being used to eliminate burst pulse provided using the application embodiment
Method, actual output voltage phase and expectation phase error are zero (in such as Fig. 6 indicated by left arrow) after burst pulse elimination,
And it is ± 1.5 ° (as indicated by right arrows in Fig. 6) to use existing method phase error.
Fig. 7 shows the output voltage wave for being used to eliminate the method for burst pulse using the application embodiment.From Fig. 7
In as can be seen that the application embodiment is used to eliminate the method for burst pulse and can realize that burst pulse completely eliminates, improve
Busbar voltage utilization rate.
Fig. 8 is shown the voltage waveform exported using the method for prior art and the voltage waveform is entered using MATLAB
The result that row fft analysis obtains.Fig. 9 shows defeated using the method for being used to eliminate burst pulse according to presently filed embodiment
The voltage waveform gone out and the result obtained using MATLAB to voltage waveform progress fft analysis.
As shown in Figure 8 and Figure 9, the THDv of the voltage exported using the method for prior art is 3.04%, using according to this
The THDv of the voltage of the method output for being used to eliminate burst pulse of the embodiment of application is 2.09%, using according to the application's
The THDv for being used to eliminate method output voltage after burst pulse is eliminated of burst pulse of embodiment is than the side using prior art
The THDv low about 1% of the voltage of method output.
The optional embodiment of example of the present invention is described in detail above in association with accompanying drawing, still, embodiment of the present invention is not
The detail being limited in above-mentioned embodiment, can be to of the invention real in the range of the technology design of embodiment of the present invention
The technical scheme for applying mode carries out a variety of simple variants, and these simple variants belong to the protection domain of embodiment of the present invention.
It is further to note that each particular technique feature described in above-mentioned embodiment, in not lance
In the case of shield, it can be combined by any suitable means.In order to avoid unnecessary repetition, embodiment of the present invention
Various combinations of possible ways are no longer separately illustrated.
It will be appreciated by those skilled in the art that realize that all or part of step in above-mentioned embodiment method is to lead to
Program is crossed to instruct the hardware of correlation to complete, the program storage is in the storage medium, including some instructions are causing
One (can be single-chip microcomputer, chip etc.) or processor (processor) perform each embodiment methods described of the application
All or part of step.And foregoing storage medium includes：USB flash disk, mobile hard disk, read-only storage (ROM, Read-Only
Memory), random access memory (RAM, Random Access Memory), magnetic disc or CD etc. are various can store journey
The medium of sequence code.
In addition, can also be combined between a variety of embodiments of embodiment of the present invention, as long as its
Without prejudice to the thought of embodiment of the present invention, it should equally be considered as embodiment of the present invention disclosure of that.
Claims (8)
- A kind of 1. method for eliminating burst pulse, it is characterised in that methods described includes：Reference vector is determined, the reference vector includes amplitude and phase angle, and the amplitude is according to the voltage vector of desired output Voltage magnitude and accumulated error are worth to, and the phase angle is equal to the voltage vector phase angle of the desired output；It is determined that corresponding with the phase angle have the border in associated amplitude section and in the amplitude section with burst pulse Interior threshold value；By the amplitude compared with the border and the threshold value；If the amplitude is more than the lower limit on the border and is less than or equal to the threshold value, using the lower limit as actual defeated Go out amplitude, and the error amount accumulated between the amplitude and the lower limit；If the amplitude is more than the threshold value and less than or equal to the upper limit on the border, using the upper limit as actual defeated Go out amplitude, and the error amount accumulated between the amplitude and the upper limit.
- 2. according to the method for claim 1, it is characterised in that methods described also includes：If the amplitude is less than or equal to the lower limit or if the amplitude is more than the upper limit, the amplitude is made For reality output amplitude, and empty the accumulated error value.
- 3. according to the method for claim 1, it is characterised in that the threshold value is the one of the upper limit and the lower limit sum Half.
- 4. a kind of device for being used to eliminate burst pulse, it is characterised in that described device is configured to：Reference vector is determined, the reference vector includes amplitude and phase angle, and the amplitude is according to the voltage vector of desired output Voltage magnitude and accumulated error are worth to, and the phase angle is equal to the voltage vector phase angle of the desired output；It is determined that corresponding with the phase angle have the border in associated amplitude section and in the amplitude section with burst pulse Interior threshold value；By the amplitude compared with the border and the threshold value；If the amplitude is more than the lower limit on the border and is less than or equal to the threshold value, using the lower limit as actual defeated Go out amplitude, and the error amount accumulated between the amplitude and the lower limit；If the amplitude is more than the threshold value and less than or equal to the upper limit on the border, using the upper limit as actual defeated Go out amplitude, and the error amount accumulated between the amplitude and the upper limit.
- 5. device according to claim 4, it is characterised in that described device is further configured to：If the amplitude is less than or equal to the lower limit or if the amplitude is more than the upper limit, the amplitude is made For reality output amplitude, and empty the accumulated error value.
- 6. device according to claim 4, it is characterised in that the threshold value is the one of the upper limit and the lower limit sum Half.
- 7. a kind of pulse width modulation (PWM) system, it is characterised in that the PWM systems are included according to any in claim 4 to 6 The device for being used to eliminate burst pulse described in one.
- 8. a kind of storage medium, it is characterised in that instruction is stored with the storage medium, the instruction is used to be executed by processor When cause the computing device method as claimed in any of claims 1 to 3 for eliminating burst pulse.
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2022247289A1 (en) * | 2021-05-28 | 2022-12-01 | 天津飞旋科技股份有限公司 | Narrow pulse suppression method and apparatus, and bridge switch circuit |
Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7295607B2 (en) * | 2004-05-07 | 2007-11-13 | Broadcom Corporation | Method and system for receiving pulse width keyed signals |
| CN102332895A (en) * | 2011-07-21 | 2012-01-25 | 广东美的电器股份有限公司 | Continuous narrow pulse inhibition circuit for high-voltage integration circuit |
| CN102377360A (en) * | 2011-10-12 | 2012-03-14 | 常州联力自动化科技有限公司 | Trisync removing system and method for narrow pulse of SVPWM (space vector pulse width modulation) system |
| CN102570883A (en) * | 2011-06-03 | 2012-07-11 | 深圳市英威腾电气股份有限公司 | Three-level inverter narrow-pulse elimination and midpoint voltage control method and device |
| CN103312208A (en) * | 2013-05-06 | 2013-09-18 | 浙江大学 | Zero-error recent level modulating method of modularized multi-level current converter |
| CN103475230A (en) * | 2013-09-09 | 2013-12-25 | 河海大学常州校区 | Railway signal machine state monitoring and steady power supply unit |
| CN104158420A (en) * | 2014-08-26 | 2014-11-19 | 阳光电源股份有限公司 | Control method and system of three-phase three-level converter |
-
2017
- 2017-07-20 CN CN201710593779.6A patent/CN107508478A/en active Pending
Patent Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7295607B2 (en) * | 2004-05-07 | 2007-11-13 | Broadcom Corporation | Method and system for receiving pulse width keyed signals |
| CN102570883A (en) * | 2011-06-03 | 2012-07-11 | 深圳市英威腾电气股份有限公司 | Three-level inverter narrow-pulse elimination and midpoint voltage control method and device |
| CN102332895A (en) * | 2011-07-21 | 2012-01-25 | 广东美的电器股份有限公司 | Continuous narrow pulse inhibition circuit for high-voltage integration circuit |
| CN102377360A (en) * | 2011-10-12 | 2012-03-14 | 常州联力自动化科技有限公司 | Trisync removing system and method for narrow pulse of SVPWM (space vector pulse width modulation) system |
| CN103312208A (en) * | 2013-05-06 | 2013-09-18 | 浙江大学 | Zero-error recent level modulating method of modularized multi-level current converter |
| CN103475230A (en) * | 2013-09-09 | 2013-12-25 | 河海大学常州校区 | Railway signal machine state monitoring and steady power supply unit |
| CN104158420A (en) * | 2014-08-26 | 2014-11-19 | 阳光电源股份有限公司 | Control method and system of three-phase three-level converter |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2022247289A1 (en) * | 2021-05-28 | 2022-12-01 | 天津飞旋科技股份有限公司 | Narrow pulse suppression method and apparatus, and bridge switch circuit |
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