CN107437895A - A kind of insulating power supply chip and its implementation - Google Patents
A kind of insulating power supply chip and its implementation Download PDFInfo
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- CN107437895A CN107437895A CN201710762208.0A CN201710762208A CN107437895A CN 107437895 A CN107437895 A CN 107437895A CN 201710762208 A CN201710762208 A CN 201710762208A CN 107437895 A CN107437895 A CN 107437895A
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Classifications
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M3/00—Conversion of dc power input into dc power output
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/0003—Details of control, feedback or regulation circuits
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Abstract
The invention discloses a kind of insulating power supply chip and its implementation, including：Transmitting chip and reception chip, and the transmission of power supply and the isolation of DC common-mode level are realized between transmitting chip and reception chip by high voltage bearing electric capacity C1, C2；The transmitting chip includes the first oscillator, high voltage bearing electric capacity C1, C2；The reception chip includes rectification circuit, the high voltage bearing electric capacity C5 being made up of metal-oxide-semiconductor M1~M4；First oscillator meets power vd D1, and negative pole of first oscillator respectively with electric capacity C1, C2 is connected, and electric capacity C1, C2 positive pole are connected with rectification circuit respectively, and rectification circuit meets power vd D2 by electric capacity C5.The present invention realizes the transmission of power supply and the isolation of DC common-mode level using high voltage bearing electric capacity, improves the integrated level of chip.And the structure and implementation method of the power supply chip of the present invention are both adapted to open loop structure, are adapted to the system of closed loop configuration again.In the case of isolated from power between meeting two systems, the area and power consumption of chip are saved again.
Description
Technical field
The present invention relates to a kind of insulating power supply, more particularly to a kind of insulating power supply chip and its implementation.
Background technology
Isolation technology is a kind of for preventing the crosstalk of DC common-mode level or abnormal exchange occur between two systems
The interference of electric current, while ensure the technology of normal signal interaction again.Traditional isolated from power chip uses the inductance outside piece to realize,
Shortcoming is that volume is big, and integrated level is relatively low；If inductance is integrated in chip, due to the presence of parasitic parameter, design can be increased
Complexity, while reduce energy transmission efficiency.Secondly, inductance is easy and the electromagnetic field of environment interferes with each other, EMC performances ratio
It is poor.
The content of the invention
It is an object of the present invention to provide a kind of insulating power supply chip and its implementation, and it uses high voltage bearing electric capacity
The transmission of power supply and the isolation of DC common-mode level are realized, improves the integrated level of chip.
To achieve the above object, the technical solution adopted by the present invention is, a kind of insulating power supply chip, including：Launch core
Piece and reception chip, and the transmission of power supply and straight is realized by high voltage bearing electric capacity C1, C2 between transmitting chip and reception chip
Flow the isolation of common mode electrical level；The transmitting chip includes the first oscillator, high voltage bearing electric capacity C1, C2；The reception chip bag
Include the rectification circuit being made up of metal-oxide-semiconductor M1~M4, high voltage bearing electric capacity C5；First oscillator meets power vd D1, and first shakes
Swing negative pole of the device respectively with electric capacity C1, C2 to be connected, electric capacity C1, C2 positive pole are connected with rectification circuit respectively, and rectification circuit passes through
Electric capacity C5 meets power vd D2.
This patent realizes the transmission of power supply and the isolation of DC common-mode level by high voltage bearing electric capacity, improves chip
Integrated level.Technical scheme described in above-mentioned technical proposal is open loop structure, and it is suitable for the required precision to power vd D2
Not high situation, the function of power delivery equally can be achieved using open loop structure, although power vd D2 precision is not high, but
It is that the area of chip and power consumption greatly reduce, the integrated level of chip also greatly improves.
It is specific as follows and this patent also discloses a kind of system architecture of close loop negative feedback：
The transmitting chip also includes and door U1 and U2, demodulator, high voltage bearing electric capacity C3, C4；The reception chip is also
Including resistance R1 and R2, reference voltage generator, comparator, the second oscillator and with door U3 and U4；
By connecting the transmission channel to be formed by high voltage bearing electric capacity C1, C2 between the transmitting chip and reception chip
With the feedback channel that is connected and formed by high voltage bearing electric capacity C3, C4 realize the transmission of power supply and DC common-mode level every
From.
Preferably, the transmission channel is by the first oscillator and door U1 and U2, electric capacity C1, C2, metal-oxide-semiconductor M1~M4, electricity
Hold C5, resistance R1 and R2 composition；
Wherein, the first oscillator is connected with door U1 and U2 input respectively, and the output with door U1 and U2 connects electricity respectively
Hold C1, C2 negative pole, electric capacity C1, C2 positive pole are connected to rectification circuit, and rectification circuit passes through electric capacity C5 and the electricity being connected in series
Resistance R1 and R2 meets power vd D2.
Preferably, the feedback channel is by reference voltage generator, comparator, the second oscillator and door U3 and U4, electricity
Hold C3 and C4 and demodulator composition；
Wherein, reference voltage generator is connected with power vd D2, the inverting input connection of its output end and comparator, than
In-phase input end compared with device is connected between resistance R1 and R2, the output end of comparator be respectively connected to one of door U3 and U4 it is defeated
Enter end, be connected respectively with the second oscillator with door U3 and U4 another input；Pass through respectively with door U3 and U4 output end
Electric capacity C3, C4 are connected to demodulator, and demodulator is connected with an input with door U1 and U2.
In above-mentioned closed loop configuration, power vd D1 transmission is realized using transmission channel, using feedback channel come real
Existing power vd D2 feedback, has been accurately controlled power vd D2 size and precision.
Preferably, also including charge pump, charge pump is arranged between door U1 and U2 and electric capacity C1, C2, for increasing
The power of power delivery.In some scenarios, if the amplitudes of power vd D1 in itself are bigger, charge pump can be removed, saved
Chip area, charge pump is preferably used in this patent, to increase the power of power delivery.
Preferably, it is described with door U1~U4 be respectively two inputs with door.
The invention also discloses a kind of implementation method of insulating power supply chip, comprise the following steps：
(1) power supply chip is by transmitting chip and reception chip open loop structure dimerous；
(2) by realizing the transmission of power supply and straight by high voltage bearing electric capacity C1, C2 between transmitting chip and reception chip
Flow the isolation of common mode electrical level；
(3) first oscillators produce amplitude for power vd D1 sizes differential clock signal by high voltage bearing electric capacity C1,
C2 is sent to reception chip；
(4) reception chip by the differential signal received by the rectification circuit that metal-oxide-semiconductor M1~M4 is formed by being rectified into electricity
Source VDD2；
(5) power vd D2 ripple is reduced by electric capacity C5 in step (4).
Preferably, biography is formed by the transmitting chip and reception chip of high voltage bearing electric capacity C1, C2 connection in step (2)
Defeated passage；The transmission channel specifically includes the first oscillator and door U1 and U2, electric capacity C1 and C2 of transmitting chip；And connect
Receive metal-oxide-semiconductor M1~M4 of chip, electric capacity C5 and resistance R1 and R2；
It also includes feedback channel, and the feedback channel connects transmitting chip by high voltage bearing electric capacity C3, C4 and receives core
Piece is formed；The feedback channel specifically includes reference voltage generator, comparator, the second oscillator and the door U3 of reception chip
And U4；And high pressure resistant the electric capacity C3 and C4 and adjuster of transmitting chip；
And the system that transmission channel and feedback channel together constitute a close loop negative feedback.
Preferably, the transmitting chip also includes being used for the charge pump for increasing power delivery power.
Preferably, in claims 9 in described closed-loop system, the implementation method of its insulating power supply chip includes：
(11) first oscillators produce the differential clock signal CKP1 and CKN1 that amplitude is power vd D1 sizes；
(22) when the output signal EN of demodulator is high level, differential clock signal CKP1 and CKN1 pass through with door U1 and
U2 produces CKP2 and CKN2；
(33) the higher differential clock signal TXP and TXN of amplitude is produced by charge pump, is achieved in power vd D1 tune
System；
(44) signal of modulation is sent to reception chip by electric capacity C1 and C2, reception chip by by metal-oxide-semiconductor M1, M2,
The differential signal RXP and RXN that receive are rectified into power vd D2 by the rectification circuit of M3 and M4 compositions, while are subtracted by electric capacity C5
Small power supply VDD2 ripple；
(55) comparator passes through ginseng caused by voltage division signal VFB caused by comparison resistance R1 and R2 and reference voltage generator
Voltage VREF is examined, judges whether power vd D2 reaches the amplitude of target；
(66) if power vd D2 reaches the amplitude of target, then the output signal FB of comparator is high level, and second shakes
Transmitting core can be sent to by exporting TXFP and TXFN with door U3 and U4 by swinging differential clock signal CKFP and CKFN caused by device
Piece；
(77) differential clock signal TXFP and TXFN are received as RXFP and RXFN by transmitting chip by electric capacity C3 and C4, are led to
Demodulator output low level is crossed to block CKP1 and CKN1 transmission so that power vd D2 keeps the amplitude of target.
Beneficial effects of the present invention：This patent realizes transmission and the DC common-mode level of power supply using high voltage bearing electric capacity
Isolation, improve the integrated level of chip.And the structure and implementation method of the power supply chip of this patent are both adapted to open loop structure,
It is adapted to the system of closed loop configuration again.In the case of isolated from power between meeting two systems, save again chip area and
Power consumption.
Brief description of the drawings
, below will be to required in embodiment or description of the prior art in order to illustrate more clearly of technical scheme
The accompanying drawing used is briefly described.
Fig. 1 is the circuit theory diagrams of the embodiment of the present invention one；
Fig. 2 is the circuit theory diagrams of the embodiment of the present invention two；
In figure：1. transmitting chip, 2. reception chips, 3. first oscillators, 4. adjusters, 5. reference voltage generators, 6.
Comparator, 7. second oscillators, 8. transmission channels, 9. feedback channels, 10. charge pumps.
Embodiment
In order that those skilled in the art more fully understand the technical scheme in the application, below in conjunction with embodiment pair
Technical scheme in the application is clearly and completely described.
Embodiment one
As shown in figure 1, the invention discloses a kind of power supply chip system of open loop structure, the realization of its insulating power supply chip
Method comprises the following steps：
(1) power supply chip is by 2 open loop structure dimerous of transmitting chip 1 and reception chip；
(2) between transmitting chip 1 and reception chip 2 by by high voltage bearing electric capacity C1, C2 come realize the transmission of power supply and
The isolation of DC common-mode level；The transmitting chip 1 includes the first oscillator 3, high voltage bearing electric capacity C1, C2；The reception core
Piece 2 includes rectification circuit, the high voltage bearing electric capacity C5 being made up of metal-oxide-semiconductor M1~M4；First oscillator 3 meets power vd D1,
Negative pole of first oscillator 3 respectively with electric capacity C1, C2 is connected, and electric capacity C1, C2 positive pole are connected with rectification circuit respectively, rectified current
Road meets power vd D2 by electric capacity C5；
(3) first oscillators 3 produce the differential clock signal CKP and CKN that amplitude is power vd D1 sizes, by charge pump
10 produce amplitude higher differential clock signal TXP and TXN, are achieved in power vd D1 modulation, the signal of modulation is by resistance to
Electric capacity C1, C2 of high pressure are sent to reception chip 2；In this step, if the amplitudes of power vd D1 in itself are bigger, can go
Fall charge pump to save chip area；
(4) reception chip 2 passes through the differential signal RXP and RXN that will be received by the rectification circuit that metal-oxide-semiconductor M1~M4 is formed
It is rectified into power vd D2；
(5) power vd D2 ripple is reduced by electric capacity C5 in step (4).
This patent realizes the transmission of power supply and the isolation of DC common-mode level by high voltage bearing electric capacity, improves chip
Integrated level.Technical scheme described in above-mentioned technical proposal is open loop structure, and it is suitable for the required precision to power vd D2
Not high situation, the function of power delivery equally can be achieved using open loop structure, although power vd D2 precision is not high, but
It is that the area of chip and power consumption greatly reduce, the integrated level of chip also greatly improves.
Embodiment two
As shown in Fig. 2 the invention discloses a kind of power supply chip system of closed loop configuration, the power supply chip is by transmitting core
Piece 1 and the two parts of reception chip 2 composition.Pass through the electric capacity C1 and C2 by high pressure between described transmitting chip 1 and reception chip 2
The transmission channel 8 of connection realizes transmission and the DC common-mode of power supply with the feedback channel 9 connected by high voltage bearing electric capacity C3 with C4
The isolation of level.
Described transmission channel 8 includes the first oscillator 3 of transmitting chip 1, with door U1 and U2, charge pump 10 and electric capacity C1
And C2, and metal-oxide-semiconductor M1~M4 of reception chip 2, electric capacity C5 and resistance R1 and R2.First oscillator 3 respectively with door U1
Connected with U2 input, the output with door U1 and U2 connects electric capacity C1, C2 negative pole respectively, and electric capacity C1, C2 positive pole is connected to whole
Current circuit, rectification circuit meet power vd D2 by electric capacity C5 and the resistance R1 and R2 that are connected in series.
Described feedback channel 9 include the reference voltage generator 5 of reception chip 2, comparator 6, the second oscillator 7, with
Door U3 and U4, and the electric capacity C3 and C4 and demodulator 4 of transmitting chip 1.Reference voltage generator 5 is connected with power vd D2,
Its output end is connected with the inverting input of comparator 6, and the in-phase input end of comparator 6 is connected between resistance R1 and R2, than
Output end compared with device 6 is respectively connected to an input with door U3 and U4, with door U3 and U4 another input respectively with
Two oscillators 7 connect；Demodulator 4 is connected to by electric capacity C3, C4 respectively with door U3 and U4 output end, demodulator 4 with door
U1 connects with a U2 input.
The implementation method of its insulating power supply chip comprises the following steps：
(11) first oscillators 3 produce the differential clock signal CKP1 and CKN1 that amplitude is power vd D1 sizes；
(22) when the output signal EN of demodulator 4 is high level, differential clock signal CKP1 and CKN1 pass through and door U1
CKP2 and CKN2 is produced with U2；
(33) the higher differential clock signal TXP and TXN of amplitude is produced by charge pump 10, is achieved in power vd D1's
Modulation；The power for being arranged to add to power delivery of charge pump.In some scenarios, if the Amplitude Ratios of power vd D1 in itself
It is larger, charge pump 10 can be removed, chip area is saved, charge pump is preferably used in this patent, to increase the work(of power delivery
Rate.
(44) signal of modulation is sent to reception chip 2 by electric capacity C1 and C2, reception chip 2 by by metal-oxide-semiconductor M1,
The differential signal RXP and RXN that receive are rectified into power vd D2 by the rectification circuit of M2, M3 and M4 composition, while pass through electric capacity
C5 reduces power vd D2 ripple；
(55) comparator 6 passes through caused by voltage division signal VFB caused by comparison resistance R1 and R2 and reference voltage generator 5
Reference voltage VREF, judges whether power vd D2 reaches the amplitude of target；
(66) if power vd D2 reaches the amplitude of target, then the output signal FB of comparator 6 is high level, and second shakes
Transmitting core can be sent to by exporting TXFP and TXFN with door U3 and U4 by swinging differential clock signal CKFP and CKFN caused by device 7
Piece 1；
(77) differential clock signal TXFP and TXFN are received as RXFP and RXFN by transmitting chip 1 by electric capacity C3 and C4,
Low level is exported by demodulator 4 to block CKP1 and CKN1 transmission so that power vd D2 keeps the amplitude of target.
In above-mentioned closed loop configuration, power vd D1 transmission is realized using transmission channel, using feedback channel come real
Existing power vd D2 feedback, has been accurately controlled power vd D2 size and precision.
In the above two embodiments, it is described with door U1~U4 be respectively two inputs with door.
This patent realizes the transmission of power supply and the isolation of DC common-mode level using high voltage bearing electric capacity, improves chip
Integrated level.And the structure and implementation method of the power supply chip of this patent are both adapted to open loop structure, it is adapted to closed loop configuration again
System.In the case of isolated from power between meeting two systems, the area and power consumption of chip are saved again.
Described embodiment is part of the embodiment of the present invention, rather than whole embodiments.Based in the present invention
Embodiment, the every other embodiment that those of ordinary skill in the art are obtained under the premise of creative work is not made,
Belong to the scope of protection of the invention.
Claims (10)
- A kind of 1. insulating power supply chip, it is characterised in that including：Transmitting chip (1) and reception chip (2), and transmitting chip (1) The transmission of power supply and the isolation of DC common-mode level are realized by high voltage bearing electric capacity C1, C2 between reception chip (2)；It is described Transmitting chip (1) includes the first oscillator (3), high voltage bearing electric capacity C1, C2；The reception chip (2) include by metal-oxide-semiconductor M1~ Rectification circuit, the high voltage bearing electric capacity C5 of M4 compositions；First oscillator (3) meets power vd D1, and the first oscillator (3) is respectively It is connected with electric capacity C1, C2 negative pole, electric capacity C1, C2 positive pole are connected with rectification circuit respectively, and rectification circuit is connect by electric capacity C5 Power vd D2.
- 2. insulating power supply chip according to claim 1, it is characterised in that the transmitting chip (1) also includes and door U1 With U2, demodulator (4), high voltage bearing electric capacity C3, C4；The reception chip (2) also includes resistance R1 and R2, reference voltage occurs Device (5), comparator (6), the second oscillator (7) and with door U3 and U4；Led between the transmitting chip (1) and reception chip (2) by the transmission connected by high voltage bearing electric capacity C1, C2 to be formed The transmission of power supply and DC common-mode electricity are realized with the feedback channel (9) that is connected and formed by high voltage bearing electric capacity C3, C4 in road (8) Flat isolation.
- 3. insulating power supply chip according to claim 2, it is characterised in that the transmission channel (8) is by the first oscillator (3), formed with door U1 and U2, electric capacity C1, C2, metal-oxide-semiconductor M1~M4, electric capacity C5, resistance R1 and R2；Wherein, the first oscillator (3) is connected with door U1 and U2 input respectively, and the output with door U1 and U2 connects electric capacity respectively C1, C2 negative pole, electric capacity C1, C2 positive pole are connected to rectification circuit, and rectification circuit passes through electric capacity C5 and the resistance being connected in series R1 and R2 meets power vd D2.
- 4. insulating power supply chip according to claim 3, it is characterised in that the feedback channel (9) is sent out by reference voltage Raw device (5), comparator (6), the second oscillator (7) and door U3 and U4, electric capacity C3 and C4 and demodulator (4) form；Wherein, reference voltage generator (5) is connected with power vd D2, and its output end is connected with the inverting input of comparator (6), The in-phase input end of comparator (6) is connected between resistance R1 and R2, and the output end of comparator (6) is respectively connected to and door U3 and U4 An input, be connected respectively with the second oscillator (7) with door U3 and U4 another input；With door U3 and U4 output End is connected to demodulator (4) by electric capacity C3, C4 respectively, and demodulator (4) is connected with an input with door U1 and U2.
- 5. according to the insulating power supply chip described in claim any one of 1-4, it is characterised in that also including charge pump (10), electricity Lotus pump (10) is arranged between door U1 and U2 and electric capacity C1, C2, for increasing the power of power delivery.
- 6. insulating power supply chip according to claim 5, it is characterised in that described and door U1~U4 is respectively two inputs With door.
- 7. a kind of implementation method of insulating power supply chip as claimed in claim 1, it is characterised in that comprise the following steps：(1) power supply chip is by transmitting chip and reception chip open loop structure dimerous；(2) by realizing that the transmission of power supply and direct current are total to by high voltage bearing electric capacity C1, C2 between transmitting chip and reception chip The isolation of mould level；(3) first oscillators produce amplitude and sent out for the differential clock signal of power vd D1 sizes by high voltage bearing electric capacity C1, C2 It is sent to reception chip；(4) reception chip by the differential signal received by the rectification circuit that metal-oxide-semiconductor M1~M4 is formed by being rectified into power supply VDD2；(5) power vd D2 ripple is reduced by electric capacity C5 in step (4).
- 8. the implementation method of insulating power supply chip according to claim 7, it is characterised in that by resistance to height in step (2) The transmitting chip and reception chip of electric capacity C1, C2 connection of pressure form transmission channel；The transmission channel specifically includes transmitting core First oscillator of piece and door U1 and U2, electric capacity C1 and C2；And metal-oxide-semiconductor M1~M4 of reception chip, electric capacity C5 and resistance R1 and R2；It also includes feedback channel, and the feedback channel connects transmitting chip and reception chip shape by high voltage bearing electric capacity C3, C4 Into；The feedback channel specifically includes reference voltage generator, comparator, the second oscillator and the door U3 and U4 of reception chip； And high pressure resistant the electric capacity C3 and C4 and adjuster of transmitting chip；And the system that transmission channel and feedback channel together constitute a close loop negative feedback.
- 9. the implementation method of the insulating power supply chip according to claim 7 or 8, it is characterised in that the transmitting chip is also Including the charge pump for increasing power delivery power.
- 10. the implementation method of insulating power supply chip according to claim 9, it is characterised in that described in claims 9 Closed-loop system in, the implementation method of its insulating power supply chip includes：(11) first oscillators produce the differential clock signal CKP1 and CKN1 that amplitude is power vd D1 sizes；(22) when the output signal EN of demodulator is high level, differential clock signal CKP1 and CKN1 pass through to be produced with door U1 and U2 Raw CKP2 and CKN2；(33) the higher differential clock signal TXP and TXN of amplitude is produced by charge pump, is achieved in power vd D1 modulation；(44) signal of modulation is sent to reception chip by electric capacity C1 and C2, reception chip by by metal-oxide-semiconductor M1, M2, M3 and The differential signal RXP and RXN that receive are rectified into power vd D2 by the rectification circuit of M4 compositions, while reduce electricity by electric capacity C5 Source VDD2 ripple；(55) comparator is by referring to electricity caused by voltage division signal VFB caused by comparison resistance R1 and R2 and reference voltage generator VREF is pressed, judges whether power vd D2 reaches the amplitude of target；(66) if power vd D2 reaches the amplitude of target, then the output signal FB of comparator is high level, the second oscillator Caused differential clock signal CKFP and CKFN can pass through exports TXFP and TXFN with door U3 and U4, is sent to transmitting chip；(77) differential clock signal TXFP and TXFN are received as RXFP and RXFN by transmitting chip by electric capacity C3 and C4, pass through solution Device output low level is adjusted to block CKP1 and CKN1 transmission so that power vd D2 keeps the amplitude of target.
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111181547A (en) * | 2020-02-28 | 2020-05-19 | 思瑞浦微电子科技（苏州）股份有限公司 | Chip and capacitive isolation circuit |
| CN111835191A (en) * | 2020-08-10 | 2020-10-27 | 上海川土微电子有限公司 | Soft start circuit and soft start method for isolating DC-DC power supply chip |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN111181547A (en) * | 2020-02-28 | 2020-05-19 | 思瑞浦微电子科技（苏州）股份有限公司 | Chip and capacitive isolation circuit |
| WO2021169082A1 (en) * | 2020-02-28 | 2021-09-02 | 思瑞浦微电子科技（苏州）股份有限公司 | Chip and capacitive isolation circuit |
| CN111835191A (en) * | 2020-08-10 | 2020-10-27 | 上海川土微电子有限公司 | Soft start circuit and soft start method for isolating DC-DC power supply chip |
| CN111835191B (en) * | 2020-08-10 | 2021-06-04 | 上海川土微电子有限公司 | Soft start circuit and soft start method for isolating DC-DC power supply chip |
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