CN107425059B - Cr-doped heterojunction spin field effect transistor and preparation method thereof - Google Patents
Cr-doped heterojunction spin field effect transistor and preparation method thereof Download PDFInfo
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Abstract
The invention relates to a Cr-doped heterojunction spin field effect transistor and a preparation method thereof, wherein the preparation method comprises the following steps: selecting a sapphire substrate; growing Ga on surface of sapphire substrate by MBE process2O3An epitaxial layer; in Ga2O3Injecting Cr ions into the epitaxial layer to form a source region and a drain region; manufacturing ohmic contact source electrodes and drain electrodes on the surfaces of the source regions and the drain regions; by using PECVD process in Ga2O3Growing an isolation layer on the surface of the epitaxial layer; in Ga2O3Manufacturing a Schottky contact gate electrode on the surface of the epitaxial layer to finish the preparation of the spin field effect transistor; according to the Cr-doped heterojunction spin field effect transistor and the preparation method thereof, the doping concentration and the defect concentration in the source and drain material can be changed by adjusting the ion implantation dosage and the annealing time, so that the spin polarizability of the material at room temperature is optimized.
Description
Technical Field
The invention belongs to the technical field of semiconductor device preparation, and particularly relates to a method for doping Ga by using point defect Cr ions2O3A heterojunction high electron mobility spin field effect transistor with a source electrode and a drain electrode injected with and receiving spin polarized electrons and a preparation method are manufactured.
Background
With the rapid update of modern electronic technology, the development of traditional electronic devices, both in terms of scale integration and operational speed, has severely limited the development of microelectronics science. Emerging spintronics mainly aims at conveniently regulating electron spin, opens up a new field for realizing information storage and transmission by utilizing electron spin, and arouses common attention and wide interest of researchers in the fields of physics, materials science, electronic informatics and the like.
The electron spin input from the source electrode along the x direction can be expressed as the combination of positive and negative spin components along the z direction, the electron energy splitting of the spin up and spin down caused by Rashba item in the electronic effective mass Hamilton generates the phase difference of the electrons passing through the field effect tube during the transportation process, and the electron phase of the spins along the x direction, which can be regarded as the spins along the positive and negative z directions, changes so as to regulate and control the current, while the Rashba coefficient η in the Rashba item is in direct proportion to the electric field of the heterojunction interface, so that the magnitude of the current can be controlled by grid voltage application.
However, a general spin field effect transistor injects spin electrons into a semiconductor from a ferromagnetic material, and the efficiency of spin injection is only a few percent due to the mismatch of the band structure of the ferromagnetic material such as Fe and the semiconductor material such as Sn.
Therefore, what kind of material is adopted to match the energy band structures of the source electrode, the drain electrode and the channel material so as to improve the injection efficiency, and the method is particularly important in the application and research of the spin field effect transistor device.
Disclosure of Invention
The invention aims to provide a Cr-doped heterojunction spin field effect transistor and a preparation method thereof aiming at the defects of the prior art. N-type doped point defect Ga adopted by the invention2O3The material has a certain spin polarization effect, can replace the existing process, and improves the spin injection and receiving efficiency, thereby improving the performance of the device and optimizing the spin polarization rate of the material at room temperature.
In order to achieve the above object, the present invention provides a Cr-doped heterojunction spin field effect transistor and a method for fabricating the same; the technical problem to be solved by the invention is realized by the following technical scheme:
one embodiment of the invention provides a preparation method of a Cr-doped heterojunction spin field effect transistor, which comprises the following steps:
(a) selecting a sapphire substrate;
(b) growing Ga on the surface of the sapphire substrate by utilizing a Molecular Beam Epitaxy (MBE) process2O3An epitaxial layer;
(c) in Ga2O3Injecting Cr ions into the epitaxial layer to form a source region and a drain region;
(d) manufacturing ohmic contact source electrodes and drain electrodes on the surfaces of the source regions and the drain regions;
(e) in Ga by Plasma Enhanced Chemical Vapor Deposition (PECVD) process2O3Growing an isolation layer on the surface of the epitaxial layer;
(f) in Ga2O3And manufacturing a Schottky contact gate electrode on the surface of the epitaxial layer to finish the preparation of the spin field effect transistor.
Wherein Ga is ion-implanted2O3The saturation magnetization intensity of the material is obviously larger than that of a 4H-SiC material with a conventional point defect structure, and Ga is injected by ions2O3The Curie temperature of the material is higher than that of a 4H-SiC material and can reach 400K; ion implantation of Ga2O3The material exhibits significant ferromagnetism above room temperature.
Further, in the step (b), Ga is grown on the surface of the sapphire substrate by using an MBE process2O3An epitaxial layer comprising:
at 940 deg.C, the power of radio frequency source is 300W, and the pressure is 1.5 × 10-5Growing the sapphire substrate with the thickness of 0.4-0.6 μm and the N-type doping concentration of 1 × 10 by MBE process under Torr14-1×1016cm-3Ga of (2)2O3(ii) a The evaporation source material is high-purity elemental metal Ga, and the mass fraction is 99.99999%.
In one embodiment of the present invention, step (c) comprises:
(c1) in Ga2O3Depositing Al with the thickness of 1 mu m on the surface of the epitaxial layer to be used as a barrier layer of a source region and a drain region, and photoetching injection regions of the source region and the drain region;
(c2) at normal temperature, the implantation energy is 140keV for Ga2O3Performing Cr ion implantation on the epitaxial layer for 6 times to form a source region and a drain region; a source region andthe depth of the drain region is 0.4-0.6 μm, and the doping concentration is 5 × 1013-1×1016cm-3。
In one embodiment of the present invention, step (d) comprises:
(d1) photoetching ohmic contact areas in a source area and a drain area by adopting a photoetching process, and depositing Ti/Au alloy with the thickness of 250nm to form metal layers of the source area and the drain area;
(d2) and carrying out rapid thermal annealing on the whole device for 1min in an argon atmosphere at 470 ℃ to form an ohmic contact source electrode and a drain electrode.
In one embodiment of the present invention, before step (f), further comprising: and etching a gate region with the width of 1 mu m on the surface of the isolation layer.
In another embodiment of the present invention, there is provided a Cr-doped heterojunction spin field effect transistor, comprising: sapphire substrate, Ga2O3Epitaxial layer, Ga2O3Source region, Ga2O3The Schottky contact gate electrode comprises a drain region, a source electrode, a drain electrode, an isolating layer and a Schottky contact gate electrode;
wherein Ga2O3Source region and Ga2O3The drain region is formed of Ga2O3And 6 times of selective implantation of Cr ions into the epitaxial layer.
Further, Ga2O3The epitaxial layer is N-type with doping concentration of 1 × 1014-1×1016cm-3Ga having a point defect structure with a thickness of 0.4-0.6 μm2O3A material.
Further, the thickness of the isolation layer was 300 nm.
Furthermore, the metal of the Schottky contact gate electrode is Au, and the thickness is 300-500 nm.
Compared with the prior art, the invention has the following beneficial effects:
1) according to the Cr-doped heterojunction spin field effect transistor and the preparation method thereof, the doping concentration and the defect concentration in the source and drain material can be changed by adjusting the ion implantation dosage and the annealing time, so that the spin polarizability of the material at room temperature is optimized;
2) ion implantation of Ga in the invention2O3The saturation magnetization intensity of the material is obviously much larger than that of a 4H-SiC material with a conventional point defect structure, and Ga is injected by ions2O3The Curie temperature of the material is higher than that of a 4H-SiC material and can reach 400K; ion implantation of Ga2O3The material shows obvious ferromagnetism above room temperature;
3) according to the Cr-doped heterojunction spin field effect transistor and the preparation method thereof, the channel and the source drain are made of the same material, epitaxial growth can be directly carried out on the substrate, and meanwhile, the source drain is formed in a mode of injecting Cr ions into the selected region through ions.
Drawings
The following detailed description of embodiments of the invention will be made with reference to the accompanying drawings.
FIG. 1 is a flow chart of a method for manufacturing a Cr-doped heterojunction spin field effect transistor according to an embodiment of the present invention;
FIGS. 2 a-2 g are schematic diagrams of a Cr-doped heterojunction spin field effect transistor according to an embodiment of the present invention;
FIG. 3 is a schematic diagram of a Cr-doped heterojunction spin field effect transistor according to an embodiment of the present invention.
Detailed Description
The present invention will be described in further detail with reference to specific examples, but the embodiments of the present invention are not limited thereto.
Example one
Referring to fig. 1, fig. 1 is a flowchart of a method for manufacturing a Cr-doped heterojunction spin field effect transistor according to an embodiment of the present invention, wherein the method includes:
(a) selecting a sapphire substrate;
(b) growing Ga on surface of sapphire substrate by MBE process2O3An epitaxial layer;
(c) in Ga2O3Injecting Cr ions into the epitaxial layer to form a source region and a drain region;
(d) manufacturing ohmic contact source electrodes and drain electrodes on the surfaces of the source regions and the drain regions;
(e) by using PECVD process in Ga2O3Growing an isolation layer on the surface of the epitaxial layer;
(f) in Ga2O3And manufacturing a Schottky contact gate electrode on the surface of the epitaxial layer to finish the preparation of the spin field effect transistor.
Wherein Ga2O3As a wide-bandgap semiconductor, the bandgap is higher and can reach 4.9eV, while the bandgap of the existing SiC material is only 3 eV; ga2O3The two-dimensional electron system is easier to generate due to the higher forbidden band width.
Preferably, in the step (b), Ga is grown on the surface of the sapphire substrate by using MBE process2O3An epitaxial layer comprising:
at 940 deg.C, the power of radio frequency source is 300W, and the pressure is 1.5 × 10-5Growing the sapphire substrate with the thickness of 0.4-0.6 μm and the N-type doping concentration of 1 × 10 by MBE process under Torr14-1×1016cm-3Ga of (2)2O3(ii) a The evaporation source material is high-purity elemental metal Ga, and the mass fraction is 99.99999%.
Preferably, step (c) may comprise:
(c1) in Ga2O3Depositing Al with the thickness of 1 mu m on the surface of the epitaxial layer to be used as a barrier layer of a source region and a drain region, and photoetching injection regions of the source region and the drain region;
(c2) at a temperature of 500 ℃ with an implantation energy of 140keV for Ga2O3Performing Cr ion implantation on the epitaxial layer for 6 times to form a source region and a drain region; the depth of the source region and the drain region is 0.4-0.6 μm, and the doping concentration is 5 × 1013-1×1016cm-3。
Preferably, step (d) may comprise:
(d1) photoetching ohmic contact areas in a source area and a drain area by adopting a photoetching process, and depositing Ti/Au alloy with the thickness of 250nm to form metal layers of the source area and the drain area;
(d2) and carrying out rapid thermal annealing on the whole device for 1min in an argon atmosphere at 470 ℃ to form an ohmic contact source electrode and a drain electrode.
Preferably, before step (f), further comprising: and etching a gate region with the width of 1 mu m on the surface of the isolation layer.
The channel and the source and the drain are made of the same material, so that epitaxial growth can be directly carried out on the substrate, and the source and the drain are formed by injecting Cr ions into a selected region.
Example two
Referring to fig. 2a to fig. 2g, fig. 2a to fig. 2g are schematic views illustrating a process for manufacturing a Cr-doped heterojunction spin field effect transistor according to an embodiment of the present invention, the method includes the following steps:
step 1, as shown in fig. 2a, selecting a sapphire substrate 001, and performing ultrasonic cleaning on the sapphire substrate by sequentially using acetone, absolute ethyl alcohol and deionized water.
Step 2, as shown in FIG. 2b, growing lightly doped Ga with the thickness of 0.4-0.6 μm on the surface of the sapphire substrate by MBE process2O3The epitaxial layer 002, N type doping concentration is 1X 1014-1×1016cm-3(ii) a The evaporation source material is high-purity elemental metal Ga with the mass fraction of 99.99999 percent, the growth temperature of 940 ℃, the radio frequency source power of 300W and the pressure of 1.5 multiplied by 10-5Torr；
Step 3, as shown in FIG. 2c, in Ga2O3And 6 times of Cr ion selective implantation is carried out on the epitaxial layer to form a source region 003 and a drain region 004: specifically, the method comprises the following steps:
step 3.1 in Ga2O3Depositing a layer of Al with the thickness of 1 mu m on the epitaxial layer to be used as a barrier layer for ion implantation of a drain region and a source region, and forming the drain region and the source region implantation region through photoetching and etching;
step 3.2, Ga is treated at normal temperature2O3Performing 6 times of Cr ion implantation on the epitaxial layer, and implanting into Ga with 140keV implantation energy2O3An epitaxial layer formed to a depth of 0.4-0.6 μm and having a doping concentration of 5 × 1013-1×1016cm-3Source region 003 and drain regionRegion 004;
and 3.3, washing with acetone, methanol and isopropanol for 30min to remove carbon-based organic pollution.
Step 3.4, 98% H is used2SO4:30％H2O2(3:1) cleaning Standard of Mixed solution for Ga2O3Cleaning the surface of the epitaxial layer; then, ion activation annealing was performed at 750 ℃ for 5min in an argon atmosphere.
Step 4, as shown in fig. 2d, specifically includes:
step 4.1, for the entire Ga2O3Coating glue and developing the epitaxial layer, forming ohmic contact areas above the source region and the drain region, depositing 250nm Ti/Au alloy, and then forming a source electrode metal layer and a drain electrode metal layer by stripping;
step 4.2, quickly thermally annealing the whole sample for 1min in an argon atmosphere at 470 ℃ to form an ohmic contact source electrode 005 and a drain electrode 006;
step 5, as shown in FIG. 2e, using PECVD process on Ga2O3The surface of the epitaxial layer is deposited with SiO with the thickness of 300nm2An isolation layer 007; as shown in fig. 2f, a gate region 008 with a width of 1 μm is etched by using photolithography and plasma;
step 6, as shown in FIG. 2g, using magnetron sputtering method to process Ga2O3The surface of the epitaxial layer is sputtered with metal Au with the thickness of 300-500nm as the Schottky contact gate electrode 009, and then is rapidly annealed in argon atmosphere.
The invention adopts ion implantation Ga2O3The material can avoid the generation of secondary phase and interface state, and simultaneously, Ga is ion-implanted2O3The material is of better crystalline quality because, not as a result of defects, the manner in which the ions are implanted has less of an impact on its electrical properties.
EXAMPLE III
Referring to fig. 3, fig. 3 is a schematic view of a Cr-doped heterojunction spin field effect transistor structure according to an embodiment of the invention. The spin field effect transistor is manufactured by the manufacturing method shown in the figures 2 a-2 g.
Specifically, the spin field effect transistor includes: sapphire liningBottom 301, Ga2O3Epitaxial layer 302, Ga2O3Source region 303, Ga2O3Drain region 304, source 305, drain 306, spacer 307, schottky contact gate electrode 308.
Wherein Ga2O3Source region 303 and Ga2O3Drain region 304 is formed of Ga2O3The epitaxial layer 302 is formed by 6 selective implantations of Cr ions.
Preferably, Ga2O3The epitaxial layer 302 is N-type with a doping concentration of 1 × 1014-1×1016cm-3Ga having a point defect structure with a thickness of 0.4-0.6 μm2O3A material.
Preferably, the isolation layer 307 is 300nm thick.
Preferably, the Schottky contact gate electrode metal is Au, and the thickness is 300-500 nm.
In summary, the principle and the implementation of the Cr-doped heterojunction spin field effect transistor and the method for manufacturing the same according to the present invention are explained herein by using specific examples, and the above description of the examples is only used to help understanding the method and the core concept of the invention; meanwhile, for a person skilled in the art, according to the idea of the present invention, there may be variations in the specific embodiments and the application scope, and in summary, the content of the present specification should not be construed as a limitation to the present invention, and the scope of the present invention should be subject to the appended claims.
Claims (9)
1. A preparation method of a Cr-doped heterojunction spin field effect transistor is characterized by comprising the following steps: (a) selecting a sapphire substrate;
(b) growing Ga on the surface of the sapphire substrate2O3An epitaxial layer;
(c) in the Ga2O3Injecting Cr ions into the epitaxial layer to form a source region and a drain region;
(d) manufacturing ohmic contact source electrodes and drain electrodes on the surfaces of the source regions and the drain regions;
(e) in the Ga2O3Growing an isolation layer on the surface of the epitaxial layer;
(f) in the Ga2O3And manufacturing a Schottky contact gate electrode on the surface of the epitaxial layer.
2. The method according to claim 1, wherein in the step (b), Ga is grown on the surface of the sapphire substrate by using an MBE process2O3An epitaxial layer comprising: at 940 deg.C, the power of radio frequency source is 300W, and the pressure is 1.5 × 10-5Growing the sapphire substrate with the thickness of 0.4-0.6 μm and the N-type doping concentration of 1 × 10 by MBE process under Torr14-1×1016cm-3Ga of (2)2O3(ii) a The evaporation source material is high-purity elemental metal Ga, and the mass fraction is 99.99999%.
3. The method of claim 1, wherein step (c) comprises: (c1) in the Ga2O3Al with the thickness of 1 mu m is deposited on the surface of the epitaxial layer and is used as a barrier layer of the source region and the drain region, and the injection regions of the source region and the drain region are photoetched;
(c2) at normal temperature, the implantation energy is 140keV for the Ga2O3Performing Cr ion implantation on the epitaxial layer for 6 times to form the source region and the drain region; the depth of the source region and the drain region is 0.4-0.6 μm, and the doping concentration is 5 × 1013-1×1016cm-3。
4. The method of claim 1, wherein step (d) comprises: (d1) photoetching ohmic contact areas in the source area and the drain area by adopting a photoetching process, and depositing Ti/Au alloy with the thickness of 250nm to form metal layers of the source area and the drain area;
(d2) and rapidly thermally annealing the whole semiconductor device comprising the metal layer for 1min in an argon atmosphere at 470 ℃ to form the ohmic contact source electrode and the ohmic contact drain electrode.
5. The method of claim 1, further comprising, prior to step (f): and etching a gate region with the width of 1 mu m on the surface of the isolation layer.
6. A Cr-doped heterojunction spin field effect transistor, comprising: sapphire substrate, Ga2O3Epitaxial layer, Ga2O3Source region, Ga2O3The Schottky contact gate electrode comprises a drain region, a source electrode, a drain electrode, an isolating layer and a Schottky contact gate electrode;
wherein the Ga is2O3Source region and said Ga2O3Drain region is formed by the Ga2O3And 6 times of selective implantation of Cr ions into the epitaxial layer.
7. The spin field effect transistor of claim 6, wherein the Ga is2O3The epitaxial layer is N-type with doping concentration of 1 × 1014-1×1016cm-3Ga having a point defect structure with a thickness of 0.4-0.6 μm2O3A material.
8. The spin field transistor of claim 6, wherein the spacer layer has a thickness of 300 nm.
9. The spin field effect transistor of claim 6, wherein the Schottky contact gate electrode metal is Au and has a thickness of 300-500 nm.
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| CN107425059B true CN107425059B (en) | 2020-05-22 |
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