CN107422861B - VR (virtual reality) action capturing system for military training of individual soldiers - Google Patents
VR (virtual reality) action capturing system for military training of individual soldiers Download PDFInfo
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Abstract
The invention discloses a VR action capturing system for individual military training, which is characterized by mainly comprising an optical identification point, an optical capturing camera, a signal processing unit, a power module, an Ethernet transceiver, an FPGA module, a filter connected with the FPGA module, a POE switch connected with the filter and a main computer connected with the POE switch. The invention can capture the training motion points of the trainees in real time by combining the optical identification points through the optical capturing camera, and realizes the three-dimensional imaging of the training motion information of the trainees captured by the optical capturing camera through the host computer, thereby ensuring that the commander can accurately evaluate the tactical action level, the psychological bearing capacity and the battlefield strain capacity of the trainees.
Description
Technical Field
The invention relates to a VR motion capture system, in particular to a VR motion capture system for individual military training.
Background
The individual combat training is a frequently-trained subject of the contemporary army, and is mainly used for improving tactical action level, psychological bearing capacity and battlefield strain capacity of trained personnel. In the individual combat training, the instructor can capture the tactical action of a trained soldier through the action capture system to evaluate the tactical action level, the psychological bearing capacity and the battlefield strain capacity of the trained personnel, so that the training scheme can be adjusted correspondingly according to the specific situation of the trained soldier.
However, most of the existing motion capture systems for individual military training use a common camera to capture the tactical motions of the trainees, and the motion capture systems for capturing the tactical motions of the trainees by using the common camera have the problem that the motion points of the trainees cannot be captured in real time, so that the simulated motions of the human body obtained by the motion capture systems are inconsistent with the actual motions of the human body, the trainees cannot accurately evaluate the tactical motion level, the psychological bearing capacity and the battlefield strain capacity of the trainees, and the training schemes cannot be well adjusted according to the specific situations of the trainees.
Disclosure of Invention
The invention aims to overcome the defect that the existing action capturing system for the individual military training cannot capture the moving point of a trainee in real time, and provides a VR action capturing system for the individual military training, which can capture the moving point of the trainee in real time.
The invention is realized by the following technical scheme: a VR action capturing system for individual military training mainly comprises an optical identification point, an optical capturing camera, a signal processing unit connected with the optical capturing camera, a power module and an Ethernet transceiver which are respectively connected with the signal processing unit, an FPGA module respectively connected with the Ethernet transceiver and the power module, a filter connected with the FPGA module, a POE switch connected with the filter, and a main computer connected with the POE switch; the power supply module is respectively connected with the optical capturing camera and the Ethernet transceiver; the signal processing unit consists of an AD converter, a sampling holder and a signal synchronous processor which are respectively connected with the AD converter, and a signal filtering and amplifying circuit which is respectively connected with the sampling holder and the optical capturing camera; the power supply module is respectively connected with the AD converter, the sampling holder, the signal filtering and amplifying circuit and the signal synchronous processor; the Ethernet transceiver is connected with the signal synchronization processor.
The signal filtering and amplifying circuit consists of a variable harmonic wave filtering circuit connected with the optical capturing camera and a low-frequency amplifying circuit connected with the variable harmonic wave filtering circuit; the sample holder is connected with the low-frequency amplifying circuit.
Further, the variable harmonic filter circuit is composed of an amplifier P, a triode VT1, a polar capacitor C1 with a negative electrode connected with a collector of the triode VT1 and a positive electrode connected with the optical capture camera, a polar capacitor C3 with one end connected with a negative electrode of the polar capacitor C1 and the other end connected with a base of the triode VT1 and then grounded, a polar capacitor C2 with a negative electrode connected with a base of the triode VT1 and a positive electrode connected with a positive electrode of the amplifier P after sequentially passing through a resistor R2 and an adjustable resistor R4, a resistor R1 with one end connected with a positive electrode of the polar capacitor C1 and the other end connected with a connection point of the resistor R2 and the adjustable resistor R4, a resistor R6 with one end connected with an output end of the amplifier P and the other end grounded, and a polar capacitor C3 with a positive electrode connected with an emitter of the triode VT1 and a negative electrode connected with an adjustment end of the resistor R58; the positive pole of the amplifier P is connected with the collector of the triode VT1, the negative pole of the amplifier P is connected with the external power supply of the output end, and the low-frequency amplifying circuit is respectively connected with the negative pole and the output end of the amplifier P.
The low-frequency amplifying circuit comprises a triode VT2, a triode VT3, a polar capacitor C6, the negative electrode of which is connected with the base electrode of the triode VT2, the positive electrode of which is connected with the output end of an amplifier P, a polar capacitor C9, the positive electrode of which is connected with the emitter electrode of the triode VT2, the negative electrode of which is connected with the base electrode of the triode VT2 through a resistor R8, a resistor R10, the one end of which is connected with the emitter electrode of the triode VT2, the other end of which is connected with the negative electrode of the polar capacitor C9 and then grounded, a polar capacitor C8, the positive electrode of which is connected with the base electrode of the triode VT 8 through an adjustable resistor R7, the negative electrode of which is connected with the collector electrode of the triode VT3, an adjustable resistor R9, the N electrode of which is connected with the collector electrode of the triode VT2, a diode D, the P electrode of which is connected with the collector electrode of the triode VT3, a polar capacitor C4 with a grounded negative electrode, a resistor R5 with one end connected with the positive electrode of the polar capacitor C8 and the other end connected with the negative electrode of the amplifier P, a polar capacitor C7 with a positive electrode connected with the positive electrode of the polar capacitor C8 after passing through the resistor R11 and a negative electrode connected with the collector electrode of the triode VT3, and a polar capacitor C5 with a positive electrode connected with the positive electrode of the polar capacitor C8 and a negative electrode connected with the positive electrode of the polar capacitor C4; the connection point of the cathode of the amplifier P and the resistor R5 is connected with an external direct current power supply; the collector of the transistor VT3 is connected to a sample holder.
In order to ensure the practical use effect of the invention, the transistor VT1 is a 3AX81 transistor; the triode VT2 and the triode VT3 are both amplifying tubes of 3DG 12.
Compared with the prior art, the invention has the following advantages and beneficial effects:
(1) the invention can capture the training motion points of the trainees in real time by combining the optical identification points through the optical capturing camera, and realizes the three-dimensional imaging of the training motion information of the trainees captured by the optical capturing camera through the host computer, thereby ensuring that the commander can accurately evaluate the tactical action level, the psychological bearing capacity and the battlefield strain capacity of the trainees.
(2) The signal processing unit of the invention can effectively process and convert signals by combining the signal filtering amplifying circuit, the sampling holder, the AD converter and the signal synchronous processor, so that the signal processing unit can output stable and accurate signals, and the tactical action capturing and imaging accuracy of the invention to trainees is effectively improved.
(3) The signal filtering and amplifying circuit is provided with the variable harmonic filter circuit and the low-frequency amplifying circuit, wherein the variable harmonic filter circuit can inhibit or eliminate useless frequency in a signal through a large Q value, so that the signal is effectively prevented from being distorted; the low-frequency amplifying circuit can amplify the bandwidth frequency of the signal, and effectively prevents the signal from nonlinear distortion, so that the signal processing unit of the invention can output stable and accurate signals, and the accuracy of capturing and imaging the training action of the trainee warrior is effectively ensured.
(4) The Ethernet transceiver, the level converter, the FPGA module, the filter and the POE switch are combined, so that the stability of signal conversion, transmission and imaging can be effectively improved.
Drawings
Fig. 1 is a block diagram of the overall structure of the present invention.
Fig. 2 is a block diagram of a signal processing unit according to the present invention.
Fig. 3 is a schematic circuit diagram of a signal filtering and amplifying circuit according to the present invention.
Detailed Description
The present invention will be described in further detail with reference to examples and drawings, but the present invention is not limited thereto.
Examples
As shown in fig. 1 to 3, the optical capturing device mainly comprises an optical identification point, an optical capturing camera, a signal processing unit connected to the optical capturing camera, a power module and an ethernet transceiver respectively connected to the signal processing unit, an FPGA module respectively connected to the ethernet transceiver and the power module, a filter connected to the FPGA module, a POE switch connected to the filter, and a host computer connected to the POE switch; the power module is connected with the optical capture camera and the Ethernet transceiver respectively. The power supply module preferably adopts an YND25-48D05-05 power supply module, and the power supply module can provide stable direct current voltage of 5V and 4.5V for the whole system.
The signal processing unit is shown in fig. 2 and is composed of an AD converter, a sample holder and a signal synchronization processor which are respectively connected with the AD converter, and a signal filtering and amplifying circuit which is respectively connected with the sample holder and the optical capturing camera; the power supply module is respectively connected with the AD converter, the sampling holder, the signal filtering and amplifying circuit and the signal synchronous processor; the Ethernet transceiver is connected with the signal synchronization processor. The signal filtering and amplifying circuit is shown in fig. 3 and is composed of a variable harmonic filtering circuit connected with the optical capturing camera and a low-frequency amplifying circuit connected with the variable harmonic filtering circuit; the sample holder is connected with the low-frequency amplifying circuit.
During specific operation, a plurality of optical identification points are arranged on the training clothes of the trainees and soldiers and are positioned at each joint of the human body, so that each optical identification point can keep the same-direction and same-speed movement with each movement point of the human body. The optical capturing camera is used for capturing the motion trail of the optical identification point, the optical capturing camera is realized by adopting a common optical capturing camera, and the optical capturing camera converts the captured motion trail of the optical identification point into an analog signal and transmits the analog signal to the signal processing unit. The signal processing unit suppresses or eliminates useless frequencies in input signals, amplifies bandwidth frequencies of the signals, converts the amplified signals into data signals, and transmits the data signals to the FPGA module through the Ethernet transceiver. The FPGA module adjusts and operates data signals such as frequency division/frequency multiplication, phase shift and the like in input data signals through a special PLL or DLL inside the FPGA module, obtains a motion value of an optical identification point, and then converts the obtained result into code signals through a global clock wiring resource driver inside the FPGA module and transmits the code signals to a filter. When the FPGA module is powered on, the FPGA module enters a working state, and after power failure, the FPGA is recovered into a white chip, and the internal logic relation disappears, so that the FPGA can be repeatedly used.
Wherein, the wave filter adopts ordinary wave filter to realize, and this wave filter is used for carrying out filtering treatment to the code signal of FPGA module output, makes the code signal more steady, should be given the code signal transmission after handling to the POE switch by the wave filter. This POE switch converts the code signal into image signal and transmits for the host computer, and the host computer carries out three-dimensional formation of image to the image signal of input, just can show the orbit of trainee's motion point through the display of host computer, makes the personnel of commander room can catch in real time the every tactics action of trainee in the training to it assesses to be convenient for the instructor to the tactics action level, the psychological bearing capacity and the battlefield strain capacity of trainee.
The signal processing unit is shown in fig. 2 and is composed of an AD converter, a sample holder, a signal synchronization processor, and a signal filtering and amplifying circuit. And the power supply module provides 4.5V direct current working voltage for each component of the signal processing unit. The signal filtering and amplifying circuit is shown in fig. 3, and is composed of a variable harmonic filtering circuit and a low frequency amplifying circuit. The variable harmonic filter circuit amplifies the Q value of an image analog signal output by the optical capturing camera, and suppresses or eliminates useless frequencies in the signal, thereby effectively preventing the signal from being distorted; the low-frequency amplifying circuit amplifies the bandwidth frequency of the signal, so that nonlinear distortion of the signal is effectively prevented. And the signal filtering and amplifying circuit transmits the processed analog signal to the sampling holder. The sampling holder adjusts and stores the frequency band of the received signal to enable the signal to be kept in a stable state before being sampled, and the AD converter samples the image simulation stored in the sampling holder, converts the sampled image simulation signal into a data signal and then transmits the data signal to the signal synchronous processor. The signal synchronous processor adjusts each frequency point in the input signal to keep the dynamic state of each frequency point of the data signal consistent, so that the signal processing unit of the invention can provide accurate signals for the Ethernet transceiver at the rear part, and the accuracy of the invention in capturing and imaging the training action of the trained soldier is effectively ensured.
Further, as shown in fig. 3, the variable harmonic filter circuit includes an amplifier P, a transistor VT1, a polar capacitor C1 having a negative electrode connected to a collector of the transistor VT1 and a positive electrode connected to the optical capture camera, an adjustable resistor R3 having one end connected to a negative electrode of the polar capacitor C1 and the other end connected to a base of the transistor VT1 and then grounded, a polar capacitor C2 having a negative electrode connected to a base of the transistor VT1 and a positive electrode connected to a positive electrode of the amplifier P through a resistor R2 and the adjustable resistor R4 in sequence, a resistor R1 having one end connected to a positive electrode of the polar capacitor C1 and the other end connected to a connection point of the resistor R2 and the adjustable resistor R4, a resistor R6 having one end connected to an output terminal of the amplifier P and the other end grounded, and a polar capacitor C3 with the anode connected with the emitter of the triode VT1 and the cathode connected with the adjusting end of the resistor R6.
The positive pole of the amplifier P is connected with the collector of the triode VT1, the negative pole of the amplifier P is connected with the external power supply of the output end, and the low-frequency amplifying circuit is respectively connected with the negative pole and the output end of the amplifier P.
In order to ensure that the variable harmonic filter circuit can well realize the effects of amplifying the Q value of an image analog signal and inhibiting or eliminating useless frequencies in the signal, an amplifier P in the circuit adopts an operational amplifier with the model of OP07, and a triode VT1 matched with the amplifier P is a triode with the model of 3AX 81; the resistor R1 and the resistor R2 both adopt current-limiting resistors with the resistance value of 5k omega, the adjustable resistor R3 and the adjustable resistor R6 both adopt varistors with the maximum adjustable value of 15k omega, and the adjustable resistor R4 adopts a rheostat with the maximum adjustable value of 4k omega; the polar capacitor C1 and the polar capacitor C2 both adopt ceramic chip filter capacitors with the capacitance value of 0.01 mu F, and the polar capacitor C3 adopts aluminum electrolytic capacitors with the capacitance value of 120 mu F. The parameters of the single sub-element can be adjusted according to the effect to be achieved by the variable harmonic filter circuit in specific implementation.
When the variable harmonic filter circuit operates specifically, the power supply module provides 4.5V direct-current working voltage for the amplifier P, the polar capacitor C1, the resistor R1 and the adjustable resistor R4 form a frequency converter, the frequency converter adjusts the activity degree of low-frequency harmonics in an input analog signal, and the adjustment degree of the activity degree of the low-frequency harmonics can be realized by changing the resistance value of the adjustable resistor R4. The amplifier P and transistor VT1 form an amplifier that amplifies the Q of the harmonics, which suppresses unwanted frequencies in the signal. The adjustable resistor R3, the polar capacitor C2 and the resistor R2 form an adjustable filter, and the adjustable filter is used in cooperation with an amplifier, so that the suppression effect on unwanted signals in signals can be enhanced, and the unwanted signals in the signals can be thoroughly eliminated. The loop filter circuit which is connected between the output end of the amplifier P and the emitter of the triode VT1 in series and is formed by the polar capacitor C3 and the adjustable resistor R6 can effectively reduce the fluctuation of the signal frequency and the phase, thereby ensuring that the variable harmonic filter circuit realizes the amplification of the Q value of the image analog signal, inhibiting or eliminating the useless frequency in the signal, preventing the distortion of the output signal and effectively improving the certainty of the signal.
Furthermore, the low frequency amplifying circuit is shown in fig. 3 and comprises a transistor VT2, a transistor VT3, a polarity capacitor C9 having a cathode connected to the base of the transistor VT2 and an anode connected to the output terminal of the amplifier P, a polarity capacitor C9 having an anode connected to the emitter of the transistor VT2 and a cathode connected to the base of the transistor VT2 through a resistor R8, a resistor R10 having an end connected to the emitter of the transistor VT2 and the other end connected to the cathode of the polarity capacitor C9 and then grounded, a polarity capacitor C8 having an anode connected to the base of the transistor VT 8 through an adjustable resistor R7 and a cathode connected to the collector of the transistor VT3, an adjustable resistor R9 having an end connected to the anode of the polarity capacitor C8 and the other end connected to the collector of the transistor VT2, a diode D having an N-pole connected to the collector of the transistor VT2 and a P-pole connected to the transistor 3, a cathode connected to the anode of the polarity capacitor C8, A polar capacitor C4 with a grounded negative electrode, a resistor R5 with one end connected with the positive electrode of the polar capacitor C8 and the other end connected with the negative electrode of the amplifier P, a polar capacitor C7 with a positive electrode connected with the positive electrode of the polar capacitor C8 after passing through the resistor R11 and a negative electrode connected with the collector electrode of the triode VT3, and a polar capacitor C5 with a positive electrode connected with the positive electrode of the polar capacitor C8 and a negative electrode connected with the positive electrode of the polar capacitor C4; the connection point of the cathode of the amplifier P and the resistor R5 is connected with an external direct current power supply; the collector of the transistor VT3 is connected to a sample holder.
In order to ensure that the low-frequency amplifying circuit can well realize the amplification of the bandwidth frequency of a signal and effectively prevent the nonlinear distortion effect of the signal, a triode VT2 and a triode VT3 in the circuit are both amplifying tubes of 3DG 12; the resistor R5 adopts a current-limiting resistor with the resistance value of 100 omega, the adjustable resistor R7 and the adjustable resistor R9 both adopt varistors with the maximum adjustable value of 10k omega, the resistor R8 adopts a current-limiting resistor with the resistance value of 33k omega, the resistor R10 adopts a current-limiting resistor with the resistance value of 1k omega, and the resistor R11 adopts a ceramic chip resistor with the resistance value of 0.2k omega; the polar capacitor C4 adopts a charge-discharge capacitor with the capacitance value of 10pF, the polar capacitor C5 adopts a charge-discharge capacitor with the capacitance value of 100 muF, the polar capacitor C6 adopts a resonance capacitor with the capacitance value of 120 muF, the polar capacitor C7 adopts a resonance capacitor with the capacitance value of 47 muF, the polar capacitor C8 adopts a filter capacitor with the capacitance value of 0.2 muF, and the polar capacitor C9 adopts a charge-discharge capacitor with the capacitance value of 120 pF; the diode D adopts a diode with the model number of 1N 4013. The parameters of the single sub-element can be adjusted according to the effect of the low-frequency amplifying circuit in specific implementation.
When the low-frequency amplifying circuit is in specific operation, the signal level output by the variable harmonic filter circuit enables the polar capacitor C6 to quickly resonate, the signal level is enabled to be in a high level state, the working level of the triode VT2 is increased to be excited, a part of the collector current Ic1 of the triode VT2 provides bias voltage for the triode VT3 through the diode D, and at the moment, the triode VT2 and the triode VT3 form a cyclic amplifier which amplifies the bandwidth frequency of the signal. Meanwhile, the resistor R10 and the polar capacitor C9 are used as a loop resonator between the emitter of the triode VT2 and the emitter of the triode VT3, and the loop resonator can effectively reduce the loss of the inner conductor of the triode VT2 and the triode VT3 when the frequency of the anodes of the triodes is increased. Meanwhile, the adjustable resistor R9 and the adjustable resistor R7 are adjusted to enable the potential U of the output end of the adjustable resistor R9 to be 1/2UCC, so that the working level of the triode VT3 can be more stable, and cross-over distortion can be overcome. In addition, one end of the adjustable resistor R7 is connected with the adjusting end of the adjustable resistor R9, so that negative feedback direct current voltage can be introduced into the circuit, on one hand, the static working points of the triode VT2 and the triode VT3 can be stabilized, and meanwhile, the nonlinear distortion rate of signals is reduced, so that the low-frequency amplifying circuit can well amplify the bandwidth frequency of the signals, and the nonlinear distortion effect of the signals is effectively prevented.
According to the embodiments, the invention can be well realized.
Claims (3)
1. A VR action capturing system for individual military training is characterized by mainly comprising an optical identification point, an optical capturing camera, a signal processing unit connected with the optical capturing camera, a power module and an Ethernet transceiver which are respectively connected with the signal processing unit, an FPGA module respectively connected with the Ethernet transceiver and the power module, a filter connected with the FPGA module, a POE switch connected with the filter and a main computer connected with the POE switch; the power supply module is respectively connected with the optical capturing camera and the Ethernet transceiver; the signal processing unit consists of an AD converter, a sampling holder and a signal synchronous processor which are respectively connected with the AD converter, and a signal filtering and amplifying circuit which is respectively connected with the sampling holder and the optical capturing camera; the power supply module is respectively connected with the AD converter, the sampling holder, the signal filtering and amplifying circuit and the signal synchronous processor; the Ethernet transceiver is connected with the signal synchronization processor; the signal filtering and amplifying circuit consists of a variable harmonic wave filtering circuit connected with the optical capturing camera and a low-frequency amplifying circuit connected with the variable harmonic wave filtering circuit; the sampling holder is connected with the low-frequency amplifying circuit; the variable harmonic filter circuit consists of an amplifier P, a triode VT1, a polar capacitor C1 of which the negative electrode is connected with the collector electrode of the triode VT1 and the positive electrode is connected with the optical capture camera, a polar capacitor C2 of which one end is connected with the negative electrode of the polar capacitor C1 and the other end is connected with the base electrode of the triode VT1 and then grounded, a polar capacitor C2 of which the negative electrode is connected with the base electrode of the triode VT1 and the positive electrode is connected with the positive electrode of the amplifier P after sequentially passing through a resistor R2 and an adjustable resistor R4, a resistor R1 of which one end is connected with the positive electrode of the polar capacitor C1 and the other end is connected with the connection point of the resistor R2 and the adjustable resistor R4, a resistor R6 of which one end is connected with the output end of the amplifier P and the other end is grounded, and a polar capacitor C3 of which the positive electrode is connected with; the positive pole of the amplifier P is connected with the collector of the triode VT1, the negative pole of the amplifier P is connected with the external power supply of the output end, and the low-frequency amplifying circuit is respectively connected with the negative pole and the output end of the amplifier P.
2. The VR motion capture system of claim 1, wherein the low frequency amplifier circuit comprises a transistor VT2, a transistor VT3, a polar capacitor C6 having a cathode connected to the base of the transistor VT2 and an anode connected to the output of the amplifier P, a polar capacitor C9 having an anode connected to the emitter of the transistor VT2 and a cathode connected to the base of the transistor VT2 via a resistor R8, a resistor R10 having an anode connected to the emitter of the transistor VT2 and the other end connected to the cathode of the polar capacitor C9 and a ground, a polar capacitor C8 having an anode connected to the base of the transistor VT2 via an adjustable resistor R7 and a cathode connected to the collector of the transistor VT3, an adjustable resistor R9 having an anode connected to the anode of the polar capacitor C8 and the other end connected to the collector of the transistor VT2, and an N-pole connected to the collector of the transistor VT2, A diode D with the P pole connected with the triode VT3, a polar capacitor C4 with the anode connected with the anode of the polar capacitor C8 and the cathode grounded, a resistor R5 with one end connected with the anode of the polar capacitor C8 and the other end connected with the cathode of the amplifier P, a polar capacitor C7 with the anode connected with the anode of the polar capacitor C8 and the cathode connected with the collector of the triode VT3 after passing through the resistor R11, and a polar capacitor C5 with the anode connected with the anode of the polar capacitor C8 and the cathode connected with the anode of the polar capacitor C4; the connection point of the cathode of the amplifier P and the resistor R5 is connected with an external direct current power supply; the collector of the transistor VT3 is connected to a sample holder.
3. The VR motion capture system for individual military training of claim 2 wherein the transistor VT1 is a 3AX81 transistor; the triode VT2 and the triode VT3 are both amplifying tubes of 3DG 12.
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| CN108428385A (en) * | 2018-06-06 | 2018-08-21 | 中国人民解放军第四军医大学 | Battlefield surroundings desensitization training device based on VR technologies and training method |
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