CN107390600A - Data acquisition device with a variety of link modes - Google Patents
Data acquisition device with a variety of link modes Download PDFInfo
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- CN107390600A CN107390600A CN201710797498.2A CN201710797498A CN107390600A CN 107390600 A CN107390600 A CN 107390600A CN 201710797498 A CN201710797498 A CN 201710797498A CN 107390600 A CN107390600 A CN 107390600A
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B19/00—Programme-control systems
- G05B19/02—Programme-control systems electric
- G05B19/04—Programme control other than numerical control, i.e. in sequence controllers or logic controllers
- G05B19/042—Programme control other than numerical control, i.e. in sequence controllers or logic controllers using digital processors
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
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- G05B2219/26—Pc applications
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Abstract
The present invention provides a kind of data acquisition device and method with a variety of link modes, and the device includes：Analog-digital converter, for signal to be carried out into analog-to-digital conversion；First data selector, for the input link accessed according to the outlet selector of interface controller；First demodulating unit, for demodulating microwave signal link output two-way demodulating data；Second demodulating unit, for demodulating laser signal link output two-way demodulating data；Second data selector, the 3rd data selector, the 4th data selector, it is used to select input link according to the output of interface controller and exported；Interface controller, the instruction for decomposing peripheral bus transmission produce the input that corresponding control logic signal controls demodulating unit and data selector respectively；It is additionally operable to receive and caches demodulating data and reads data so that peripheral bus accesses.The present invention considerably reduces the consumption of storage resource, the complexity of system development, CPU software demodulation load, the power consumption of system.
Description
Technical field
The invention belongs to precise measurement and control technical field, more particularly to a kind of precise measurement and control piece applied to chip atomic clock
Upper system has the data acquisition device of a variety of link modes.
Background technology
At present, precise measurement and control on-chip system (SoC, System on Chip) is mainly using single-chip microcomputer, such as Dezhou instrument
The MSP430 series monolithics of device (TI), Ling Yang SPCE061A single-chip microcomputers etc., the data acquisition transmission link of above-mentioned single-chip microcomputer
Input is analog signal, and analog signal is converted to data signal through ADC and is transferred to bus, waiting for CPU by interface controller
Processing.As shown in figure 1, this data acquisition transmission link can meet in general precise measurement and control application demand, but object chip
During the accurate control of atomic clock, the light inspection signal that is exported due to the physical system of chip atomic clock is DC stacked two tune
The distinctive signal of frequency (5KHz and 125Hz) processed, in order to extract chip atomic clock in the light inspection signal that is exported from physical system
Microwave and laser changed power information, it is necessary to be demodulated respectively to the light inspection signal of collection, this just needs single-chip microcomputer to connect
Continuous collection input signal, and be stored in on-chip memory, waiting for CPU carries out soft to different frequencies respectively to the data of collection
Part demodulates.
However, using traditional data acquisition transmission link single-chip microcomputer, it is necessary to enough capacity piece on storage resource, and
And need to use software demodulation mode, so as to add the complexity of system development, increase cpu load and system operation work(
Consumption.
The content of the invention
In view of the above the shortcomings that prior art, it is an object of the invention to provide a kind of with a variety of link modes
Data acquisition device, for solve in the prior art storage resource needed for data acquisition device is big, system development complexity is high,
CPU meet greatly with system operation power consumption it is high the problem of.
In order to achieve the above objects and other related objects, the present invention provides a kind of data acquisition with a variety of link modes
Device, including：
Analog-digital converter, its input connection analog signal, for the analog signal to be converted into data signal；
First data selector, its input and control terminal difference connecting interface controller, its input and the modulus
Converter is connected, for selecting the access data signal or the interface controller defeated according to the output of the interface controller
The instruction entered；
First demodulating unit, its input connect first data selector, and its control terminal connects the Interface Controller
Device, for demodulating microwave signal link output two-way demodulating data；
Second demodulating unit, its input connect the first data selector, and its control terminal connects the interface controller, uses
In demodulation laser signal link output two-way demodulating data；
Second data selector, its input connect the two-way demodulating data of first demodulating unit, its output end with
Control terminal connects the interface controller respectively, for according to the control logic signal behavior output from the interface controller
The demodulating data of first demodulating unit is to interface controller all the way；
3rd data selector, its input connect the two-way demodulating data of second demodulating unit, and its control terminal connects
The interface controller is connect, for according to the control logic signal behavior output all the way described second from the interface controller
The demodulating data of demodulating unit；
4th data selector, its input connect the defeated of the 3rd data selector and the analog-digital converter respectively
Go out end, its output end is connected the interface controller with control terminal respectively, for according to the control from the interface controller
The input link of logical signal selection connection, by its signal output to the interface controller；
The interface controller, it is connected with peripheral bus, and phase is produced for decomposing the instruction from the peripheral bus
The control logic signal answered to control the input of each demodulating unit and data selector respectively；It is additionally operable to receive and delays
Deposit the demodulating data and read data so that the peripheral bus accesses.
Another object of the present invention is to provide a kind of collection using the data acquisition device with a variety of link modes
Method, including：
The analog signal of input is converted to data signal output by analog-digital converter；
Interface controller parsing the instruction from peripheral interface obtain control logic signal, with to each data selector,
Demodulating unit carries out logic control, controls the data signal to be output to peripheral data interface and forms three kinds of transmission link patterns；
When control logic signal causes the data signal successively through the first data selector, the first demodulating unit, second
When between data selector, interface controller and peripheral data interface, the demodulation link of HZ level frequencies is formed；
When control logic signal causes the data signal successively through the first data selector, the second demodulating unit, second
When between data selector, the 4th data selector, interface controller and peripheral data interface, the demodulation of KHZ level frequencies is formed
Link；
When control logic signal causes the data signal to be connect in the 4th data selector, interface controller and peripheral data
When between mouthful, common transmission link is formed.
As described above, the data acquisition device and method with a variety of link modes of the present invention, has below beneficial to effect
Fruit：
The present invention controls the switch of multiple data selectors by interface controller, by the biography of analog signal to peripheral bus
Transmission link is configured to three kinds of transmission link patterns, and the first is that HZ levels frequency demodulation carries out analog-to-digital conversion, and second is KHZ levels frequency
Rate demodulation carries out analog-to-digital conversion, and the third is that common transmission link directly carries out analog-to-digital conversion.Conventional one-piece machine is overcome in face
Single data acquisition transmission link is brought during control process special to chip atomic clock storage resource consumption is big, system development
The problem of complexity is high, CPU software demodulation load is big, system power dissipation is high.So that the on-chip system chip based on invention design
Not only there is the function of general single chip, additionally it is possible to meet the special applications demand of the similar accurate control of chip atomic clock.
Brief description of the drawings
Fig. 1 is shown as traditional on-chip system data acquisition transmission link structural frames schematic diagram provided by the invention；
Fig. 2, which is shown as the precise measurement and control on-chip system provided by the invention applied to chip atomic clock, has a variety of link moulds
The data acquisition device structural representation of formula；
Fig. 3 is shown as the structural representation of the first demodulating unit in Fig. 2 provided by the invention；
Fig. 4 is shown as the structural representation of the second demodulating unit in Fig. 2 provided by the invention；
Fig. 5 is shown as the structural representation of interface controller in Fig. 2 provided by the invention；
Fig. 6 is shown as a kind of acquisition method flow of data acquisition device with a variety of link modes provided by the invention
Figure.
Embodiment
Illustrate embodiments of the present invention below by way of specific instantiation, those skilled in the art can be by this specification
Disclosed content understands other advantages and effect of the present invention easily.The present invention can also pass through specific realities different in addition
The mode of applying is embodied or practiced, the various details in this specification can also be based on different viewpoints with application, without departing from
Various modifications or alterations are carried out under the spirit of the present invention.It should be noted that in the case where not conflicting, following examples and implementation
Feature in example can be mutually combined.
It should be noted that the diagram provided in following examples only illustrates the basic structure of the present invention in a schematic way
Think, only show the component relevant with the present invention in schema then rather than according to component count, shape and the size during actual implement
Draw, kenel, quantity and the ratio of each component can be a kind of random change during its actual implementation, and its assembly layout kenel
It is likely more complexity.
Embodiment 1
Referring to Fig. 2, to have the data of a variety of link modes applied to the precise measurement and control on-chip system of chip atomic clock
Harvester structural representation, including：
Analog-digital converter 1, its input connection analog signal, for the analog signal to be converted into data signal；
Wherein, the analog-digital converter can be that ADC or ADC IP, ADC IP are preferably general 16 9 tunnels analogies numeral
Converter, it is configured to sample rate during single channel and is more than 50Kbps.And the analog signal connected is the physical system of chip atomic clock
The light inspection signal of output, it is the distinctive signals of DC stacked two modulation frequency (5KHz and 125Hz), in order to from thing
The microwave of chip atomic clock and the changed power information of laser are extracted, it is necessary to a variety of demodulation in the light inspection signal of reason system output
Unit is combined.
First data selector 21, its input turn with control terminal difference connecting interface controller, its input with modulus
Parallel operation is connected, for the finger for accessing the data signal according to the output selection of the interface controller or interface controller inputs
Order；
In Fig. 2, shown in MUX1, the control logic to control terminal of interface controller output instructs, by peripheral interface
CPU is exported, and the instruction of interface controller parsing CPU outputs generates corresponding control signal, the instruction of interface controller output
Also can be demodulated by follow-up demodulating unit.
First demodulating unit 3, its input connect first data selector, and its control terminal connects the Interface Controller
Device, for demodulating microwave signal link output two-way demodulating data；
Second demodulating unit 4, its input connect the first data selector, and its control terminal connects the interface controller,
For demodulating laser signal link output two-way demodulating data；
Meanwhile first the input of demodulating unit and the second demodulating unit can be directly under the control of interface controller, will
The instruction of APB buses output is directly inputted to two demodulating units through interface controller.
Second data selector 22, its input connect the two-way demodulating data of first demodulating unit, its output end
The interface controller is connected respectively with control terminal, for defeated according to the control logic signal behavior from the interface controller
Go out the demodulating data of first demodulating unit all the way to interface controller；
In Fig. 2, shown in MUX2, the control logic to control terminal of interface controller output instructs, by peripheral interface
CPU is exported, and the instruction of interface controller parsing CPU outputs generates corresponding control signal.
3rd data selector 23, its input connect the two-way demodulating data of second demodulating unit, its control terminal
The interface controller is connected, for according to the control logic signal behavior output from the interface controller all the way described the
The demodulating data of two demodulating units；
In Fig. 2, shown in MUX3, the control logic to control terminal of interface controller output instructs, by peripheral interface
CPU is exported, and the instruction of interface controller parsing CPU outputs generates corresponding control signal.
4th data selector 24, its input connect the 3rd data selector and the analog-digital converter respectively
Output end, its output end are connected the interface controller with control terminal respectively, for according to the control from the interface controller
The input link of logical signal selection connection processed, by its signal output to the interface controller；
In Fig. 2, shown in MUX4, the control logic to control terminal of interface controller output instructs, by peripheral interface
CPU is exported, and the instruction of interface controller parsing CPU outputs generates corresponding control signal.
Interface controller 5, it is connected with peripheral bus (APB) 6, is produced for decomposing the instruction from the peripheral bus
The corresponding control logic signal to control the input of each demodulating unit and data selector respectively；It is additionally operable to receive simultaneously
Cache the demodulating data and read data so that the peripheral bus accesses.
Specifically, controlled when data acquisition device is integrated in applied to the accurate of chip atomic clock in on-chip system, at least
Manufactured using 0.18um CMOS technologies.
In the present embodiment, the present invention controls the switch of multiple data selectors by interface controller, by analog signal
Transmission link to peripheral bus is configured to three kinds of transmission link patterns, the first be the demodulating units of ADC IP+MUX1+ first+
MUX2+ interface controllers, collection conversion, the Hz level frequency demodulations of analog signal are realized, second is ADC IP+MUX1+ second
Demodulating unit+MUX3+MUX4+ interface controllers, collection conversion, the kHz level frequency demodulations of analog signal are realized, the third is logical
With transmission link, i.e. ADC IP+MUX4+ interface controllers directly carry out analog-to-digital conversion.Conventional one-piece machine is overcome towards core
Single data acquisition transmission link is brought during the special control process of piece atomic clock storage resource consumption is big, system development is complicated
The problem of degree is high, CPU software demodulation load is big, system power dissipation is high.So that the on-chip system chip based on invention design is not only
Function with general single chip, additionally it is possible to meet the special applications demand of the similar accurate control of chip atomic clock.
Embodiment 2
Referring to Fig. 3, be the structural representation of the first demodulating unit 3 in Fig. 2 provided by the invention, including：
First frequency mixer 301, its input connect the input of the first data selector and the first quadrature demodulator respectively,
Carried out for the signal exported to the first data selector and the first quadrature demodulator output end I roads cosine wave signal at mixing
Reason；
First quadrature demodulator (NCO1) 303, its input connecting interface controller, it is mixed that its output end connects first respectively
Frequency device and the second frequency mixer, for exported according to the interface controller control logic signal generation I roads, corresponding to Q roads just,
Cosine signal；
Specifically, the first quadrature demodulator produce frequency be 125HZ just, cosine signal.
Second frequency mixer 302, its input connect the output end and the first quadrature demodulator of the first data selector respectively
Input, for entering to the signal that the first data selector exports and the first quadrature demodulator output end Q roads sine wave signal
Row Frequency mixing processing；
Filter chain I, it is connected to form I branch roads with first frequency mixer, for the signal to being exported through the first frequency mixer
It is filtered extraction processing；
Filter chain Q, it is connected to form Q branch roads with second frequency mixer, for the signal to being exported through the second frequency mixer
It is filtered extraction processing.
The filter chain I and filter chain Q includes：The first low pass filter group 304 for being sequentially connected, the first extracting unit
305th, the second low pass filter group 306, the second extracting unit 307, the 3rd low pass filter group 308 and the 3rd extracting unit 309,
Wherein, first extracting unit 305 is 10 times of extractions, and second extracting unit 307 is 10 times of extractions, and the described 3rd extracts
Unit 309 is 4 times of extractions.
Wherein, 400 times of filter chain I and filter chain Q extract the hierarchical approaches using 10 × 10 × 4, can reduce extraction filter
The design difficulty and design complexities of ripple device, and then save area and power consumption.
In the present embodiment, microwave signal in light inspection signal is demodulated processing by the first demodulating unit according to demand, defeated
Go out I/Q two-way demodulating data orthogonal each other and be transferred to data selector, be available for user to select.
Embodiment 3
Referring to Fig. 4, be the structural representation of the second demodulating unit 4 in Fig. 2 provided by the invention, including：
Three-mixer 401, its input connect the output end and the second quadrature demodulator of the first data selector respectively
Input, for entering to the signal that the first data selector exports and the second quadrature demodulator output end I roads cosine wave signal
Row Frequency mixing processing；
Second quadrature demodulator (NOC2) 403, its input connecting interface controller, it is mixed that its output end connects the 3rd respectively
Frequency device and the 4th frequency mixer, for exported according to the interface controller control logic signal generation I roads, corresponding to Q roads just,
Cosine signal；
4th frequency mixer 402, its input connect the input of the first data selector and the second quadrature demodulator respectively,
Carried out for the signal exported to the first data selector and the second quadrature demodulator output end Q roads sine wave signal at mixing
Reason；
Filtering group I, it is connected to form I branch roads with the three-mixer, for the signal to being exported through three-mixer
It is filtered extraction processing；
Filtering group Q, it is connected to form Q branch roads with the 4th frequency mixer, for the signal to being exported through the 4th frequency mixer
It is filtered extraction processing.
The filtering group I includes with filtering group Q：The 4th low pass filter group 404 and the 4th being sequentially connected extracts list
Member 405, wherein, the 4th extracting unit 404 is 20 times of extractions.
Wherein, 400 times of filtering group I and filtering group Q extract the hierarchical approaches using 10 × 10 × 4, can reduce extraction filter
The design difficulty and design complexities of ripple device, and then save area and power consumption.
In the present embodiment, laser signal in light inspection signal is demodulated processing by the second demodulating unit according to demand, defeated
Go out I/Q two-way demodulating data orthogonal each other and be transferred to data selector, be available for user to select.
Embodiment 4
Referring to Fig. 5, be the structural representation of interface controller 5 in Fig. 2 provided by the invention, including：
Peripheral bus (APB EBIs) 501, for receiving the instruction sent from peripheral bus, it is additionally operable to connect
Receive the access from the peripheral bus；
Master control logic module 502, is connected with peripheral bus, for disassembly instruction with control each data selector,
Interrupt logic and FIFO control logic module；
Interrupt logic 503, its input is connected with the second data selector, the 4th data selector, for basis
The input link of the control logic instruction selection connection of master control logic module, and when the demodulation number for receiving the input link transmission
According to when produce interrupt logic signal send to peripheral bus；
FIFO control logic module 504, it is connected with fifo module, peripheral bus respectively, for by the number of reading
According to being transferred to peripheral bus；
Fifo module 505, its input and output end are connected with FIFO control logic module, its input connection the 4th
Data selector output end, for caching the data of the 4th data selector output.
Wherein, fifo module is preferably general dual-ported memory, and memory capacity can be adjusted according to user's request；
In the present embodiment, on the one hand interface controller passes through APB EBIs and APB (Advanced Peripheral
Bus) interconnection communication；On the other hand, the APB control commands exported are transferred into master control logic module to carry out being parsed into control logic
Instruction, control logic instruction is transferred to each data selector, interrupt logic and FIFO control logic module successively respectively,
Control their mode of operation；In addition, interrupt logic is used to receive the demodulation number that the transmission of second, four data selectors comes
According to, meanwhile, produce interrupt logic signal and send to peripheral bus；FIFO control logic module is used to arrive the data transfer of reading
Peripheral bus, and fifo module are used to cache the data that the 4th data selector exports, so as to control whole data to adopt
Three kinds of different mode demodulation links of formation of acquisition means.
Embodiment 5
Referring to Fig. 6, it is a kind of acquisition method of the data acquisition device with a variety of link modes provided by the invention
Flow chart, including：
Step 1, the analog signal of input is converted to data signal output by analog-digital converter；
Analog signal is light inspection signal, but is not limited solely to light inspection signal, in addition to other types of analog signal.
Step 2, instruction of the interface controller parsing from peripheral interface obtains control logic signal, for each data
Selector, demodulating unit carry out logic control, control the data signal to be output to peripheral data interface and form three kinds of chains
Road pattern；
Wherein, the instruction of peripheral interface is inputted by CPU, and interface controller is selected each data according to the instruction of parsing
Device, demodulating unit carry out logic control, so as to form three kinds of simultaneous transmission link patterns.
Step 2.1, when control logic signal make it that the data signal is single through the first data selector, the first demodulation successively
When between member, the second data selector, interface controller and peripheral data interface, the demodulation link of HZ level frequencies is formed；
Specifically, the signal caused 125HZ sine and cosines orthogonal with the first demodulating unit the first data selector exported
Signal carries out orthogonal mixing, and output carries out LPF with extracting the orthogonal signalling of processing generation two-way HZ levels successively respectively；
Wherein the orthogonal signalling of HZ levels are demodulation to the connection of control logic signal behavior all the way according to caused by interface controller
Data, when the interface controller receives the demodulating data, generation interrupt logic signal is transferred to peripheral bus, directly
Untill CPU is responded.
Step 2.2, when control logic signal make it that the data signal is single through the first data selector, the second demodulation successively
When between member, the second data selector, the 4th data selector, interface controller and peripheral data interface, KHZ level frequencies are formed
Demodulation link；
Specifically, the signal caused 5KHZ sine and cosines letter orthogonal with the second demodulating unit the first data selector exported
Number orthogonal mixing is carried out, output carries out LPF with extracting the orthogonal signalling of processing generation two-way KHZ levels successively respectively；
Wherein the orthogonal signalling of KHZ levels are demodulation number all the way for control signal selection connection according to caused by interface controller
According to, be written and read when the interface controller receives the demodulating data operate and stored；
When volume space half is arrived in the monitoring demodulating data storage, produce interrupt logic signal and send to total to periphery
Line interface, waiting for CPU response；
When CPU is responded, when interface controller parses its instruction to read demodulating data order, producing reading control sequential will solve
Adjusting data is transferred to peripheral bus.
Step 2.3, when control logic signal cause the data signal the 4th data selector, interface controller with it is outer
When enclosing between data-interface, common transmission link is formed.
Specifically, the data signal is direct through the 4th data selector by data signal according to the control of interface controller
It is transferred to peripheral bus.
In the present embodiment, step 2.1,2.2,2.3 are to be based on step 2 while occur, i.e. the demodulation of three kinds of link modes
Link is to exist simultaneously.The microwave of chip atomic clock and the changed power information of laser are extracted by the light inspection signal of input,
The light inspection signal collected is demodulated respectively, different frequent points are directed to by the first demodulating unit, the second demodulating unit respectively
It is demodulated, without software demodulation, reduces cpu load and system operation power consumption.Demodulating data is cached to interface controller,
When the demodulating data of caching accounts for volume space half, interrupt logic signal, which is sent to peripheral bus, waiting for CPU, to be rung
Should, when CPU is responded, when interface controller parses its instruction to read demodulating data order, control sequential will be read in generation to be demodulated
Data transfer is to peripheral bus., also can proper solution tune light inspection signal on piece in the state of storage resource deficiency.Separately
Outside, designed by specific control logic and transmission link, form the demodulation link of three kinds of link modes, reduce system development
Complexity.
Embodiment 6
For aforesaid way, selection is carried out applied to the operation principle of the data acquisition transmission multi-mode link of on-chip system
Simple illustration.Chip periphery inputs analog signal and samples the analog signal to ADC IP, ADC IP and turn the analog signal
The digital signals in parallel output of 16 is changed to, the APB buses that 16 position digital signal is transferred to on-chip system there are three kinds of chains
Road pattern.Interface controller receives the order of APB bus transfers by APB EBIs, after being parsed in master control logic,
The master control logic of interface controller sends control to MUX1, MUX2, MUX3, MUX4, the first demodulating unit and the second demodulating unit
Signal, so as to realize the selection control of three kinds of transmission link patterns.
The first transmission link pattern is：ADC IP output is transferred to the first demodulating unit by MUX1, in interface
Under the control of controller, the NCO1 of the first demodulating unit produce orthogonal 125Hz just, 16 of cosine signal and ADC IP outputs
Data carry out orthogonal mixing in the first frequency mixer and the second frequency mixer in the first demodulating unit, the filter through the first demodulating unit
The respective LPFs of ripple chain I/Q and extraction processing, finally, the first demodulating unit exports 16 orthogonal I/Q two paths of signals, this
Two-way i/q signal is transferred in interface controller, then pass through Interface Controller under the selection control of interface controller by MUX2
Interrupt logic in device produces interrupt signal and is delivered to APB EBIs, waiting for CPU response processing.
Second of transmission link pattern be：ADC IP output datas are transferred to the second demodulating unit by interface controller,
Under the control of interface controller, the NCO2 of the second demodulating unit produces the 16 of orthogonal 5kHz cosine and sine signals and ADC IP outputs
Position data carry out orthogonal mixing in the three-mixer and the 4th frequency mixer in the second demodulating unit, by the second demodulating unit
The respective LPFs of filtering group I/Q and extraction processing, finally, the second demodulating unit exports orthogonal 16 I/Q two-way letter
Number.This two-way i/q signal is transferred in interface controller under the selection control of interface controller by MUX3 and MUX4
FIFO, by control of the master control logic module of interface controller to FIFO control logic module, produce fifo module writes behaviour
Make enabled, write address, write the signals such as clock, so as to the data Cun Chudao fifo modules for handling the second demodulating unit, meanwhile, lead to
FIFO control logic module and the interrupt logic crossed in interface controller, the common demodulating data monitored in fifo module are deposited
Storage situation, wait until fifo module storage arrive when occupying half volume space, pass through interrupt logic, generation fifo module
The full reading data interrupt requests of the demodulating data of middle caching, APB buses, waiting for CPU response are delivered to by APB EBIs
Processing；, will control FIFO controls after master control logic parses data command of the CPU instruction for reading fifo module after CPU is responded
The reading control sequential of the fifo module of logic module generation processed, including read operation enable, read address, read clock etc., so that will
Demodulating data in fifo module is delivered to APB buses by the control of master control logic module and FIFO control logic module and connect
Mouthful.
The third transmission link pattern is：ADC IP output datas are under the master control logic control of interface controller, directly
It is delivered to APB buses, i.e. ADC IP are directly integrated in APB buses, and this pattern is traditional on-chip system data acquisition
Transmission link.
In summary, the present invention controls the switch of multiple data selectors by interface controller, by analog signal outside
The transmission link for enclosing bus is configured to three kinds of transmission link patterns, the first be HZ levels frequency demodulation carry out analog-to-digital conversion, second
Kind carries out analog-to-digital conversion for KHZ levels frequency demodulation, and the third is that common transmission link directly carries out analog-to-digital conversion.Overcome tradition
The storage resource consumption that the single-chip microcomputer data acquisition transmission link single in the special control process of object chip atomic clock is brought
Greatly, the problem of system development complexity is high, CPU software demodulation load is big, system power dissipation is high.So that the piece based on invention design
Upper System on Chip/SoC not only has the function of general single chip, additionally it is possible to meets the special applications of the similar accurate control of chip atomic clock
Demand.So the present invention effectively overcomes various shortcoming of the prior art and has high industrial utilization.
The above-described embodiments merely illustrate the principles and effects of the present invention, not for the limitation present invention.It is any ripe
Know the personage of this technology all can carry out modifications and changes under the spirit and scope without prejudice to the present invention to above-described embodiment.Cause
This, those of ordinary skill in the art is complete without departing from disclosed spirit and institute under technological thought such as
Into all equivalent modifications or change, should by the present invention claim be covered.
Claims (10)
- A kind of 1. data acquisition device with a variety of link modes, it is characterised in that including：Analog-digital converter, its input connection analog signal, for the analog signal to be converted into data signal；First data selector, its input and control terminal difference connecting interface controller, its input and the analog-to-digital conversion Device is connected, for what is inputted according to the output selection access data signal of the interface controller or the interface controller Instruction；First demodulating unit, its input connect first data selector, and its control terminal connects the interface controller, uses In demodulation microwave signal link output two-way demodulating data；Second demodulating unit, its input connect the first data selector, and its control terminal connects the interface controller, for solving Adjust laser signal link output two-way demodulating data；Second data selector, its input connect the two-way demodulating data of first demodulating unit, its output end and control End connects the interface controller respectively, for being exported all the way according to the control logic signal behavior from the interface controller The demodulating data of first demodulating unit is to interface controller；3rd data selector, its input connect the two-way demodulating data of second demodulating unit, its control terminal connection institute Interface controller is stated, for according to second demodulation all the way of the control logic signal behavior output from the interface controller The demodulating data of unit；4th data selector, its input connect the output of the 3rd data selector and the analog-digital converter respectively End, its output end are connected the interface controller with control terminal respectively, for being patrolled according to the control from the interface controller The input link of signal behavior connection is collected, by its signal output to the interface controller；The interface controller, it is connected with peripheral bus, is produced accordingly for decomposing the instruction from the peripheral bus The control logic signal to control the input of each demodulating unit and data selector respectively；It is additionally operable to receive and caches institute State demodulating data and read data so that the peripheral bus accesses.
- 2. the data acquisition device according to claim 1 with a variety of link modes, it is characterised in that first solution Unit is adjusted to include two kinds of demodulating datas of the corresponding output of two branch roads of I, Q, wherein, first demodulating unit includes：First frequency mixer, its input connect the output end of the first data selector and the input of the first quadrature demodulator respectively End, for signal and the first quadrature demodulator output end I roads cosine wave signal exported to first data selector Carry out Frequency mixing processing；First quadrature demodulator, its input connecting interface controller, its output end connect first frequency mixer and respectively Two frequency mixers, for exported according to the interface controller control logic signal generation I roads, corresponding to Q roads just, cosine letter Number；Second frequency mixer, its input connect the input of first data selector and the first quadrature demodulator respectively End, carried out for the signal exported to first data selector and the first quadrature demodulator output end Q roads sine wave signal Frequency mixing processing；Filter chain I, it is connected to form I branch roads with first frequency mixer, for the signal to being exported through first frequency mixer It is filtered extraction processing；Filter chain Q, it is connected to form Q branch roads with second frequency mixer, for the signal to being exported through second frequency mixer It is filtered extraction processing.
- 3. the data acquisition device according to claim 2 with a variety of link modes, it is characterised in that the filter chain I includes with filter chain Q：The first low pass filter group for being sequentially connected, the first extracting unit, the second low pass filter group, Two extracting units, the 3rd low pass filter group and the 3rd extracting unit, wherein, first extracting unit, the second extracting unit It is 10 times of extractions, the 3rd extracting unit is 4 times of extractions.
- 4. the data acquisition device according to claim 1 with a variety of link modes, it is characterised in that second solution Unit is adjusted to include two branch roads of I, Q, two kinds of demodulating datas of corresponding output, wherein, second demodulating unit includes：Three-mixer, its input connect the input of the first data selector and the second quadrature demodulator respectively, for pair The signal and the second quadrature demodulator output end I roads cosine wave signal of the first data selector output carry out Frequency mixing processing；Second quadrature demodulator, its input connecting interface controller, its output end connect three-mixer and the 4th and mixed respectively Frequency device, for exported according to the interface controller control logic signal generation I roads, corresponding to Q roads just, cosine signal；4th frequency mixer, its input connect the input of the first data selector and the second quadrature demodulator respectively, for pair The signal of first data selector output and the second quadrature demodulator output end Q roads sine wave signal carry out Frequency mixing processing；Filtering group I, it is connected to form I branch roads with the three-mixer, for being carried out to the signal exported through three-mixer Filtering extraction processing；Filtering group Q, it is connected to form Q branch roads with the 4th frequency mixer, for being carried out to the signal exported through the 4th frequency mixer Filtering extraction processing.
- 5. the data acquisition device according to claim 4 with a variety of link modes, it is characterised in that the filtering group I includes with filtering group Q：The 4th low pass filter group being sequentially connected and the 4th extracting unit, wherein, the described 4th extracts list Member is 20 times of extractions.
- 6. the data acquisition device according to claim 1 with a variety of link modes, it is characterised in that the interface control Device processed includes：Peripheral bus, for receiving the instruction sent from peripheral bus, it is additionally operable to receive from the peripheral bus Access；Master control logic module, it is connected with the peripheral bus, for disassembly instruction to control each data selector, interruption Logic module and FIFO control logic module；The interrupt logic, its input is connected with the second data selector, the 4th data selector, for according to master control The input link of the control logic instruction selection connection of logic module, and when receiving the demodulating data of the input link transmission Interrupt logic signal is produced to send to peripheral bus；The FIFO control logic module, it is connected with fifo module, peripheral bus respectively, for the data of reading to be passed It is defeated to arrive peripheral bus；The fifo module, its input and output end are connected with FIFO control logic module, the number of its input connection the 4th According to the output end of selector, for caching the demodulating data of the 4th data selector output.
- A kind of 7. collection of data acquisition device with a variety of link modes using described in claim 1 to 6 any one Method, it is characterised in that including：The analog signal of input is converted to data signal output by analog-digital converter；Instruction of the interface controller parsing from peripheral interface obtains control logic signal, with to each data selector, demodulation Unit carries out logic control, controls the data signal to be output to peripheral data interface and forms three kinds of transmission link patterns；When control logic signal causes the data signal successively through the first data selector, the first demodulating unit, the second data When between selector, interface controller and peripheral data interface, the demodulation link of HZ level frequencies is formed；When control logic signal causes the data signal successively through the first data selector, the second demodulating unit, the second data When between selector, the 4th data selector, interface controller and peripheral data interface, the demodulation link of KHZ level frequencies is formed；When control logic signal cause the data signal the 4th data selector, interface controller and peripheral data interface it Between when, formed common transmission link.
- 8. the acquisition method of the data acquisition device according to claim 7 with a variety of link modes, it is characterised in that It is described when control logic signal causes the data signal successively through the first data selector, the first demodulating unit, the second data When between selector, interface controller and peripheral data interface, formed HZ level frequencies demodulation link the step of, including：The signal caused 125HZ cosine and sine signals orthogonal with the first demodulating unit that first data selector is exported carry out orthogonal Mixing, output carry out LPF with extracting the orthogonal signalling of processing generation two-way HZ levels successively respectively；Wherein the orthogonal signalling of HZ levels are demodulating data to the connection of control logic signal behavior all the way according to caused by interface controller, Interrupt logic signal is generated when the interface controller receives the demodulating data and is transferred to peripheral bus, until CPU Untill response.
- 9. the acquisition method of the data acquisition device according to claim 7 with a variety of link modes, it is characterised in that It is described when control logic signal causes the data signal successively through the first data selector, the second demodulating unit, the second data When between selector, the 4th data selector, interface controller and peripheral data interface, the demodulation link of KHZ level frequencies is formed The step of, including：The signal caused 5KHZ cosine and sine signals orthogonal with the second demodulating unit that first data selector is exported carry out orthogonal Mixing, output carry out LPF with extracting the orthogonal signalling of processing generation two-way KHZ levels successively respectively；Wherein the orthogonal signalling of KHZ levels are demodulating data all the way for control signal selection connection according to caused by interface controller, when The interface controller is written and read when receiving the demodulating data to be operated and is stored；When volume space half is arrived in the monitoring demodulating data storage, generation interrupt logic signal, which is sent to peripheral bus, to be connect Mouthful, waiting for CPU response；When CPU is responded, when interface controller parses its instruction to read demodulating data order, number will be demodulated by producing reading control sequential According to being transferred to peripheral bus.
- 10. the acquisition method of the data acquisition device according to claim 7 with a variety of link modes, its feature exist In described when control logic signal causes the data signal to be connect in the 4th data selector, interface controller and peripheral data Mouthful between when, formed common transmission link the step of, including：Data signal is transmitted directly to periphery by the data signal according to the control of interface controller through the 4th data selector EBI.
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