CN107342736A - A kind of pierce circuit - Google Patents
A kind of pierce circuit Download PDFInfo
- Publication number
- CN107342736A CN107342736A CN201710557790.7A CN201710557790A CN107342736A CN 107342736 A CN107342736 A CN 107342736A CN 201710557790 A CN201710557790 A CN 201710557790A CN 107342736 A CN107342736 A CN 107342736A
- Authority
- CN
- China
- Prior art keywords
- phase inverter
- pmos transistor
- output
- input
- connects
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03B—GENERATION OF OSCILLATIONS, DIRECTLY OR BY FREQUENCY-CHANGING, BY CIRCUITS EMPLOYING ACTIVE ELEMENTS WHICH OPERATE IN A NON-SWITCHING MANNER; GENERATION OF NOISE BY SUCH CIRCUITS
- H03B5/00—Generation of oscillations using amplifier with regenerative feedback from output to input
- H03B5/02—Details
- H03B5/04—Modifications of generator to compensate for variations in physical values, e.g. power supply, load, temperature
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03B—GENERATION OF OSCILLATIONS, DIRECTLY OR BY FREQUENCY-CHANGING, BY CIRCUITS EMPLOYING ACTIVE ELEMENTS WHICH OPERATE IN A NON-SWITCHING MANNER; GENERATION OF NOISE BY SUCH CIRCUITS
- H03B5/00—Generation of oscillations using amplifier with regenerative feedback from output to input
- H03B5/08—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising lumped inductance and capacitance
- H03B5/12—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising lumped inductance and capacitance active element in amplifier being semiconductor device
- H03B5/1206—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising lumped inductance and capacitance active element in amplifier being semiconductor device using multiple transistors for amplification
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03B—GENERATION OF OSCILLATIONS, DIRECTLY OR BY FREQUENCY-CHANGING, BY CIRCUITS EMPLOYING ACTIVE ELEMENTS WHICH OPERATE IN A NON-SWITCHING MANNER; GENERATION OF NOISE BY SUCH CIRCUITS
- H03B5/00—Generation of oscillations using amplifier with regenerative feedback from output to input
- H03B5/08—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising lumped inductance and capacitance
- H03B5/12—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising lumped inductance and capacitance active element in amplifier being semiconductor device
- H03B5/1228—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising lumped inductance and capacitance active element in amplifier being semiconductor device the amplifier comprising one or more field effect transistors
Landscapes
- Inductance-Capacitance Distribution Constants And Capacitance-Resistance Oscillators (AREA)
Abstract
A kind of pierce circuit, belong to semiconductor integrated circuit technical field.The circuit includes：One termination power of current source, input, one end of electric capacity and the drain electrode of the first transistor of the first phase inverter of another termination；The other end ground connection of electric capacity；The output of first phase inverter connects input and the grid of the first PMOS transistor of the second phase inverter；The output of second phase inverter connects the input of the 3rd phase inverter and the drain electrode of the second PMOS transistor；Output of the output of 3rd phase inverter as oscillator, and connect input and the grid of the second PMOS transistor of the 4th phase inverter；The output of 4th phase inverter connects the grid of the first nmos pass transistor；The source electrode of first PMOS transistor connects power supply, and drain electrode connects the source electrode of the second PMOS transistor；The source ground of first nmos pass transistor.The oscillator structure of the present invention introduces current source and latch cicuit, and this greatly improves the anti-electromagnetic interference capability of oscillator, enhances frequency stability.
Description
Technical field
The invention belongs to semiconductor integrated circuit technical field, and in particular to a kind of pierce circuit.
Background technology
Oscillator is a kind of energy conversion device, and its main function is that direct current energy is converted into certain frequency
AC energy.
Traditional pierce circuit as shown in figure 1, including：It is first phase inverter INV1, the second phase inverter INV2, the 3rd anti-phase
Device INV3 and electric capacity C1；First phase inverter INV1 input meets the output end U of oscillatorOUT；Second phase inverter INV2 input connects
First phase inverter INV1 output；3rd phase inverter INV3 input connects the second phase inverter INV2 output, and output meets electric capacity C1
One end and oscillator output UOUT；Electric capacity C1 other end ground connection.
Traditional pierce circuit frequency realizes that frequency when by external electromagnetic interference is steady by simple multistage loop
Fixed degree is poor.
The content of the invention
To solve the technical problem of frequency stability difference of existing oscillator when by external electromagnetic interference, the present invention carries
A kind of good pierce circuit of stability is supplied.
A kind of pierce circuit, including current source I, electric capacity C1, the first phase inverter INV1, the second phase inverter INV2, the 3rd
Phase inverter INV3, the 4th phase inverter INV4, the first PMOS transistor P1, the second PMOS transistor P2 and the first nmos pass transistor
N1；A current source I termination power, another termination the first phase inverter INV1 input, electric capacity C1 one end and the first NMOS are brilliant
Body pipe N1 drain electrode；Electric capacity C1 other end ground connection；First phase inverter INV1 output connect the second phase inverter INV2 input and
First PMOS transistor P1 grid；Second phase inverter INV2 output connects the 3rd phase inverter INV3 input and the 2nd PMOS crystalline substances
Body pipe P2 drain electrode；3rd phase inverter INV3 output of the output as oscillator, and connect the 4th phase inverter INV4 input with
Second PMOS transistor P2 grid；4th phase inverter INV4 output connects the first nmos pass transistor N1 grid；First PMOS
Transistor P1 source electrode connects power supply, and drain electrode connects the second PMOS transistor P2 source electrode；First nmos pass transistor N1 source ground.
The oscillator structure of the present invention introduces current source and latch cicuit, and this anti-electromagnetism for greatly improving oscillator is done
Ability is disturbed, enhances frequency stability.
Brief description of the drawings
Fig. 1 is the electrical block diagram of traditional oscillators；
Fig. 2 is the electrical block diagram for the oscillator that embodiment of the present invention provides.
Embodiment
To make the object, technical solutions and advantages of the present invention of greater clarity, with reference to embodiment and join
According to accompanying drawing, the present invention is described in more detail.It should be understood that these descriptions are merely illustrative, and it is not intended to limit this hair
Bright scope.In addition, in the following description, the description to known features and technology is eliminated, to avoid unnecessarily obscuring this
The concept of invention.
To solve the technical problem of frequency stability difference of existing oscillator when by external electromagnetic interference, the present invention carries
A kind of good pierce circuit of stability is supplied.As shown in Fig. 2 a kind of pierce circuit, including current source I, electric capacity C1, first
Phase inverter INV1, the second phase inverter INV2, the 3rd phase inverter INV3, the 4th phase inverter INV4, the first PMOS transistor P1, second
PMOS transistor P2 and the first nmos pass transistor N1；A current source I termination power, the first phase inverter INV1's of another termination is defeated
Enter, electric capacity C1 one end and the first nmos pass transistor N1 drain electrode；Electric capacity C1 other end ground connection；First phase inverter INV1's is defeated
Go out to connect the second phase inverter INV2 input and the first PMOS transistor P1 grid；It is anti-that second phase inverter INV2 output connects the 3rd
Phase device INV3 input and the second PMOS transistor P2 drain electrode；Output of the 3rd phase inverter INV3 output as oscillator,
And connect the 4th phase inverter INV4 input and the second PMOS transistor P2 grid；4th phase inverter INV4 output connects first
Nmos pass transistor N1 grid；First PMOS transistor P1 source electrode connects power supply, and drain electrode connects the second PMOS transistor P2 source electrode；
First nmos pass transistor N1 source ground.
In the pierce circuit of the present invention, the second phase inverter INV2, the second PMOS transistor P2, the first PMOS transistor P1
One-level latch cicuit is formed, the 3rd phase inverter INV3, the second PMOS transistor P2 form two level latch cicuit, vibration of the invention
Device structure introduces current source and two-stage latch cicuit, and this greatly improves the anti-electromagnetic interference capability of oscillator, enhances frequency
Rate stability.
It should be appreciated that the above-mentioned embodiment of the present invention is used only for exemplary illustration or explains the present invention's
Principle, without being construed as limiting the invention.Therefore, that is done without departing from the spirit and scope of the present invention is any
Modification, equivalent substitution, improvement etc., should be included in the scope of the protection.In addition, appended claims purport of the present invention
Covering the whole changes fallen into scope and border or this scope and the equivalents on border and repairing
Change example.
Claims (1)
- A kind of 1. pierce circuit, it is characterised in that including：Current source I, electric capacity C1, the first phase inverter INV1, the second phase inverter INV2, the 3rd phase inverter INV3, the 4th phase inverter INV4, the first PMOS transistor P1, the second PMOS transistor P2 and first Nmos pass transistor N1；A current source I termination power, another termination the first phase inverter INV1 input, electric capacity C1 one end and First nmos pass transistor N1 drain electrode；Electric capacity C1 other end ground connection；First phase inverter INV1 output connects the second phase inverter INV2 input and the first PMOS transistor P1 grid；Second phase inverter INV2 output connects the 3rd phase inverter INV3 input With the second PMOS transistor P2 drain electrode；Output of the 3rd phase inverter INV3 output as oscillator, and connect the 4th phase inverter INV4 input and the second PMOS transistor P2 grid；4th phase inverter INV4 output connects the first nmos pass transistor N1 grid Pole；First PMOS transistor P1 source electrode connects power supply, and drain electrode connects the second PMOS transistor P2 source electrode；First nmos pass transistor N1 Source ground.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710557790.7A CN107342736A (en) | 2017-07-10 | 2017-07-10 | A kind of pierce circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710557790.7A CN107342736A (en) | 2017-07-10 | 2017-07-10 | A kind of pierce circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN107342736A true CN107342736A (en) | 2017-11-10 |
Family
ID=60218706
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201710557790.7A Pending CN107342736A (en) | 2017-07-10 | 2017-07-10 | A kind of pierce circuit |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN107342736A (en) |
Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0176214A1 (en) * | 1984-08-23 | 1986-04-02 | Fujitsu Limited | Oscillator circuit using inverter loop with delay element |
| CN1622219A (en) * | 2003-11-25 | 2005-06-01 | 海力士半导体有限公司 | Self refresh oscillator |
| CN1622461A (en) * | 2003-11-27 | 2005-06-01 | 因芬尼昂技术股份公司 | Circuit and method for switching an electrical load on after a delay |
| JP2009021912A (en) * | 2007-07-13 | 2009-01-29 | New Japan Radio Co Ltd | Cr oscillation circuit |
| CN202261165U (en) * | 2011-09-21 | 2012-05-30 | 电子科技大学 | Annular voltage-controlled oscillator |
| CN103490726A (en) * | 2013-09-25 | 2014-01-01 | 无锡中星微电子有限公司 | Low-voltage oscillator |
-
2017
- 2017-07-10 CN CN201710557790.7A patent/CN107342736A/en active Pending
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0176214A1 (en) * | 1984-08-23 | 1986-04-02 | Fujitsu Limited | Oscillator circuit using inverter loop with delay element |
| CN1622219A (en) * | 2003-11-25 | 2005-06-01 | 海力士半导体有限公司 | Self refresh oscillator |
| CN1622461A (en) * | 2003-11-27 | 2005-06-01 | 因芬尼昂技术股份公司 | Circuit and method for switching an electrical load on after a delay |
| JP2009021912A (en) * | 2007-07-13 | 2009-01-29 | New Japan Radio Co Ltd | Cr oscillation circuit |
| CN202261165U (en) * | 2011-09-21 | 2012-05-30 | 电子科技大学 | Annular voltage-controlled oscillator |
| CN103490726A (en) * | 2013-09-25 | 2014-01-01 | 无锡中星微电子有限公司 | Low-voltage oscillator |
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| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| RJ01 | Rejection of invention patent application after publication | ||
| RJ01 | Rejection of invention patent application after publication |
Application publication date: 20171110 |