CN107315440A - A kind of high-speed broadband band frequency-voltage conversion circuit - Google Patents
A kind of high-speed broadband band frequency-voltage conversion circuit Download PDFInfo
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- CN107315440A CN107315440A CN201710758434.1A CN201710758434A CN107315440A CN 107315440 A CN107315440 A CN 107315440A CN 201710758434 A CN201710758434 A CN 201710758434A CN 107315440 A CN107315440 A CN 107315440A
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- phase inverter
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
- G05F1/10—Regulating voltage or current
- G05F1/46—Regulating voltage or current wherein the variable actually regulated by the final control device is dc
- G05F1/56—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices
- G05F1/561—Voltage to current converters
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- Radar, Positioning & Navigation (AREA)
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Abstract
The present invention discloses a kind of high-speed broadband band frequency-voltage conversion circuit, rising edge twice is carried out using detection input signal to detect, control the conversion of two on off states, during so that two switches being turned on jointly, bias current sources be capacitor charging time be only input signal a cycle, so as to realize rapid translating of the circuit by frequency signal to voltage signal, output setup time is reduced, the operating efficiency and response speed of integrated circuit system is improved.In addition, the present invention is while circuit structure is simplified, improve processing speed of the circuit to input signal, power consumption is reduced, resistance is not used, using only an electric capacity, outside it need not apply control signal, efficiently reducing parasitic capacitance effect, the thermal noise as caused by temperature change influences and reduces chip area, completely compatible with standard CMOS process, reduces production cost.Circuit only needs an input signal cycle, it is possible to complete the conversion from frequency to voltage, reduces output setup time, improves the operating efficiency and response speed of integrated circuit system.
Description
Technical field
The present invention relates to technical field of integrated circuits, and in particular to a kind of high-speed broadband band frequency-voltage conversion circuit.
Background technology
With the fast development of wireless communication system, radio frequency is largely occupied so that the intelligent restructural system of research and development
System and wave frequency detection circuit turn into active demand.For front end system, frequency detection circuit is a key modules, it
Radio frequency must be carried out in complicated, rugged environment quickly to recognize, and distribute unappropriated frequency band for equipment.Frequency
Detection circuit is usually used in frequency locked loop, self-tuning restructural receiver etc., in this kind of circuit, and output setup time is necessary
It is very short, so as to suitable for high speed communication equipment.
The most methods integrated based on charge pump of traditional frequency-voltage conversion circuit, are controlled using multiple switch, one
An electric capacity is charged in the individual cycle, the electric capacity discharges and is the charging of another electric capacity in next cycle.However, this side
Method and circuit structure were needed by multiple cycles, output voltage is reached stationary value, and output setup time is long, limits frequency
The service behaviour of the subsequent conditioning circuit module such as rate locked loop, and controlling switch parasitic capacitance is larger, and detection frequency band range is narrow, electricity
Road power consumption is high, and the degree of accuracy is not high with sensitivity, takes excessive chip area, is easily disturbed by temperature, noise and extraneous factor,
Reduce the performance indications of integrated circuit system.
The content of the invention
To be solved by this invention is that there is provided a kind of high-speed broadband for the problems of traditional frequency-voltage conversion circuit
Band frequency-voltage conversion circuit.
To solve the above problems, the present invention is achieved by the following technical solutions：
A kind of high-speed broadband band frequency-voltage conversion circuit, including phase inverter I2~I11, NAND gate I12, PMOS PM1~
PM9, NMOS tube NM1~NM10, and electric capacity C；Phase inverter I2Input form the input port of this frequency-voltage conversion circuit
Vin；Phase inverter I2Output end connection phase inverter I3Input, phase inverter I3Output end connect NMOS tube NM simultaneously4Grid
Pole, NMOS tube NM1Drain electrode, PMOS PM1Drain electrode, NAND gate I12An input and phase inverter I8Input；NMOS
Pipe NM4Drain electrode connection phase inverter I5Input, PMOS PM4Drain electrode, PMOS PM5Drain electrode, PMOS PM8Grid
With phase inverter I6Input；Phase inverter I8Output termination PMOS PM4Grid；PMOS PM8Source electrode and PMOS PM7
Drain electrode be connected；PMOS PM7Grid meet bias voltage Vb；Phase inverter I6Output end meet phase inverter I7Input, it is anti-phase
Device I7Output termination NMOS tube NM6Grid；NMOS tube NM1Source electrode, PMOS PM1Source electrode, PMOS PM2Drain electrode and
PMOS PM3Grid be connected；PMOS PM3Drain electrode, NMOS tube NM2Drain electrode, NMOS tube NM3Drain electrode, NMOS tube NM5's
Grid and phase inverter I4Input be connected；Phase inverter I4Output termination NMOS tube NM2Grid；NMOS tube NM5Drain electrode connect
NMOS tube NM4Source electrode；Phase inverter I8The inverted device I of output end and phase inverter I10Input connection, phase inverter I10It is defeated
Go out to terminate NAND gate I12Another input；NAND gate I12Output termination PMOS PM6Grid；PMOS PM6Leakage
Pole, NMOS tube NM7Drain electrode, NMOS tube NM8Drain electrode, NMOS tube NM6Drain electrode, PMOS PM9Grid and phase inverter I11's
Input is connected；Phase inverter I11Output termination NMOS tube NM7Grid；PMOS PM9Source electrode, NMOS tube NM9Drain electrode and
PMOS PM8Drain electrode be connected；NMOS tube NM10Drain electrode, PMOS PM9Drain electrode be connected with electric capacity C one end after, formed
The output port V of this frequency-voltage conversion circuitout；NMOS tube NM1, PMOS PM2With PMOS PM5Grid simultaneously connect reset
Signal RST；PMOS PM1, NMOS tube NM3, NMOS tube NM8~NMOS tube NM10Grid simultaneously meet reset signal~RST；It is above-mentioned
Reset signal RST and reset signal~RST reverse signal each other；PMOS PM2~PMOS PM7Source electrode meet power vd D；Electricity
Hold the C other end, NMOS tube NM2, NMOS tube NM3And NMOS tube NM5~NMOS tube NM10Source electrode with ground GND be connected.
Above-mentioned high-speed broadband band frequency-voltage conversion circuit, further comprises phase inverter I1, phase inverter I1One end connection
Reset signal RST, phase inverter I1The other end connection reset signal~RST.
Compared with prior art, feature specific as follows of the invention：
1st, first rising edge of input signal controls a switch to be converted to conducting by shut-off, with second rising edge control
Make another switch and shut-off is converted to by conducting, frequency-voltage conversion circuit only needs an input signal cycle, it is possible to complete
Into the conversion from frequency to voltage, output signal setup time is reduced, the operating efficiency and response speed of integrated circuit system is improved
Degree；
2nd, the conversion from frequency to voltage is completed, it is not necessary to apply external control signal, effectively reduce controlling switch
Produced parasitic capacitance, increases frequency detection range, improves sensitivity；
3rd, capacitor charging time is only a cycle of input signal, significantly reduces the power consumption of integrated circuit.
Brief description of the drawings
Fig. 1 is a kind of circuit theory diagrams of high-speed broadband with frequency-voltage conversion circuit.
Fig. 2 is input/output relation figure of the invention.
Embodiment
For the object, technical solutions and advantages of the present invention are more clearly understood, below in conjunction with instantiation, and with reference to attached
Figure, the present invention is described in more detail.
A kind of high-speed broadband band frequency-voltage conversion circuit, as shown in figure 1, main by phase inverter I1~I11, it is and non-
Door I12, PMOS PM1~PM9, NMOS tube NM1~NM10, and electric capacity C compositions.Phase inverter I1Input termination circuit input end
Mouth RST, phase inverter I1Output end wiring~RST, phase inverter I2、I3Cascade, I2Input termination circuit input port Vin,
I3Output end and PM1、NM1Drain electrode be connected, PM1Grid connection RST, NM1Grid meet RST, PM1、NM1Source electrode be connected
Afterwards with PM2Drain electrode be connected, PM2Source electrode meet power vd D, PM2Grid meet RST, PM3Source electrode meet power vd D, PM3Grid
Pole and PM2Drain electrode be connected, PM3Drain electrode meet phase inverter I4Input, phase inverter I4Output end and NM2Grid be connected,
NM2Drain electrode and PM3Drain electrode be connected, NM2Source electrode with ground GND be connected.NM3Drain electrode and PM3Drain electrode be connected, NM3Grid
Pole is connected with line~RST, NM3Source electrode with ground GND be connected.PM4Source electrode be connected with power vd D, PM4Grid and phase inverter
I5Output end be connected, PM4Drain electrode and phase inverter I5Input be connected, NM4Drain electrode and PM4Drain electrode be connected, NM4Grid
Pole and phase inverter I3Output end be connected, NM4Source electrode and NM5Drain electrode be connected, NM5Grid and PM3Drain electrode be connected, NM5
Source electrode with ground GND be connected.PM5Source electrode be connected with power vd D, PM5Grid be connected with RST, PM5Drain electrode and PM4Leakage
Extremely it is connected, phase inverter I6Input and PM5Drain electrode be connected, phase inverter I6With phase inverter I7Cascade, phase inverter I7Output end
With NM6Grid be connected, NM6Source electrode with ground GND be connected, NM6Drain electrode and PM6Drain electrode be connected.PM7Source electrode and power supply
VDD is connected, PM7Grid and VbIt is connected, PM7Drain electrode and PM8Source electrode be connected.PM8Grid and PM5Drain electrode be connected, PM8
Drain electrode and NM9Drain electrode be connected, NM9Grid be connected with line~RST, NM9Source electrode with ground GND be connected.Phase inverter I8、I9、
I10Mutually cascade, phase inverter I8Input and phase inverter I3Output end be connected, phase inverter I10Output end with NAND gate I12's
One input is connected, NAND gate I12Another input and phase inverter I3Output end be connected, NAND gate I12Output end
With PM6Grid be connected, PM6Source electrode be connected with power vd D, PM6Drain electrode and phase inverter I11Input be connected, phase inverter
I11Output end and NM7Grid be connected, NM7Drain electrode and PM6Drain electrode be connected, NM7Source electrode with ground GND be connected, NM8's
Drain electrode and PM6Drain electrode be connected, NM8Grid be connected with line~RST, NM8Source electrode with ground GND be connected.PM9Source electrode and NM9
Drain electrode be connected, PM9Grid and PM6Drain electrode be connected, PM9Drain electrode and NM10Drain electrode be connected, NM10Grid with to~
RST is connected, NM10Source electrode with ground GND be connected.Electric capacity C one end and PM9Drain electrode be connected and be followed by the output end V of circuitout, electricity
The other end for holding C is connected with ground GND.
The present invention operation principle be：
Phase inverter I2、I3Input signal is amplified, shaping, PM1、NM1Constitute a switch controlled by RST signal, PM2
When RST is low, by PM3Grid voltage is drawn high, PM3For trailing edge detection, work as PM3It is anti-phase after detecting first trailing edge
Device I4With NM2By PM3Drain electrode be locked as low level, it is ensured that NM5Conducting, when~RST is high level, NM3For by NM5Grid
Pole tension is dragged down.Work as NM5After conducting, NM4Rising edge for detecting input signal, works as NM4Detect the rising of input signal
Edge, phase inverter I5With PM4By NM4Drain voltage be locked as high level, NM4Drain electrode be high level when, PM8Become by off state
For conducting state, PM5During for ensuring reset signal RST for low level, PM8Grid be high level, it is ensured that PM8It is off
State.Phase inverter I8、I9、I10For input signal to be postponed into a period of time, the signal after delay passes through with undelayed signal
NAND gate I12Burst pulse, PM are formed afterwards6Trailing edge for detecting the pulse, after detecting trailing edge, phase inverter I11With
NM7By PM6Drain voltage be locked as low level, PM6Drain electrode be high level when, PM9Shut-off shape is converted to by conducting state
State, NM8For ensuring~RST is when being high level, PM9Grid be low level, it is ensured that PM9It is in the conduction state.Phase inverter I6、I7
And NM6Ensure PM7PM after conducting9Off state can just be switched to.When~RST is high level, NM10Conducting, by electric capacity C
The electric charge release of storage.
Integrated circuit, after reset signal is invalid, first detects first trailing edge of input signal, hereafter detects again defeated
Enter the rising edge twice of signal, first rising edge makes PM8Conducting state is converted to by off state, second rising edge makes PM9
Off state is converted to by conducting state, therefore, electric capacity C only by bias current sources charge an input signal cycle, it is latter
The straight electric charge for keeping storing, until reset signal is effective again, the electric charge stored on electric capacity C is discharged.
Because electric capacity C is only electrically charged an input signal cycle, output signal only delays input signal a cycle,
The circuit can make quick response to input signal, reach the effect of high-speed transitions.
After frequency-voltage conversion circuit, final output voltage is：
Wherein, finFor the frequency of input signal,For PMOS PM7The electric current of generation.
The present invention carries out rising edge twice using detection input signal and detected, controls the conversion of two on off states so that
When two switches are turned on jointly, bias current sources are that capacitor charging time is only a cycle of input signal, so as to realize electricity
Frequency signal is route to the rapid translating of voltage signal, output setup time is reduced, improves the operating efficiency of integrated circuit system
And response speed.In addition, the present invention improves processing speed of the circuit to input signal while circuit structure is simplified, drop
Low power consumption, is not used resistance, using only an electric capacity, it is not necessary to which outside applies control signal, efficiently reduces parasitic electricity
Holding effect, the thermal noise as caused by temperature change influences and reduces chip area, completely compatible with standard CMOS process, reduces
Production cost.Circuit only needs an input signal cycle, it is possible to complete the conversion from frequency to voltage, reduces output and sets up
Time, improve the operating efficiency and response speed of integrated circuit system.Fig. 2 is input/output relation figure of the invention.In 0.18-
Under umCMOS technological standards, Cadence Spectre emulation shows, can detect frequency range 0.3G~4G, output voltage range
Total power consumption is 1.410mW under 175mV~1.735V, 1.8V condition of power supply, and circuit delay can be at least 260.732pS.The present invention
It can overcome that the output setup time of traditional frequency-voltage conversion circuit is long, reaction speed is slower, detection frequency band range is narrow, spirit
Sensitivity is relatively low, easy affected by noise, chip area and the problems such as excessive power consumption,
The present invention carries out rising edge twice for input signal and detected, after first rising edge is detected, control one
Individual switch switchs to conducting state by off state, after second rising edge is detected, and controls another switch by conducting shape
State switchs to off state, when two switches are turned on jointly, and bias current sources are that electric capacity charges, and two such switch is turned on jointly
Time is only a cycle of input signal, and electric capacity is electrically charged a cycle for being also only input signal, just can realize circuit
By the rapid translating of frequency signal to voltage signal, and reach low latency, the effect of quick response.In addition, the present invention also simplifies
Circuit structure, reduces power consumption, and resistance is not used, using only an electric capacity, parasitic capacitance effect is efficiently reduced, by temperature
Thermal noise caused by degree change influences and reduces chip area, and the CMOS technology with standard is compatible completely, reduces production cost.
It should be noted that although embodiment of the present invention is illustrative above, this is not to the present invention
Limitation, therefore the invention is not limited in above-mentioned embodiment.Without departing from the principles of the present invention, it is every
The other embodiment that those skilled in the art obtain under the enlightenment of the present invention, is accordingly to be regarded as within the protection of the present invention.
Claims (2)
1. a kind of high-speed broadband band frequency-voltage conversion circuit, it is characterised in that：Including phase inverter I2~I11, NAND gate I12,
PMOS PM1~PM9, NMOS tube NM1~NM10, and electric capacity C；
Phase inverter I2Input form the input port V of this frequency-voltage conversion circuitin；Phase inverter I2Output end connection it is anti-
Phase device I3Input, phase inverter I3Output end connect NMOS tube NM simultaneously4Grid, NMOS tube NM1Drain electrode, PMOS
PM1Drain electrode, NAND gate I12An input and phase inverter I8Input；NMOS tube NM4Drain electrode connection phase inverter I5's
Input, PMOS PM4Drain electrode, PMOS PM5Drain electrode, PMOS PM8Grid and phase inverter I6Input；It is anti-phase
Device I8Output termination PMOS PM4Grid；PMOS PM8Source electrode and PMOS PM7Drain electrode be connected；PMOS PM7's
Grid meets bias voltage Vb；Phase inverter I6Output end meet phase inverter I7Input, phase inverter I7Output termination NMOS tube NM6
Grid；NMOS tube NM1Source electrode, PMOS PM1Source electrode, PMOS PM2Drain electrode and PMOS PM3Grid be connected；
PMOS PM3Drain electrode, NMOS tube NM2Drain electrode, NMOS tube NM3Drain electrode, NMOS tube NM5Grid and phase inverter I4Input
End is connected；Phase inverter I4Output termination NMOS tube NM2Grid；NMOS tube NM5Drain electrode meet NMOS tube NM4Source electrode；It is anti-phase
Device I8The inverted device I of output end9With phase inverter I10Input connection, phase inverter I10Output termination NAND gate I12It is another
Individual input；NAND gate I12Output termination PMOS PM6Grid；PMOS PM6Drain electrode, NMOS tube NM7Drain electrode,
NMOS tube NM8Drain electrode, NMOS tube NM6Drain electrode, PMOS PM9Grid and phase inverter I11Input be connected；Phase inverter
I11Output termination NMOS tube NM7Grid；PMOS PM9Source electrode, NMOS tube NM9Drain electrode and PMOS PM8Drain electrode phase
Even；NMOS tube NM10Drain electrode, PMOS PM9Drain electrode be connected with electric capacity C one end after, formed this voltage to frequency conversion electricity
The output port V on roadout；NMOS tube NM1, PMOS PM2With PMOS PM5Grid simultaneously meet reset signal RST；PMOS
PM1, NMOS tube NM3, NMOS tube NM8~NMOS tube NM10Grid simultaneously meet reset signal~RST；Above-mentioned reset signal RST with
Reset signal~RST reverse signals each other；PMOS PM2~PMOS PM7Source electrode meet power vd D；The electric capacity C other end,
NMOS tube NM2, NMOS tube NM3And NMOS tube NM5~NMOS tube NM10Source electrode with ground GND be connected.
2. a kind of high-speed broadband band frequency-voltage conversion circuit according to claim 1, it is characterised in that：Also further wrap
Include phase inverter I1, phase inverter I1One end connection reset signal RST, phase inverter I1The other end connection reset signal~RST.
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| CN201710758434.1A CN107315440B (en) | 2017-08-29 | 2017-08-29 | A kind of high-speed broadband band frequency-voltage conversion circuit |
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| CN201710758434.1A CN107315440B (en) | 2017-08-29 | 2017-08-29 | A kind of high-speed broadband band frequency-voltage conversion circuit |
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| CN107315440B CN107315440B (en) | 2018-09-25 |
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108259093A (en) * | 2018-01-19 | 2018-07-06 | 桂林电子科技大学 | A kind of high-rate ultra-wideband half period frequency detection circuit applied to frequency hopping communications |
| CN110034753A (en) * | 2019-04-22 | 2019-07-19 | 西安拓尔微电子有限责任公司 | A kind of the high-side high-speed driving circuit and its driving method of p-type VDMOS |
| CN113162620A (en) * | 2021-01-30 | 2021-07-23 | 杭州微伽量子科技有限公司 | High-speed stable broadband frequency-voltage conversion method, system and storage medium |
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| CN108259093A (en) * | 2018-01-19 | 2018-07-06 | 桂林电子科技大学 | A kind of high-rate ultra-wideband half period frequency detection circuit applied to frequency hopping communications |
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| CN110034753A (en) * | 2019-04-22 | 2019-07-19 | 西安拓尔微电子有限责任公司 | A kind of the high-side high-speed driving circuit and its driving method of p-type VDMOS |
| CN113162620A (en) * | 2021-01-30 | 2021-07-23 | 杭州微伽量子科技有限公司 | High-speed stable broadband frequency-voltage conversion method, system and storage medium |
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| CN107315440B (en) | 2018-09-25 |
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