CN107257245B - Anti-interference transmitting and receiving unit, transmitting and receiving device and anti-interference attenuation processing method - Google Patents
Anti-interference transmitting and receiving unit, transmitting and receiving device and anti-interference attenuation processing method Download PDFInfo
- Publication number
- CN107257245B CN107257245B CN201710453007.2A CN201710453007A CN107257245B CN 107257245 B CN107257245 B CN 107257245B CN 201710453007 A CN201710453007 A CN 201710453007A CN 107257245 B CN107257245 B CN 107257245B
- Authority
- CN
- China
- Prior art keywords
- control circuit
- signal
- capacitor
- attenuation
- input signal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Images
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
- H04B1/06—Receivers
- H04B1/10—Means associated with receiver for limiting or suppressing noise or interference
- H04B1/109—Means associated with receiver for limiting or suppressing noise or interference by improving strong signal performance of the receiver when strong unwanted signals are present at the receiver input
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
- H04B1/06—Receivers
- H04B1/16—Circuits
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Transceivers (AREA)
Abstract
The invention relates to an anti-interference transceiving unit, a transceiving device and an anti-interference attenuation processing method, wherein the anti-interference transceiving unit comprises a transceiving module for receiving an input signal, a signal processing module, a main control circuit and an attenuation control circuit connected between the transceiving module and the main control circuit; the signal processing module is connected between the transceiving module and the main control circuit; the signal processing module processes the input signal to output a baseband signal to the main control circuit, the main control circuit judges whether the input signal needs to be attenuated, if so, the main control circuit outputs a corresponding control signal to the attenuation control circuit according to the signal intensity value of the input signal, and the attenuation control circuit outputs a corresponding attenuation control voltage according to the control signal to control the transceiver module to attenuate the input signal. The invention utilizes the PIN tube of the transceiver module to increase the adjustable attenuation function, thereby not only improving the anti-blocking capability, but also optimizing the receiving sensitivity and improving the competitiveness of the product in the market.
Description
Technical Field
The present invention relates to the field of communications technologies, and in particular, to an anti-interference transceiver unit, a transceiver device, and an anti-interference attenuation method.
Background
For a receiver, blocking means that after a strong interference signal enters a receiving input terminal, a receiving circuit generates nonlinear distortion to reduce receiving performance. In a time division duplex transceiving system, when a strong blocking interference signal exists, a radio frequency front end receiving link generates serious nonlinear distortion, gain reduction and obvious noise coefficient increase, so that a receiving signal-to-noise ratio is reduced, the communication quality of the system is deteriorated, even communication interruption is caused, and the normal use of a user is seriously influenced.
For reducing the influence of the blocking interference on the radio frequency front end circuit of the receiver, the existing scheme is to add an AGC circuit in the radio frequency front end circuit, wherein the AGC circuit consists of an adjustable attenuator and a detector; due to the insertion loss of the adjustable attenuator and the detector, the scheme causes the reduction of the receiving sensitivity, and simultaneously increases the cost of the product and reduces the competitiveness of the product in the market.
In addition, the prior art can also adopt a switch and an attenuator to form a path control unit, and two paths are shared; the on-off of the switch is determined by the working frequency range, and the attenuation is determined by the actual requirement; the switch function is realized by using an MOS tube, and the attenuator function is realized by a variable resistor controlled by voltage. The disadvantages of this prior art circuit are: the circuit is complex to realize, more devices are used, and the occupied area of the PCB is large; the realization cost is too high, and the competitiveness of the product in the market is reduced.
Disclosure of Invention
The present invention provides an anti-interference transceiver, a transceiver device, and an anti-interference attenuation method, aiming at the above-mentioned defects in the prior art.
The technical scheme adopted by the invention for solving the technical problems is as follows: an anti-interference transceiving unit is constructed, and is characterized by comprising a transceiving module for receiving an input signal, a signal processing module, a main control circuit and an attenuation control circuit connected between the transceiving module and the main control circuit; the signal processing module is connected between the transceiving module and the main control circuit;
the signal processing module processes the input signal to output a baseband signal to the main control circuit, the main control circuit judges whether the input signal needs to be attenuated, if so, a corresponding control signal is output to the attenuation control circuit according to the signal intensity value of the input signal, and the attenuation control circuit outputs a corresponding attenuation control voltage according to the control signal to control the transceiver module to attenuate the input signal.
In the anti-interference transceiver unit of the present invention, preferably, the main control circuit stores a preset signal strength value, compares the signal strength value of the input signal with the preset signal strength value if the input signal needs to be attenuated, and outputs a corresponding control signal according to a comparison result.
In the anti-interference transceiver unit of the present invention, preferably, the transceiver module is a PIN transceiver module, and includes a first diode D1001, a second diode D1002, a capacitor C1001, a capacitor C1003, a capacitor C1076, a magnetic bead FB1001, a resistor R1002, an inductor L1001, a capacitor C1009, a capacitor C1010, a capacitor C1011, a resistor R1003, and a resistor R1004;
the inductor L1001, the magnetic bead FB1001 and the resistor R1001 are sequentially connected in series between the anode of the first diode D1001 and the first output end of the attenuation control circuit; the capacitor C1076 is connected between the second end of the magnetic bead FB1001 and the reference ground; the resistor R1002 is connected in parallel with the resistor R1001, and a second end of the resistor R1002 is further connected to a reference ground through the capacitor C1003; the capacitor C1009, the capacitor C1010, the capacitor C1011, the resistor R1003 and the resistor R1004 are sequentially connected in parallel, the first end of the capacitor C1011 is further connected to the cathode of the second diode D1002, and the anode of the second diode D1002 is connected to the attenuation control circuit.
In the anti-interference transceiver unit of the present invention, preferably, the attenuation control circuit includes a switching control switch U1001, an inductor L1004, a magnetic bead FB1002, a resistor R1005, a resistor R1006, a capacitor C1012, and a capacitor C1013;
the inductor L1004, the magnetic bead FB1002, and the resistor R1006 are sequentially connected in series between the anode of the second diode D1002 and the second output terminal of the switching control switch U1001; the resistor R1005 is connected in parallel with the resistor R1006, and a second end of the resistor R1005 is also connected to the ground reference through the capacitor C1013; the capacitor C1012 is connected between the second end of the magnetic bead FB1002 and the reference ground; a first voltage input pin and a second voltage input pin of the switching control switch U1001 are connected to the main control circuit, and corresponding control voltages are respectively output through the second output terminal and the first output terminal according to a control signal output by the main control circuit to control the conduction state of the second diode D1002, so that the attenuation of an input signal is realized.
In the interference rejection transceiver unit according to the present invention, it is preferable that the interference rejection transceiver unit further includes an antenna for transmitting and receiving a signal, and a filter connected between the antenna and the transceiver module for filtering the input signal.
In the anti-interference transceiver unit of the present invention, preferably, the signal processing module includes a first band pass filter, a low noise amplifier, a second band pass filter, a first mixer, an intermediate frequency circuit, a second mixer, a first local oscillator, and a second local oscillator;
the first band-pass filter, the low-noise amplifier, the second band-pass filter and the intermediate frequency circuit are sequentially connected in series between the transceiver module and the main control circuit, the first mixer is connected in series between the second band-pass filter and the intermediate frequency circuit, and the second mixer is connected in series between the intermediate frequency circuit and the main control circuit; the first local oscillator is connected with the first frequency mixer so as to provide a first local oscillator signal for the first frequency mixer and convert the input signal into an intermediate frequency signal; the second local oscillator is connected with the second frequency mixer to provide a second local oscillator signal for the second frequency mixer, convert the intermediate frequency signal into a baseband signal and send the baseband signal to the main control circuit.
The invention also provides a transceiver device which comprises the anti-interference transceiver unit.
The invention also provides an anti-interference attenuation processing method of the transceiver unit, which comprises the following steps:
the method comprises the steps that a main control circuit detects an input signal in real time and judges whether the input signal needs to be attenuated or not;
if yes, outputting a corresponding control signal to an attenuation control circuit according to the signal intensity value of the input signal, and outputting a corresponding attenuation control voltage by the attenuation control circuit to control a transceiver module to attenuate the input signal.
In the anti-interference attenuation processing method of the transceiver unit of the present invention, preferably, the main control circuit stores a preset signal intensity value, compares the signal intensity value of the input signal with the preset signal intensity value if the input signal needs to be attenuated, and outputs a corresponding control signal according to a comparison result.
In the method for processing anti-interference attenuation of a transceiver unit according to the present invention, preferably, the input signal includes a control frame, the control frame includes a transmission timeslot, an idle timeslot, and a reception timeslot, and the idle timeslot is set between the transmission timeslot and the reception timeslot; the receiving time slot is used for controlling the main control circuit to start data receiving and calculating the signal strength value of the input signal, and the idle time slot is used for starting attenuation control.
The anti-interference transceiving unit, the transceiving device and the anti-interference attenuation processing method have the following beneficial effects: the anti-interference transceiving unit comprises a transceiving module for receiving input signals, a signal processing module, a main control circuit and an attenuation control circuit connected between the main control circuits of the transceiving module; the signal processing module is connected between the transceiving module and the main control circuit; the signal processing module processes the input signal to output an intermediate frequency signal to the main control circuit, the main control circuit judges whether the input signal needs to be attenuated, if so, the main control circuit outputs a corresponding control signal to the attenuation control circuit according to the signal intensity value of the input signal, and the attenuation control circuit outputs a corresponding attenuation control voltage according to the control signal to control the transceiver module to attenuate the input signal. The invention utilizes the PIN tube of the transceiver module to increase the adjustable attenuation function, thereby not only improving the anti-blocking capability, but also optimizing the receiving sensitivity and improving the competitiveness of the product in the market.
Drawings
The invention will be further described with reference to the accompanying drawings and examples, in which:
fig. 1 is a schematic diagram of a hardware structure of an anti-interference transceiver unit according to an embodiment of the present invention;
FIG. 2 is a schematic diagram of a second hardware structure of an embodiment of an anti-interference transceiver unit according to the present invention;
FIG. 3 is a schematic diagram of the transceiver module and attenuation control circuit of the anti-jamming transceiver unit of the present invention;
FIG. 4 is a flowchart illustrating a first embodiment of an anti-interference attenuation processing method of a transceiver unit according to the present invention;
FIG. 5 is a flowchart illustrating a second embodiment of the anti-interference attenuation processing method of the transceiver unit according to the present invention;
fig. 6 is a control frame structure diagram of an anti-interference attenuation processing method of a transceiver unit according to an embodiment of the present invention.
Detailed Description
For a more clear understanding of the technical features, objects and effects of the present invention, embodiments of the present invention will now be described in detail with reference to the accompanying drawings.
As shown in fig. 1, which is a schematic diagram of a hardware structure of a first embodiment of the anti-interference transceiver unit of the present invention, the anti-interference transceiver unit includes: a transceiver module 30, a signal processing module 40, a main control circuit 50, and an attenuation control circuit 60. It can be understood that the anti-interference transceiver unit of the present invention can be applied to a receiver, a time division duplex transceiver, or a handheld terminal such as a wireless interphone.
Specifically, the method comprises the following steps:
the transceiver module 30 is connected to the signal processing module 40, and is configured to receive an input signal, and attenuate the input signal according to the attenuation control voltage transmitted by the attenuation control circuit 60 when the input signal needs to be attenuated, so as to reduce the influence of blocking interference signals in the input signal, avoid nonlinear distortion and gain reduction at the radio frequency front end of the receiving link, and reduce noise influence. Preferably, in this embodiment, the transceiver module 30 is a double PIN transceiver module.
The signal processing module 40 is connected between the transceiver module 30 and the main control circuit 50, and processes the input signal received by the transceiver module 30, and finally converts the input signal into a baseband signal to the main control circuit 50 for use by a subsequent circuit.
And the main control circuit 50 is respectively connected with the signal processing module 40 and the attenuation control circuit 60, and is configured to detect the input signal in real time, determine whether the input signal needs to be attenuated, calculate a signal strength value of the input signal if the input signal needs to be attenuated, compare the signal strength value of the input signal with a pre-stored preset signal strength value, and input a corresponding control signal to the attenuation control circuit 60 according to a comparison result.
The attenuation control circuit 60 is connected between the main control circuit 50 and the transceiver module 30, receives the control signal output by the main control circuit 50, outputs a corresponding attenuation control voltage to the transceiver module 30, and controls the conduction state of the PIN in the transceiver module 30 (i.e., controls the impedance of the PIN) through the attenuation control voltage, so that the receiving link generates an attenuation amount corresponding to the attenuation control voltage, thereby achieving the purpose of performing attenuation processing on the input signal.
The invention can realize the function of the adjustable attenuator by multiplexing the PIN tube in the receiving and transmitting module of the receiving end, thereby improving the capability of the receiver for resisting the blocking interference of strong signals. On the basis of the existing PIN tube transceiver, the multi-gear adjustable attenuation function is designed by utilizing the conduction characteristic of the PIN tube, the nonlinear distortion of the radio frequency front end when the receiver is interfered by large signals is reduced, and the anti-interference capability of the receiver is improved. Further, compared with the existing RFAGC (radio frequency automatic gain control) scheme, the invention also improves the receiving sensitivity, and simultaneously removes a numerical control attenuator ATT and a power detector, thereby greatly reducing the cost.
Preferably, in this embodiment, if the input signal is not attenuated, the input signal is not attenuated.
As shown in fig. 2, a schematic diagram of a hardware structure of a second embodiment of the anti-interference transceiver unit of the present invention is shown, in this embodiment, the anti-interference transceiver unit of the present invention includes: the antenna 10, the low pass filter 20, the transceiver module 30, and the signal processing module 40, wherein the signal processing module 40 includes a first band pass filter 401, a low noise amplifier 402, a second band pass filter 403, a first mixer 404, an intermediate frequency circuit 405, a second mixer 406, a first local oscillator 407, and a second local oscillator 408.
Specifically, the low pass filter 20 is connected between the antenna 10 and the transceiver module 30, and performs filtering processing on the input signal, thereby suppressing an interference signal higher than the operating frequency.
The first band-pass filter 401 and the second band-pass filter 403 are used to suppress interference signals outside the operating frequency band of the input signal.
The low noise amplifier LNA402 is configured to amplify an input signal and reduce the influence of noise of a subsequent circuit on the reception sensitivity.
The first mixer 404 is connected between the LNA402 and the if circuit 405, and is also connected to the first local oscillator 407, and converts the radio frequency signal (i.e., the input signal amplified by the LNA 402) into an if signal by receiving the first local oscillator signal provided by the first local oscillator 407.
The intermediate frequency circuit 405, generally, the intermediate frequency circuit 405 includes an intermediate frequency filter and an intermediate frequency amplifier, performs useful channel selection by the intermediate frequency filter, suppresses an interference signal other than a useful signal, amplifies the intermediate frequency signal by the intermediate frequency amplifier, and reduces the influence of noise of a subsequent circuit on the reception sensitivity.
The first and second local oscillators 407, 408 provide first and second local oscillator signals to the first and second mixers 404, 406, respectively.
The transceiver module 30, the signal processing module 40, the main control circuit 50, and the attenuation control circuit 60 form an attenuator with adjustable multiple stages, and implement different attenuation amounts by calculating the signal strength (RSSI) value of the input signal, wherein the transceiver module 30 is designed at the front end of the radio frequency of the receiver, and is a transceiver switch of a multiplexing PIN tube. When strong blocking interference signals exist in a receiving link, the radio frequency front end of the receiving link generates serious nonlinear distortion, gain reduction and noise coefficient obvious increase to cause the reduction of receiving and demodulating capability, and the receiving and transmitting unit with the function of the attenuator with adjustable multiple gears can reduce the influence of the blocking interference signals in input signals. In the PIN tube transceiver module 30, different attenuation amounts are realized by controlling the conduction state of the PIN tube; according to the received RSSI value of the input signal, control of different attenuation gears is carried out, the larger the RSSI value of the input signal is (namely the larger the power is), the larger the attenuation is, and further, a strong interference signal can not cause a radio frequency front end link to be in a saturated state, and the problem of blockage caused by the saturation of the radio frequency front end is solved. In addition, on the basis of the existing PIN transceiver, the invention utilizes the conducting characteristic of PIN to design a multi-gear adjustable attenuation function, reduces the nonlinear distortion of the radio frequency front end when the receiver is interfered by strong signals, improves the anti-interference capability and the dynamic adjustment range of the receiver, and has flexible attenuation performance, wider working frequency band and higher system linearity.
The working principle of the invention is explained in detail with reference to fig. 2: when strong signal interference occurs, the main control circuit 50 calculates the RSSI value of the input signal according to the received input signal, compares the RSSI value with a preset signal strength value, when the RSSI value of the input signal is-20 dB, the main control circuit 50 finds the condition of-30 < > RSSI in the corresponding relation table of RSSI and attenuation amount according to the RSSI value of-20 dB, then executes control under the condition, that is, the I/O PIN of the main control circuit 50 outputs high level H, and controls the digital-to-analog converter DAC in the main control circuit 50 to output attenuation control voltage VCC _1 to the attenuation control circuit 60, transmits the attenuation control voltage VCC _1 to the transceiver module 30 through the attenuation control circuit 60, and further controls the conduction state of the PIN tube in the transceiver module 30 by the attenuation control voltage VCC _1, so that the receiving link generates 30dB attenuation, and eliminates the nonlinear distortion of the receiving link, the problem of strong signal interference blocking of a receiver is solved. If the RSSI of the input signal is < -90, no attenuation is generated, that is, the attenuation is 0dB, which is equal to the low level L output by the I/O PIN of the main control circuit 50, and the DAC is controlled to output the attenuation control voltage VCC _5, which is transmitted to the transceiver module 30 through the attenuation control circuit 60, and the on-state of the PIN is controlled through the attenuation control voltage VCC _5, so that no attenuation is generated in the receiving link.
| Input signal RSSI/dBm | Attenuation of receive chain | Damping control voltage |
| -30<＝RSSI | 30dB | VCC_1 |
| -80<＝RSSI<-30 | 18dB | VCC_2 |
| -85<＝RSSI<-80 | 12dB | VCC_3 |
| -90<＝RSSI<-85 | 6dB | VCC_4 |
| RSSI<-90 | Without attenuation | VCC_5 |
TABLE 1 corresponding relationship between RSSI and attenuation
As shown in table 1, in the present embodiment, the attenuation control voltages are 5. It will be appreciated that the damping control voltage is determined according to the requirements of the product design; the attenuation control voltage is determined by the magnitude of the attenuation, the number of the attenuation control voltages is determined by the number of the attenuation, and the number of the attenuation is determined by the actual product requirement, so that the number of the attenuation control voltages is determined according to the actual situation and is changed along with the actual requirement of the product design.
Fig. 3 is a schematic circuit diagram of the transceiver module 30 and the attenuation control circuit 60 of the anti-interference transceiver unit according to the present invention; when the PIN tube transceiving switch is multiplexed, the conduction voltage of the PIN is controlled through VCC and VCC1, so that different attenuation amounts of a receiving link are realized. The VCC1 controls the DAC output by the DSP through software instructions, the size of the DAC is determined by the resistance values of the bias resistors R1003, R1004, R1005 and R1006, and the VCC and VCC1 are switched by the attenuation control circuit 60. For example, the RSSI value of the received input signal is-55 dB, and in combination with the relationship between the RSSI and the attenuation shown in table 1, the main control circuit 50 controls the switching control switch U1001 to connect the PIN3 PIN and the PIN4 PIN, and the DSP controls the output VCC1 of the DAC to be 0.75V through software instructions, and controls the on state of the second diode D1002 through the VCC1 to generate 18dB of attenuation in the receiving link. The control principle of other attenuation amounts is the same as that of 18 dB.
| Controlling attenuation values | VCC1 Voltage value (V) |
| 6dB | 0.56 |
| 12dB | 0.64 |
| 18dB | 0.75 |
TABLE 2 correspondence of attenuation and DAC output voltage values
It will be appreciated that the specific amount of attenuation is determined by the actual requirements of the product, and the voltage level at VCC1 is determined by the actual amount of attenuation and the bias resistance.
Specifically, the transceiver module 30 includes a first diode D1001, a second diode D1002, a capacitor C1001, a capacitor C1003, a capacitor C1076, a magnetic bead FB1001, a resistor R1002, an inductor L1001, a capacitor C1009, a capacitor C1010, a capacitor C1011, a resistor R1003, and a resistor R1004.
An inductor L1001, a magnetic bead FB1001 and a resistor R1001 are sequentially connected in series between the anode of the first diode D1001 and the first output end of the attenuation control circuit 60; a capacitor C1076 is connected to the second end of the magnetic bead FB1001 and the reference ground; the resistor R1002 is connected with the resistor R1001 in parallel, and the second end of the resistor R1002 is also connected to the reference ground through the capacitor C1003; the capacitor C1009, the capacitor C1010, the capacitor C1011, the resistor R1003 and the resistor R1004 are sequentially connected in parallel, the first end of the capacitor C1011 is further connected to the cathode of the second diode D1002, and the anode of the second diode D1002 is connected to the attenuation control circuit 60. The inductor also comprises a capacitor C1002, an inductor L1009, an inductor L1002, a capacitor C1004, a capacitor C1005, a capacitor C1006, an inductor L1003 and a capacitor C1008; a capacitor C1002 and an inductor L1009 are sequentially connected in series between the anode and the cathode of the first diode D1001, and the inductor L1002 is connected in series between the cathode of the first diode D1001 and the reference ground; a capacitor C1004 is connected between the cathode of the first diode D1001 and the antenna 10 in series, a capacitor C1005 and an inductor L1003 are connected between the cathode of the first diode D1001 and the anode of the second diode D1002 in series in sequence, and a capacitor C1006 is connected between the node of the capacitor C1005 and the inductor L1003 and the reference ground in series; a first terminal of the capacitor C1008 is connected to the anode of the second diode D1002, and a second terminal of the capacitor C1008 is connected to the transceiver module 30 and the first band pass filter 401.
The attenuation control circuit includes a switching control switch U1001, an inductor L1004, a magnetic bead FB1002, a resistor R1005, a resistor R1006, a capacitor C1012, and a capacitor C1013.
An inductor L1004, a magnetic bead FB1002 and a resistor R1006 are sequentially connected in series between the anode of the second diode D1002 and a PIN4 PIN of the switching control switch U1001; the resistor R1005 is connected in parallel with the resistor R1006, and the second terminal of the resistor R1005 is further connected to the ground reference through the capacitor C1013; the capacitor C1012 is connected between the second end of the magnetic bead FB1002 and the reference ground; a first voltage input pin and a second voltage input pin of the switching control switch U1001 are connected to the main control circuit 50, and the on-state of the second diode D1002 is controlled according to the attenuation control voltage output by the main control circuit 50 to attenuate an input signal. As shown in fig. 3, PIN3 of the switching control switch U1001 is a first voltage input PIN, and PIN1 is a second voltage input PIN; the PIN6 PIN of the switch control switch U1001 is connected with the I/O PIN of the main control circuit 50, the PIN5 PIN of the switch control switch U1001 is connected with the 5V power supply of the main control circuit 50, the PIN3 PIN of the switch control switch U1001 is connected with the output port of the DAC in the main control circuit 50, and the PIN1 PIN of the switch control switch U1001 is connected with the power output end in the main control circuit 50. Preferably, the output of this power supply is either 3.3V or 0V voltage as controlled by the I/O of the master control circuit 50.
It will be appreciated that in this embodiment, capacitor C1003 is primarily used to filter the VCC1 power supply; the resistor R1001 and the resistor R1002 are used for adjusting the on-current of the first diode D1001; the magnetic bead FB1001 is used for filtering a VCC1 power supply; the capacitor C1076 filters the VCC1 power supply on the one hand, and short-circuits the transmission signal leaked from L1001 to ground during transmission on the other hand; inductor L1001 is to prevent the transmit signal from leaking to the VCC1 power supply; inductor L1002 is a dc return to ground for VCC 1; the capacitance C1002 and the inductance L1009 are the degrees of isolation between the matching, transmission and reception of the adjusting circuit; the capacitor C1001, the capacitor C1004, and the capacitor C1008 are coupling capacitors; the capacitor C1005 is a coupling capacitor and isolates the power supplies of the first diode D1001 and the second diode D1002 to avoid mutual interference; the capacitor C1006, the capacitor C1007 and the inductor L1003 form a quarter lambda line; the resistor R1003, the resistor R1004, the resistor R1005 and the resistor R1006 are used for adjusting the on-current of the second diode D1002; magnetic bead FB1002 and capacitor C1013 filter VCC1 or VCC; the capacitor C1009, the capacitor C1010 and the capacitor C1011 reduce energy leaked to a receiving end by a transmitting signal when transmitting.
According to fig. 3, when the received input signal has a signal strength of-30 dBm ═ RSSI, the I/O PIN of the main control circuit 50 outputs a high level H to the PIN6 PIN of the switch control switch U1001, the level of the PIN6 PIN is controlled to be a high level H, and CTL is "H", at this time, the I/O output port of the main control circuit 50 controls to output a 3.3V voltage, that is, a logic voltage is 3.3V, the PIN1 PIN of the switch control switch U1001 is connected to the PIN4 PIN, VCC1 is 3.3V, and VCC is VCC — 1, VCC1 is transmitted to the second diode D1002 through the switch control switch U1001, and the on state of the second diode D1002 is controlled (that is, the impedance thereof is controlled) by the attenuation control voltage VCC1, so that the receiving link generates an attenuation of 30 dB. When the signal strength of the received input signal is-80 dBm < - > RSSI < -30dBm, the I/O PIN of the main control circuit 50 outputs a low level L to the PIN6 PIN of the switching control switch U1001, the level of the PIN6 PIN is controlled to be the low level L, CTL equals to "L", at this time, the I/O output port of the main control circuit 50 controls to output a voltage of 0V, that is, a logic voltage is 0V, and the PIN3 PIN of the switching control switch U1001 is connected with the PIN4 PIN; VCC1 is 0V, VCC is VCC _2, VCC _2 is transmitted to the second diode D1002 by switching the control switch U1001, and the on state of the second diode D1002 is controlled by the attenuation control voltage VCC _2, so that the receiving link generates 18dB of attenuation. When the signal strength of the received input signal is-85 dBm < -RSSI < -80dBm, CTL is "L", namely the logic voltage is 0V, and a PIN3 PIN and a PIN4 PIN of the switching control switch U1001 are connected; the conduction state of the second diode D1002 is controlled by the attenuation control voltage VCC _3, so that the receiving link generates 12dB of attenuation. When the signal strength of the received input signal is-90 dBm-RSSI-85 dBm, CTL is 'L', namely the logic voltage is 0V, and a PIN3 PIN and a PIN4 PIN of the switching control switch U1001 are connected; the conduction state of the second diode D1002 is controlled by the attenuation control voltage VCC _4, so that the receiving link generates 6dB of attenuation. When the RSSI of the received input signal is < -90dBm, CTL is L, namely the logic voltage is 0V, and the PIN3 PIN and the PIN4 PIN of the switching control switch U1001 are connected; the conduction state of the second diode D1002 is controlled by the attenuation control voltage VCC _5, so that no attenuation occurs in the receiving link.
TABLE 3 logic table for controlling different attenuation
Fig. 4 is a schematic flow chart of a first anti-interference attenuation processing method of a transceiver unit according to an embodiment of the present invention; in this embodiment, the anti-interference attenuation processing method of the transceiver unit of the present invention includes the following steps:
s101, the main control circuit 50 detects an input signal in real time and judges whether the input signal needs to be attenuated or not;
and S102, if yes, outputting a corresponding control signal to the attenuation control circuit 60 according to the signal intensity value of the input signal, and outputting a corresponding attenuation control voltage by the attenuation control circuit 60 to control the transceiver module 30 to attenuate the input signal.
When strong blocking interference signals exist in a receiving link, the radio frequency front end of the receiving link generates serious nonlinear distortion, gain reduction and noise coefficient obvious increase to cause the reduction of receiving and demodulating capability, and the transceiving unit with the function of the multi-gear adjustable attenuator can eliminate the strong signal blocking interference. In the PIN tube transceiver module 30, different attenuation amounts are realized by controlling the conduction state of the PIN tube; according to the received RSSI value of the input signal, control of different attenuation gears is carried out, the larger the RSSI value of the input signal is (namely the larger the power is), the larger the attenuation is, and further, a strong interference signal can not cause a radio frequency front end link to be in a saturated state, and the problem of blockage caused by the saturation of the radio frequency front end is solved. In addition, on the basis of the existing PIN transceiver, the invention utilizes the conducting characteristic of PIN to design a multi-gear adjustable attenuation function, reduces the nonlinear distortion of the radio frequency front end when the receiver is interfered by strong signals, improves the anti-interference capability and the dynamic adjustment range of the receiver, and has flexible attenuation performance, wider working frequency band and higher system linearity.
Preferably, in this embodiment, when the received input signal is not attenuated, the input signal is not subjected to attenuation processing. Namely, the main control circuit 50 controls the DAC to output the attenuation control voltage VCC _ to be transmitted to the transceiver module 30 through the attenuation control circuit 60, and controls the conduction state of the PIN tube through the attenuation control voltage VCC _5, so that no attenuation is generated in the receiving link.
Fig. 5 is a schematic flow chart of a second anti-interference attenuation processing method of the transceiving unit according to the embodiment of the present invention; in this embodiment, the interference rejection processing method of the transceiver unit of the present invention includes the following steps:
s201, an antenna receives an input signal and transmits the input signal to the main control circuit 50;
s202, after receiving the input signal, the main control circuit 50 calculates a signal strength value RSSI of the input signal through software;
s203, comparing the signal strength value RSSI of the input signal with a preset signal strength value, and judging whether attenuation is needed; in this step, after the main control circuit 50 calculates the RSSI of the input signal through software, it determines whether attenuation is required according to the correspondence between the RSSI and the attenuation amount, and if attenuation is required, step S204 is executed according to table 1;
s204, the main control circuit 50 outputs a control signal, namely, an I/O pin of the main control circuit 50 outputs high and low levels to the attenuation control circuit 60, and the DSP processor controls the DAC (digital-to-analog converter) to output through a software instruction;
s205, the DAC carries out voltage digital-to-analog conversion according to the instruction of the DSP processor and outputs attenuation control voltage VCC1 to the attenuation control circuit 60;
s206, the attenuation control circuit 60 transmits the attenuation control voltage VCC1 to the transceiver module 30 according to the main control circuit 50;
s207, controlling the conduction state of a PIN tube in the transceiver module 30 through attenuation control voltage VCC1, and carrying out attenuation processing on a receiving link;
s208, if there is no attenuation, the main control circuit 50 controls the DAC to output a corresponding voltage to the attenuation control circuit 60, the I/O PIN of the main control circuit 50 outputs a low level signal to the attenuation control circuit 60, and the voltage is transmitted to the transceiver module 30 through the attenuation control circuit 60 to control the conduction state of the PIN in the transceiver module 30, so that the receive link has no attenuation.
Fig. 6 is a control frame structure diagram of an anti-interference attenuation processing method of a transceiver unit according to an embodiment of the present invention. In this embodiment, the input signal includes control frames, and each control frame includes a transmit slot (TX slot), an idle time (Idleslot), and a receive slot (RX slot). The idle slot is arranged between the transmit slot and the receive slot, in other words, the idle slot is one slot before the receive slot. Preferably, in the embodiment of the present invention, the receiving time slot is used for controlling the main control circuit 50 to start data reception and signal strength value calculation for the input signal, and the idle time slot is used for starting attenuation control. Specifically, with reference to table 1, the main control circuit 50 calculates the RSSI value of the input signal in the receiving time slot of the previous frame through software, and completes the attenuation amount control process for the receiving link in the preparation time slot before the receiving time slot of the next frame, that is, eliminates the rf front-end nonlinear distortion blocking receiver caused by the strong interference signal in advance before the receiving time slot is demodulated. The anti-interference attenuation processing method has real-time performance and pre-processing performance, namely, the attenuation processing of the strong interference signal can be completed before the demodulation of the receiving time slot, and the blockage of the strong interference signal to a receiver is eliminated.
For example, referring to table 2, when the receiving link is not attenuated at the nth slot, the RSSI value of the received input signal is-55 dB, and in combination with the relationship between the RSSI and the attenuation shown in table 1, the main control circuit 50 controls the switching control switch U1001 to connect the PIN3 PIN and the PIN4 PIN during the preparation time before the nth +1 slot, and the DSP processor controls the output of the DAC through a software instruction, that is, VCC1 is 0.75V, so that the receiving link realizes 18dB attenuation, and the control principle of the other 6dB and 12dB attenuation amounts is the same as the control principle of the 18dB attenuation amount.
The invention carries out attenuation processing on input signals by multiplexing a PIN tube in a receiving and sending switch of a radio frequency front end, calculates the RSSI value of the input signals in the receiving time slot of the previous frame, finishes the attenuation control process of a receiving link at the preparation time slot before the receiving time slot of the next frame, namely eliminates the radio frequency front end nonlinear distortion blocking receiver which is conducted by strong interference signals in advance before the receiving time slot is demodulated; the whole processing process comprises the calculation of the signal intensity value and the power attenuation, and the timeliness of the attenuation processing is greatly improved.
The invention also provides a transceiver device which comprises the anti-interference transceiver unit of the embodiment.
The above embodiments are merely illustrative of the technical ideas and features of the present invention, and are intended to enable those skilled in the art to understand the contents of the present invention and implement the present invention, and not to limit the scope of the present invention. All equivalent changes and modifications made within the scope of the claims of the present invention should be covered by the claims of the present invention.
It will be understood that modifications and variations can be made by persons skilled in the art in light of the above teachings and all such modifications and variations are intended to be included within the scope of the invention as defined in the appended claims.
Claims (9)
1. An anti-interference transceiver unit is characterized by comprising a transceiver module for receiving input signals, a signal processing module, a main control circuit and an attenuation control circuit connected between the transceiver module and the main control circuit; the signal processing module is connected between the transceiving module and the main control circuit;
the signal processing module processes the input signal to output a baseband signal to the main control circuit, the main control circuit judges whether the input signal needs to be attenuated, if so, a corresponding control signal is output to the attenuation control circuit according to the signal intensity value of the input signal, and the attenuation control circuit outputs a corresponding attenuation control voltage according to the control signal to control the transceiver module to attenuate the input signal;
the transceiver module is a double PIN tube transceiver module;
the transceiver module comprises a first diode D1001, a second diode D1002, a capacitor C1001, a capacitor C1003, a capacitor C1076, a magnetic bead FB1001, a resistor R1002, an inductor L1001, a capacitor C1009, a capacitor C1010, a capacitor C1011, a resistor R1003 and a resistor R1004; the inductor L1002 is also included;
a first end of the capacitor C1001 is connected to an input signal, a second end of the capacitor C1001 is connected to an anode of the first diode D1001, a cathode of the first diode D1001 is connected to a first end of the inductor L1002, and a second end of the inductor L1002 is connected to a reference ground;
the inductor L1001, the magnetic bead FB1001 and the resistor R1001 are sequentially connected in series between the anode of the first diode D1001 and the first output end of the attenuation control circuit; a first end of the inductor L1001 is connected to a second end of the capacitor C1001 and a connection end of an anode of the first diode D1001, a second end of the inductor L1001 is connected to a second end of the magnetic bead FB1001, a first end of the magnetic bead FB1001 is connected to a first end of the resistor R1001, a second end of the resistor R1001 is connected to a first output end of the attenuation control circuit, a first end of the capacitor C1076 is connected to a second end of the magnetic bead FB1001, and a second end of the capacitor C1076 is connected to a ground reference; a first end of the resistor R1002 is connected to a first end of the resistor R1001, and a second end of the resistor R1002 is connected to a reference ground through the capacitor C1003; the anode of the second diode D1002 is connected with the attenuation control circuit, the cathode of the second diode D1002 is connected with the first end of the capacitor C1011, and the second end of the capacitor C1011 is connected with the reference ground; the capacitor C1009 and the capacitor C1010 are sequentially connected in parallel between the first end and the second end of the capacitor C1011, and the resistor R1003 and the resistor R1004 are sequentially connected in parallel between the first end and the second end of the capacitor C1011.
2. The anti-jamming transceiver unit of claim 1, wherein the main control circuit stores a preset signal strength value, compares the signal strength value of the input signal with the preset signal strength value if the input signal needs to be attenuated, and outputs a corresponding control signal according to the comparison result.
3. The anti-jamming transceiver unit according to claim 1, wherein the attenuation control circuit includes a switch control switch U1001, an inductor L1004, a magnetic bead FB1002, a resistor R1005, a resistor R1006, a capacitor C1012, and a capacitor C1013;
the inductor L1004, the magnetic bead FB1002, and the resistor R1006 are sequentially connected in series between the anode of the second diode D1002 and the second output terminal of the switching control switch U1001; a first end of the resistor R1005 is connected to the connection ends of the magnetic bead FB1002 and the resistor R1006, a second end of the resistor R1005 is connected to a second output end of the switching control switch U1001, and the second end of the resistor R1005 is further connected to a reference ground through the capacitor C1013; a first end of the capacitor C1012 is connected to the connection end of the inductor L1004 and the magnetic bead FB1002, and a second end of the capacitor C1012 is connected to the reference ground; a first voltage input pin and a second voltage input pin of the switching control switch U1001 are connected to the main control circuit, and the conduction state of the second diode D1002 is controlled according to a control signal output by the main control circuit to attenuate an input signal.
4. The anti-jamming transceiver unit of claim 1, further comprising an antenna for transceiving signals, and a filter connected between the antenna and the transceiver module for filtering the input signal.
5. The antijam transceiver unit of claim 1, wherein the signal processing module includes a first band pass filter, a low noise amplifier, a second band pass filter, a first mixer, an intermediate frequency circuit, a second mixer, a first local oscillator, and a second local oscillator;
the first band-pass filter, the low-noise amplifier, the second band-pass filter and the intermediate frequency circuit are sequentially connected in series between the transceiver module and the main control circuit, the first mixer is connected in series between the second band-pass filter and the intermediate frequency circuit, and the second mixer is connected in series between the intermediate frequency circuit and the main control circuit; the first local oscillator is connected with the first frequency mixer so as to provide a first local oscillator signal for the first frequency mixer and convert the input signal into an intermediate frequency signal; the second local oscillator is connected with the second frequency mixer to provide a second local oscillator signal for the second frequency mixer, convert the intermediate frequency signal into a baseband signal and send the baseband signal to the main control circuit.
6. A transceiver apparatus comprising the interference-resistant transceiver unit according to any one of claims 1 to 5.
7. An anti-interference attenuation processing method for a transceiver unit, applied to the anti-interference transceiver unit of any one of claims 1 to 5, comprising:
the method comprises the steps that a main control circuit detects an input signal in real time and judges whether the input signal needs to be attenuated or not;
if yes, outputting a corresponding control signal to an attenuation control circuit according to the signal intensity value of the input signal, and outputting a corresponding attenuation control voltage by the attenuation control circuit to control a transceiver module to attenuate the input signal.
8. The method according to claim 7, wherein the main control circuit stores a preset signal strength value, compares the signal strength value of the input signal with the preset signal strength value if the input signal needs to be attenuated, and outputs a corresponding control signal according to the comparison result.
9. The antijam fading processing method of a transceiver unit according to claim 7 or 8, wherein the input signal includes a control frame, the control frame includes a transmission slot, an idle slot, and a reception slot, and the idle slot is disposed between the transmission slot and the reception slot; the receiving time slot is used for controlling the main control circuit to start data receiving and calculating the signal strength value of the input signal, and the idle time slot is used for starting attenuation control.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710453007.2A CN107257245B (en) | 2017-06-15 | 2017-06-15 | Anti-interference transmitting and receiving unit, transmitting and receiving device and anti-interference attenuation processing method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710453007.2A CN107257245B (en) | 2017-06-15 | 2017-06-15 | Anti-interference transmitting and receiving unit, transmitting and receiving device and anti-interference attenuation processing method |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN107257245A CN107257245A (en) | 2017-10-17 |
| CN107257245B true CN107257245B (en) | 2020-01-21 |
Family
ID=60024203
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201710453007.2A Active CN107257245B (en) | 2017-06-15 | 2017-06-15 | Anti-interference transmitting and receiving unit, transmitting and receiving device and anti-interference attenuation processing method |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN107257245B (en) |
Families Citing this family (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108964683B (en) * | 2018-06-05 | 2020-03-31 | 海能达通信股份有限公司 | Radio frequency transceiver circuit and mobile terminal |
| CN110212973A (en) * | 2019-06-28 | 2019-09-06 | 深圳市中冀联合技术股份有限公司 | A kind of attenuator control panel and GNSS satellite signal repeater system |
| US10725089B1 (en) * | 2019-08-26 | 2020-07-28 | Nanya Technology Corporation | Semiconductor device and operating method thereof |
| CN114944846B (en) * | 2021-02-10 | 2023-12-12 | 海能达通信股份有限公司 | Radio frequency receiving and transmitting device and method and electronic equipment |
| CN116366078B (en) * | 2022-12-28 | 2024-04-02 | ***通信有限公司研究院 | Radio frequency attenuation device, method and radio frequency communication equipment |
| CN116704848B (en) * | 2023-08-04 | 2023-10-03 | 南京航天工业科技有限公司 | Unmanned aerial vehicle airborne target simulation method, device and system for receiving and transmitting simultaneously |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1109701A (en) * | 1993-05-14 | 1995-10-04 | 艾利森电话股份有限公司 | Dynamic control of transmitting power at a transmitter and attenuation at a receiver |
| CN101072058A (en) * | 1994-12-16 | 2007-11-14 | 高通股份有限公司 | Apparatus for increasing receiver immunity to interference and receiver circuit |
| CN102075209A (en) * | 2009-11-23 | 2011-05-25 | 上海无线通信研究中心 | Asymmetric frequency division duplex transceiving system and transceiving method |
| CN102711232A (en) * | 2012-06-12 | 2012-10-03 | 广州杰赛科技股份有限公司 | Full duplex wireless communication method, base station, mobile station and system |
-
2017
- 2017-06-15 CN CN201710453007.2A patent/CN107257245B/en active Active
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1109701A (en) * | 1993-05-14 | 1995-10-04 | 艾利森电话股份有限公司 | Dynamic control of transmitting power at a transmitter and attenuation at a receiver |
| CN101072058A (en) * | 1994-12-16 | 2007-11-14 | 高通股份有限公司 | Apparatus for increasing receiver immunity to interference and receiver circuit |
| CN102075209A (en) * | 2009-11-23 | 2011-05-25 | 上海无线通信研究中心 | Asymmetric frequency division duplex transceiving system and transceiving method |
| CN102711232A (en) * | 2012-06-12 | 2012-10-03 | 广州杰赛科技股份有限公司 | Full duplex wireless communication method, base station, mobile station and system |
Also Published As
| Publication number | Publication date |
|---|---|
| CN107257245A (en) | 2017-10-17 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN107257245B (en) | Anti-interference transmitting and receiving unit, transmitting and receiving device and anti-interference attenuation processing method | |
| JP4234615B2 (en) | Method and apparatus for improving receiver interference immunity | |
| CN102870333B (en) | Wireless communications transceiver, self-adaption negative conductance circuit and calibration method of notching filter | |
| EP1326347B1 (en) | Method and apparatus for scaling the dynamic range of a receiver | |
| US9392547B2 (en) | Diversity receiver | |
| US20110134810A1 (en) | Module for use in mobile communication terminal and mobile communication terminal applying the same therein | |
| US7639998B1 (en) | RF receiver utilizing dynamic power management | |
| TWI651940B (en) | Interference suppression system and method | |
| CN101335546B (en) | Radio frequency auto-gain control system and method | |
| KR20010041252A (en) | Lna control-circuit for a receiver having closed loop automatic gain control | |
| US7283797B1 (en) | System and method of improving the dynamic range of a receiver in the presence of a narrowband interfering signal | |
| US20030119450A1 (en) | Communications receivers and methods therefor | |
| CN109150229A (en) | Control the mobile terminal and tdd systems of the receiving sensitivity of TDD system | |
| US9496906B2 (en) | Receiver with wide gain range | |
| US8638836B2 (en) | Transmitter signal injection compensation | |
| US7054605B1 (en) | Variable-gain low noise amplifier to reduce linearity requirements on a radio receiver | |
| CN114944846B (en) | Radio frequency receiving and transmitting device and method and electronic equipment | |
| CN210693907U (en) | Radio frequency receiving circuit, receiver and base station | |
| KR100617739B1 (en) | Apparatus for receiving radio frequency in code division multiple access telecommunication terminal and method thereof | |
| CN202353599U (en) | Adjacent-channel interference restraining circuit for microwave transceivers | |
| CN103501417A (en) | Multichannel radar video receiving machine based on operational amplifier | |
| CN114915304B (en) | Receiver, signal anti-interference circuit thereof and signal anti-interference method | |
| EP1742374A1 (en) | Method and apparatus for scaling the dynamic range of a receiver | |
| CN117650795A (en) | Implementation method of radio frequency front end for parallel multi-signal reception | |
| CN116366081A (en) | Receiver, control method thereof and mobile terminal |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |