CN107256078B - Dynamic voltage frequency adjusting method and device - Google Patents
Dynamic voltage frequency adjusting method and device Download PDFInfo
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- CN107256078B CN107256078B CN201710313920.2A CN201710313920A CN107256078B CN 107256078 B CN107256078 B CN 107256078B CN 201710313920 A CN201710313920 A CN 201710313920A CN 107256078 B CN107256078 B CN 107256078B
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- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/26—Power supply means, e.g. regulation thereof
- G06F1/32—Means for saving power
- G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
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- G06F1/32—Means for saving power
- G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
- G06F1/3234—Power saving characterised by the action undertaken
- G06F1/3296—Power saving characterised by the action undertaken by lowering the supply or operating voltage
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Abstract
The embodiment of the invention discloses a DVFS method and a device, which are used for solving the problem that the power consumption of a CPU (Central processing Unit) cannot be lower on the occasion of video coding of electronic equipment in the prior art, and the method comprises the following steps: judging whether the video buffering utilization rate is greater than a set threshold value or not; if yes, determining a target working voltage and a target working frequency according to the CPU load and a predetermined first DVFS table; if not, determining a target working voltage and a target working frequency according to the CPU load and a predetermined second DVFS table, wherein the lower threshold value of the CPU load in the second DVFS table is larger than that of the first DVFS table; and working according to the determined target working voltage and the target working frequency. The target working voltage and the target working frequency determined in the mode are smaller than the target working voltage and the target working frequency determined only through the first DVFS table, and therefore the purpose of reducing power consumption is achieved.
Description
Technical Field
The present invention relates to the field of Dynamic Voltage and Frequency adjustment technologies, and in particular, to a Dynamic Voltage and Frequency Scaling (DVFS) method and apparatus.
Background
At present, because a CPU of an electronic device has strict requirements on the service life and power consumption of a power supply battery, it is necessary to dynamically adjust the operating Frequency and operating Voltage of the CPU according to a real-time load requirement of the CPU by using a Dynamic Voltage Frequency Scaling (DVFS) technology, so as to achieve the purpose of effectively reducing the power consumption of the CPU.
In the prior art, when DVFS is dynamically adjusted, a target operating voltage and a target operating frequency of a CPU are determined according to a correspondence relationship between an operating voltage, an operating frequency, and upper and lower thresholds of a CPU load recorded in a fixed DVFS table, and adjustment is performed. And when the CPU load of the electronic equipment exceeds an upper threshold, increasing the target working voltage and the target working frequency of the CPU, and when the CPU of the electronic equipment is smaller than a lower threshold, reducing the target working voltage and the target working frequency of the CPU.
When the electronic device performs video coding, the CPU load of the electronic device is generally slightly larger than the CPU load lower threshold recorded in the fixed DVFS table, and at this time, if the CPU determines, as the target operating voltage and the target operating frequency of the CPU, the operating voltage and the operating frequency that are smaller than the current operating voltage and the current operating frequency in the group adjacent to the group in the fixed DVFS table corresponding to the current operating voltage and the current operating frequency, the requirement of the CPU for normally performing video coding work can also be satisfied. However, the target operating voltage and the target operating frequency of the CPU cannot be adjusted to smaller values only by the one-time upper and lower threshold adjustment method for the conventional fixed DVFS table, and therefore, the above adjustment method cannot achieve a lower power consumption of the CPU in the case of video encoding.
Disclosure of Invention
The invention provides a DVFS method and a device, which are used for solving the problem that the power consumption of a CPU (Central processing Unit) cannot be lower on the occasion of video coding of electronic equipment in the prior art.
In order to achieve the above object, an embodiment of the present invention discloses a method for adjusting DVFS dynamically, where the method includes:
when the video coding scene is in the video coding scene, acquiring a video buffering utilization rate and a CPU load, and judging whether the video buffering utilization rate is greater than a set threshold value or not, wherein the video buffering utilization rate is the ratio of the storage capacity occupied by a coded video to the total storage capacity of a video annular buffer area available for coding;
if yes, determining a target working voltage and a target working frequency of the CPU according to the acquired CPU load and a predetermined first DVFS table;
if not, determining a target working voltage and a target working frequency of the CPU according to the obtained CPU load and a predetermined second DVFS table, wherein a lower threshold value of the CPU load in the second DVFS table is larger than that of the first DVFS table;
and working according to the determined target working voltage and target working frequency of the CPU.
Further, before the obtaining of the video buffer utilization and the CPU load, the method further includes:
receiving working clock setting information, wherein the working clock setting information comprises the highest frequency of a working clock of a video encoder and the highest frequency of a working clock of a double-rate synchronous dynamic random access memory DDR;
setting the operating clock of the video encoder at a corresponding highest frequency, and setting the operating clock of the DDR at a corresponding highest frequency.
Further, the determining a target operating voltage and a target operating frequency of the CPU according to the acquired CPU load and a predetermined second DVFS table includes:
comparing the CPU load to an upper CPU load threshold and a lower CPU load threshold in the second DVFS table;
if the CPU load is located in the range of the upper threshold value and the lower threshold value of the CPU load in the second DVFS table, determining the current working voltage and the current working frequency of the CPU as the target working voltage and the target working frequency of the CPU;
and if the CPU load is not in the range of the upper CPU load threshold and the lower CPU load threshold in the second DVFS table, determining the target working voltage and the target working frequency of the CPU according to the comparison result, each group of working voltage and working frequency recorded in the second DVFS table and the current working voltage and the current working frequency of the CPU.
Further, the determining the target operating voltage and the target operating frequency of the CPU according to the comparison result, each set of operating voltage and operating frequency recorded in the second DVFS table, and the current operating voltage and the current operating frequency of the CPU includes:
when the comparison result shows that the CPU load is greater than the upper threshold of the CPU load in the second DVFS table, according to a group in the second DVFS table corresponding to the current working voltage and the current working frequency of the CPU, determining the working voltage and the working frequency in a group adjacent to the group as the target working voltage and the target working frequency of the CPU, wherein the working voltage and the working frequency in the adjacent group are greater than the current working voltage and the current working frequency;
and when the comparison result shows that the CPU load is smaller than the lower threshold of the CPU load in the second DVFS table, according to the group in the second DVFS table corresponding to the current working voltage and the current working frequency of the CPU, determining the working voltage and the working frequency in the group adjacent to the group as the target working voltage and the target working frequency of the CPU, wherein the working voltage and the working frequency in the adjacent group are smaller than the current working voltage and the current working frequency.
Further, before determining the operating voltage and the operating frequency in the group adjacent to the group as the target operating voltage and the target operating frequency of the CPU when the comparison result is that the CPU load is greater than the upper CPU load threshold in the second DVFS table, the method further includes:
judging whether the current working voltage and the current working frequency of the CPU are the maximum working voltage and the maximum working frequency recorded in the second DVFS table; if yes, determining the current working voltage and the working frequency as the target working voltage and the target working frequency of the CPU; if not, then carrying out the next steps;
when the comparison result is that the CPU load is less than the CPU load lower threshold in the second DVFS table, before determining the operating voltage and the operating frequency in the group adjacent to the group as the target operating voltage and the target operating frequency of the CPU, the method further includes:
judging whether the current working voltage and the current working frequency of the CPU are the minimum working voltage and the minimum working frequency recorded in the second DVFS table; if yes, determining the current working voltage and the working frequency as the target working voltage and the target working frequency of the CPU; if not, the next steps are performed.
The embodiment of the invention discloses a device for dynamically adjusting voltage and frequency DVFS, which comprises:
the video coding device comprises an acquisition judging module, a video coding processing module and a video coding processing module, wherein the acquisition judging module is used for acquiring a video buffering utilization rate and a CPU load when the video coding processing module is in a video coding scene, and judging whether the video buffering utilization rate is greater than a set threshold value or not, wherein the video buffering utilization rate is the ratio of the storage capacity occupied by a coded video to the total storage capacity of a video annular buffer area available for coding;
the first determining module is used for determining the target working voltage and the target working frequency of the CPU according to the acquired CPU load and a first DVFS table which is determined in advance when the judgment result of the acquiring and judging module is yes;
a second determining module, configured to determine a target operating voltage and a target operating frequency of the CPU according to the acquired CPU load and a predetermined second DVFS table when the determination result of the acquiring and determining module is negative, where a CPU load lower threshold in the second DVFS table is greater than a CPU load lower threshold in the first DVFS table;
and the working module is used for working according to the determined target working voltage and target working frequency of the CPU.
Further, the apparatus further comprises:
the receiving module is used for receiving working clock setting information, wherein the working clock setting information comprises the highest frequency of a working clock of a video encoder and the highest frequency of a working clock of a double-rate synchronous dynamic random access memory DDR;
and the setting module is used for setting the working clock of the video encoder at the corresponding highest frequency and setting the working clock of the DDR at the corresponding highest frequency.
Further, the second determining module is specifically configured to compare the CPU load with a CPU load upper threshold and a CPU load lower threshold in the second DVFS table; if the CPU load is located in the range of the upper threshold value and the lower threshold value of the CPU load in the second DVFS table, determining the current working voltage and the current working frequency of the CPU as the target working voltage and the target working frequency of the CPU; and if the CPU load is not in the range of the upper CPU load threshold and the lower CPU load threshold in the second DVFS table, determining the target working voltage and the target working frequency of the CPU according to the comparison result, each group of working voltage and working frequency recorded in the second DVFS table and the current working voltage and the current working frequency of the CPU.
Further, the second determining module is specifically configured to determine, according to a group in the second DVFS table corresponding to a current operating voltage of the CPU and a current operating frequency of the CPU, an operating voltage and an operating frequency in a group adjacent to the group as a target operating voltage and a target operating frequency of the CPU, when the comparison result indicates that the CPU load is greater than a CPU load upper threshold in the second DVFS table, where the operating voltage and the operating frequency in the adjacent group are greater than the current operating voltage and the current operating frequency; and when the comparison result shows that the CPU load is smaller than the lower threshold of the CPU load in the second DVFS table, according to the group in the second DVFS table corresponding to the current working voltage and the current working frequency of the CPU, determining the working voltage and the working frequency in the group adjacent to the group as the target working voltage and the target working frequency of the CPU, wherein the working voltage and the working frequency in the adjacent group are smaller than the current working voltage and the current working frequency.
Further, the apparatus further comprises:
the judging module is used for judging whether the current working voltage and the current working frequency of the CPU are the maximum working voltage and the maximum working frequency recorded in the second DVFS table;
the second determining module is further configured to determine the current working voltage and the working frequency as a target working voltage and a target working frequency of the CPU when the determination result of the determining module is yes;
the judging module is further configured to judge whether a current working voltage and a current working frequency of the CPU are a minimum working voltage and a minimum working frequency recorded in the second DVFS table;
and the second determining module is further used for determining the current working voltage and the working frequency as the target working voltage and the target working frequency of the CPU when the judgment result of the judging module is yes.
The embodiment of the invention discloses a DVFS method and a device, wherein the method comprises the following steps: when the video coding scene is in the video coding scene, acquiring a video buffering utilization rate and a CPU load, and judging whether the video buffering utilization rate is greater than a set threshold value or not, wherein the video buffering utilization rate is the ratio of the storage capacity occupied by a coded video to the total storage capacity of a video annular buffer area available for coding; if yes, determining a target working voltage and a target working frequency of the CPU according to the acquired CPU load and a predetermined first DVFS table; if not, determining a target working voltage and a target working frequency of the CPU according to the obtained CPU load and a predetermined second DVFS table, wherein a lower threshold value of the CPU load in the second DVFS table is larger than that of the first DVFS table; and working according to the determined target working voltage and target working frequency of the CPU. In the embodiment of the present invention, when the obtained video buffer utilization rate is greater than the set threshold, the obtained load of the CPU is also greater, and the target operating voltage and the target operating frequency of the CPU may be determined by using the predetermined first DVFS table. When the acquired video buffer utilization rate is not greater than the set threshold, the acquired load of the CPU is also small and generally lies between the lower threshold of the first DVFS table and the lower threshold range of the second DVFS table, and at this time, the target operating voltage and the target operating frequency of the CPU can be determined by the predetermined second DVFS table, and the target operating voltage and the target operating frequency of the CPU determined in this way are smaller than the target operating voltage and the target operating frequency of the CPU determined only by the first DVFS table, thereby achieving the purpose of reducing power consumption.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the drawings without creative efforts.
Fig. 1 is a schematic diagram of a DVFS process provided in embodiment 1 of the present invention;
fig. 2A is a schematic diagram of video encoding according to an embodiment of the present invention;
fig. 2B is a diagram illustrating an internal architecture of an electronic device according to an embodiment of the present invention;
fig. 2C is a diagram illustrating a second DVFS table according to an embodiment of the present invention;
fig. 3 is a schematic diagram of a DVFS process according to an embodiment of the present invention;
fig. 4 is a structural diagram of a DVFS apparatus according to embodiment 1 of the present invention;
fig. 5 is a structural diagram of a DVFS apparatus according to an embodiment of the present invention.
Detailed Description
In order to enable the power consumption of a CPU to be lower when electronic equipment performs video coding, embodiments of the present invention provide a DVFS method and apparatus.
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
Example 1:
fig. 1 is a schematic diagram of a DVFS process provided in an embodiment of the present invention, where the process includes the following steps:
s101: when the video coding scene is in the video coding scene, the video buffering utilization rate and the CPU load are obtained.
S102: and judging whether the video buffering utilization rate is greater than a set threshold value, wherein the video buffering utilization rate is the ratio of the storage capacity occupied by the coded video to the total storage capacity of the video annular buffer area available for coding, if so, executing S103, and if not, executing S104.
The DVFS method provided by the embodiment of the invention can be applied to electronic equipment capable of carrying out video coding. The electronic device may be a handheld device or a non-handheld device. If the electronic device is a handheld device, it is more important to reduce the power consumption of the CPU, because the handheld device is operated by battery power, and the CPU of the handheld device has strict requirements on the life and power consumption of the battery power. No matter whether the electronic equipment is handheld equipment or not, the embodiment of the invention is not influenced.
The threshold value is stored in the electronic equipment, when the electronic equipment is in a video coding scene, the video buffering utilization rate and the CPU load can be obtained, the larger the video buffering utilization rate is, the larger the corresponding CPU load is generally, the smaller the video buffering utilization rate is, and the smaller the corresponding CPU load is generally. And the electronic equipment judges whether the video buffer utilization rate is greater than a set threshold value or not, and determines the target working voltage and the target working frequency of the CPU according to the judgment result.
When the electronic device obtains the video buffer utilization rate and the CPU load, the video buffer utilization rate and the CPU load may be obtained in real time or at set time intervals, and the obtaining of the video buffer utilization rate and the obtaining of the CPU load may be performed simultaneously or sequentially at preset time intervals and a preset obtaining sequence, for example, the preset time interval is 1s, the obtaining sequence is to obtain the video buffer utilization rate first and then obtain the CPU load, obtain the video buffer utilization rate first, and then obtain the CPU load after 1 s. The video buffering utilization rate is the ratio of the storage capacity occupied by the coded video to the total storage capacity of the video ring buffer area available for coding. The video buffering utilization may reflect the overall performance of video coding.
S103: and determining the target working voltage and the target working frequency of the CPU according to the acquired CPU load and a predetermined first DVFS table.
The electronic device stores a first DVFS table, and when it is determined that the video buffer utilization rate is greater than a set threshold, a target operating voltage and a target operating frequency of the CPU may be determined according to the acquired CPU load and the predetermined first DVFS table. The process of determining the target working voltage and the target working frequency of the CPU according to the acquired CPU load and the predetermined first DVFS table belongs to the prior art, and is not described in detail in the embodiment of the present invention.
S104: and determining a target working voltage and a target working frequency of the CPU according to the acquired CPU load and a predetermined second DVFS table, wherein a lower threshold of the CPU load in the second DVFS table is larger than that in the first DVFS table.
A second DVFS table is saved in the electronic device, and the lower threshold value of the CPU load in the second DVFS table is larger than the lower threshold value of the CPU load in the first DVFS table. When the video buffer utilization rate is judged to be not greater than the set threshold, the target working voltage and the target working frequency of the CPU can be determined according to the acquired CPU load and a predetermined second DVFS table.
S105: and working according to the determined target working voltage and target working frequency of the CPU.
After the target working voltage and the target working frequency of the CPU are determined, the electronic equipment can work according to the determined target working voltage and the determined target working frequency of the CPU.
Before S101, i.e. before the video coding scene, DVFS module initialization is also performed. The video buffering utilization mentioned in S101 and S102 above can be explained according to the video encoding diagram of fig. 2A. In the process of video coding, a video ring buffer area is used for storing a coded data stream, and a write pointer p _ write and a read pointer p _ read manage the whole video coding process, wherein an area 1, an area 2 and an area 3 in the figure form the video ring buffer area, the space occupied by the coded video is called the area 2, the space except the space occupied by the coded video in the video ring buffer area is the area 2 and the area 3, and the storage capacity occupied by the area 1, the storage capacity occupied by the area 2 and the storage capacity occupied by the area 3 form the total storage capacity of the video ring buffer area. The storage capacity occupied by the area 2 is the storage capacity occupied by the already coded video, and then the video buffer utilization rate is the ratio of the storage capacity occupied by the area 2 to the total storage capacity.
As video encoding progresses, when a write pointer writes video data, the storage capacity occupied by the area 2 will increase, and the storage capacity of the corresponding area 3 will decrease, and when a read pointer can read the written video data, the storage capacity occupied by the area 1 will increase, and the storage capacity occupied by the corresponding area 2 will decrease. Region 2 may change dynamically and may be smaller or larger. The storage capacity occupied by each area will also become larger or smaller, but the area 1, area 2 and area 3 constituting the video ring buffer area will not change, i.e. the total storage capacity of the video ring buffer area will not change. When the storage capacity occupied by the area 2 changes, the ratio of the storage capacity occupied by the area 2 to the total storage capacity also changes dynamically.
In the embodiment of the present invention, when the obtained video buffer utilization rate is greater than the set threshold, the obtained load of the CPU is also greater, and the target operating voltage and the target operating frequency of the CPU may be determined by using the predetermined first DVFS table. When the acquired video buffer utilization rate is not greater than the set threshold, the acquired load of the CPU is also small and generally lies between the lower threshold of the first DVFS table and the lower threshold range of the second DVFS table, and at this time, the target operating voltage and the target operating frequency of the CPU can be determined by the predetermined second DVFS table, and the target operating voltage and the target operating frequency of the CPU determined in this way are smaller than the target operating voltage and the target operating frequency of the CPU determined only by the first DVFS table, thereby achieving the purpose of reducing power consumption.
Example 2:
in order to reduce interference to a video coding scene and further ensure that power consumption of a CPU of an electronic device is minimized, on the basis of the foregoing embodiments, in an embodiment of the present invention, before the obtaining a video buffer utilization rate and a CPU load, the method further includes:
receiving working clock setting information, wherein the working clock setting information comprises the highest frequency of a working clock of a video encoder and the highest frequency of a working clock of a double-rate synchronous dynamic random access memory DDR;
setting the operating clock of the video encoder at a corresponding highest frequency, and setting the operating clock of the DDR at a corresponding highest frequency.
In the embodiment of the invention, for the performance of video coding, the main influence factors include the frequency of the working clock of the video coder, the frequency of the working clock of the DDR and the CPU main frequency, wherein the influence of the CPU main frequency on the performance of the video coding is small and can be ignored. When the frequency of the operating clock of the encoder and the frequency of the operating clock of the DDR are at the respective highest frequencies, there is minimal impact on the performance of the video encoding.
The electronic equipment receives working clock setting information, wherein the working clock setting information comprises the highest frequency of a working clock of a video encoder and the highest frequency of a working clock of a DDR. And setting the working clock of the video encoder at the corresponding highest frequency, and setting the working clock of the DDR at the corresponding highest frequency.
The internal architecture diagram of the electronic device performing video encoding as shown in fig. 2B includes a bus, a CPU, a video encoder, and a DDR, and the frequency of the operating clock of the video encoder and the frequency of the operating clock of the DDR can be set through the bus, and the CPU load can be acquired.
Example 3:
on the basis of the foregoing embodiments, in an embodiment of the present invention, the determining a target operating voltage and a target operating frequency of a CPU according to the acquired CPU load and a predetermined second DVFS table includes:
comparing the CPU load to an upper CPU load threshold and a lower CPU load threshold in the second DVFS table;
if the CPU load is located in the range of the upper threshold value and the lower threshold value of the CPU load in the second DVFS table, determining the current working voltage and the current working frequency of the CPU as the target working voltage and the target working frequency of the CPU;
and if the CPU load is not in the range of the upper CPU load threshold and the lower CPU load threshold in the second DVFS table, determining the target working voltage and the target working frequency of the CPU according to the comparison result, each group of working voltage and working frequency recorded in the second DVFS table and the current working voltage and the current working frequency of the CPU.
In the embodiment of the present invention, when determining the target operating voltage and the target operating frequency of the CPU according to the acquired CPU load and the predetermined second DVFS table, specifically, the acquired CPU load may be compared with a CPU load upper threshold and a CPU load lower threshold in the second DVFS table, and if the comparison result indicates that the CPU load is located in the range of the CPU load upper threshold and the CPU load lower threshold in the second DVFS table, it indicates that the operating voltage and the operating frequency at this time are the better operating voltage and the operating frequency of the electronic device, and then the current operating voltage and the current operating frequency of the CPU are determined as the target operating voltage and the target operating frequency of the CPU.
If the CPU load is not within the upper CPU load threshold and the lower CPU load threshold in the second DVFS table, the target operating voltage and the target operating frequency of the CPU may be determined according to the comparison result, each set of operating voltage and operating frequency recorded in the second DVFS table, and the current operating voltage and the current operating frequency of the CPU.
When determining the target operating voltage and the target operating frequency of the CPU according to the comparison result, each set of operating voltage and operating frequency recorded in the second DVFS table, and the current operating voltage and the current operating frequency of the CPU, the following steps may be performed:
and when the comparison result shows that the CPU load is greater than the upper threshold of the CPU load in the second DVFS table, determining the working voltage and the working frequency which are recorded in the second DVFS table and are greater than the current working voltage and the current working frequency as the target working voltage and the target working frequency of the CPU. The determined group in the second DVFS table corresponding to the target operating voltage and the target operating frequency of the CPU and the group in the second DVFS table corresponding to the current operating voltage and the current operating frequency may be adjacent or non-adjacent.
And when the comparison result shows that the CPU load is smaller than the lower threshold of the CPU load in the second DVFS table, determining the working voltage and the working frequency which are recorded in the second DVFS table and are smaller than the current working voltage and the current working frequency as the target working voltage and the target working frequency. The determined group in the second DVFS table corresponding to the target operating voltage and the target operating frequency of the CPU and the group in the second DVFS table corresponding to the current operating voltage and the current operating frequency may be adjacent or non-adjacent.
Example 4:
in order to ensure that the determined target operating voltage and target operating frequency of the CPU are the optimal power consumption of the electronic device, on the basis of the foregoing embodiments, in an embodiment of the present invention, the determining the target operating voltage and target operating frequency of the CPU according to each set of operating voltage and operating frequency and the current operating voltage and current operating frequency of the CPU recorded in the second DVFS table and the comparison result includes:
when the comparison result shows that the CPU load is greater than the upper threshold of the CPU load in the second DVFS table, according to a group in the second DVFS table corresponding to the current working voltage and the current working frequency of the CPU, determining the working voltage and the working frequency in a group adjacent to the group as the target working voltage and the target working frequency of the CPU, wherein the working voltage and the working frequency in the adjacent group are greater than the current working voltage and the current working frequency;
and when the comparison result shows that the CPU load is smaller than the lower threshold of the CPU load in the second DVFS table, according to the group in the second DVFS table corresponding to the current working voltage and the current working frequency of the CPU, determining the working voltage and the working frequency in the group adjacent to the group as the target working voltage and the target working frequency of the CPU, wherein the working voltage and the working frequency in the adjacent group are smaller than the current working voltage and the current working frequency.
In an embodiment of the present invention, before determining the operating voltage and the operating frequency in the group adjacent to the group as the target operating voltage and the target operating frequency of the CPU when the comparison result indicates that the CPU load is greater than the upper CPU load threshold in the second DVFS table, the method further includes:
judging whether the current working voltage and the current working frequency of the CPU are the maximum working voltage and the maximum working frequency recorded in the second DVFS table; if yes, determining the current working voltage and the working frequency as the target working voltage and the target working frequency of the CPU; if not, the next steps are performed.
In the embodiment of the present invention, the second DVFS table includes at least one set of operating voltage and operating frequency, and when the current operating voltage and the current operating frequency of the CPU are the maximum operating voltage and the maximum operating frequency recorded in the second DVFS table, it indicates that the current operating voltage and the current operating frequency of the electronic device have been adjusted to the maximum values, and the target operating voltage and the target operating frequency of the CPU cannot be adjusted to be larger any more, so the current operating voltage and the current operating frequency of the CPU are determined to be the target operating voltage and the target operating frequency of the CPU. If the current operating voltage and the current operating frequency of the CPU are not the maximum operating voltage and the maximum operating frequency recorded in the second DVFS table, the operating voltage and the operating frequency in a group adjacent to the group may be determined as the target operating voltage and the target operating frequency of the CPU according to the group in the second DVFS table corresponding to the current operating voltage and the current operating frequency of the CPU, where the operating voltage and the operating frequency in the adjacent group are greater than the current operating voltage and the current operating frequency.
In this embodiment of the present invention, when the comparison result indicates that the CPU load is less than the CPU load lower threshold in the second DVFS table, before determining the operating voltage and the operating frequency in the group adjacent to the group as the target operating voltage and the target operating frequency of the CPU, the method further includes:
judging whether the current working voltage and the current working frequency of the CPU are the minimum working voltage and the minimum working frequency recorded in the second DVFS table; if yes, determining the current working voltage and the working frequency as the target working voltage and the target working frequency of the CPU; if not, the next steps are performed.
In this embodiment of the present invention, the second DVFS table includes at least one set of operating voltage and operating frequency, and when the current operating voltage and the current operating frequency of the CPU are the minimum operating voltage and the minimum operating frequency recorded in the second DVFS table, it indicates that the current operating voltage and the current operating frequency of the electronic device have been adjusted to the minimum values, and the target operating voltage and the target operating frequency of the CPU cannot be adjusted to be smaller any more, so the current operating voltage and the current operating frequency of the CPU are determined to be the target operating voltage and the target operating frequency of the CPU. If the current operating voltage and the current operating frequency of the CPU are not the recorded minimum operating voltage and minimum operating frequency in the second DVFS table, the operating voltage and operating frequency in a group adjacent to the group may be determined as the target operating voltage and target operating frequency of the CPU according to the group in the second DVFS table corresponding to the current operating voltage and the current operating frequency of the CPU, where the operating voltage and operating frequency in the adjacent group are smaller than the current operating voltage and current operating frequency.
As shown in fig. 2C, the upper CPU threshold is 80% and the lower CPU threshold is 45%, and each set of operating voltage and operating frequency is recorded in the second DVFS table, for example, an operating frequency of 1300000Hz and an operating voltage of 1.25V are a set, an operating frequency of 1200000Hz and an operating voltage of 1.23V are a set, an operating frequency of 1100000Hz and an operating voltage of 1.20V are a set, an operating frequency of 1000000Hz and an operating voltage of 1.15V are a set, and an operating frequency of 800000Hz and an operating voltage of 1.10V are a set. When the target working voltage and the target working frequency of the CPU are determined according to the second DVFS table, the current working voltage and the current working frequency of the CPU are determined firstly, and the obtained CPU load is compared with the upper threshold value and the lower threshold value of the CPU load in the second DVFS table.
If the CPU load is within the upper CPU load threshold and the lower CPU load threshold in the second DVFS table, determining the current operating voltage and the current operating frequency of the CPU as the target operating voltage and the target operating frequency of the CPU, for example, if the current operating voltage is 1.20V, the current operating frequency is 1100000Hz, and the CPU load is 50%, that is, the target operating voltage of the CPU is 1.20V, and the target operating frequency is 1100000 Hz.
If the CPU load is smaller than the lower threshold of the CPU load in the second DVFS table, judging whether the current working voltage and the current working frequency of the CPU are the minimum working voltage and the minimum working frequency recorded in the second DVFS table; if yes, determining the current working voltage and the working frequency as the target working voltage and the target working frequency of the CPU; if not, according to the group in the second DVFS table corresponding to the current working voltage of the CPU and the current working frequency of the CPU, determining the working voltage and the working frequency in the group adjacent to the group as the target working voltage and the target working frequency of the CPU, wherein the working voltage and the working frequency in the adjacent group are smaller than the current working voltage and the current working frequency. For example, if the CPU load is 40%, the current operating voltage of the CPU is 1.20V, the current operating frequency is 1100000Hz, and the current operating voltage and the current operating frequency are not the minimum operating voltage and the minimum operating frequency recorded in the second DVFS table, it is determined that the current operating voltage is 1.20V and the current operating frequency is a group corresponding to 1100000Hz, and the operating voltage and the operating frequency of a group adjacent to the group and having a higher operating voltage and operating frequency than those of the current operating voltage and the current operating frequency are determined as the target operating voltage and the target operating frequency of the CPU, and then the target operating voltage is 1.15V and the target operating frequency is 1000000 Hz. For example, if the CPU load is 40%, the current operating voltage of the CPU is 1.10V, the current operating frequency is 800000Hz, and the current operating voltage and the current operating frequency are the minimum operating voltage and the minimum operating frequency recorded in the second DVFS table, the current operating voltage and the current operating frequency of the CPU are determined as the target operating voltage and the target operating frequency of the CPU, and the target operating voltage is 1.15V, and the target operating frequency is 1000000 Hz.
If the CPU load is larger than the upper threshold of the CPU load in the second DVFS table, judging whether the current working voltage and the current working frequency of the CPU are the maximum working voltage and the maximum working frequency recorded in the second DVFS table; if yes, determining the current working voltage and the working frequency as the target working voltage and the target working frequency of the CPU; if not, determining the working voltage and the working frequency in the group adjacent to the group as the target working voltage and the target working frequency of the CPU according to the group in the second DVFS table corresponding to the current working voltage and the current working frequency of the CPU, wherein the working voltage and the working frequency in the adjacent group are larger than the current working voltage and the current working frequency. For example, if the CPU load is 90%, the current operating voltage of the CPU is 1.20V, the current operating frequency is 1100000Hz, and the current operating voltage and the current operating frequency are not the maximum operating voltage and the maximum operating frequency recorded in the second DVFS table, it is determined that the current operating voltage is 1.20V and the current operating frequency is a group corresponding to 1100000Hz, and the operating voltage and the operating frequency of a group adjacent to the group and having a greater operating voltage and operating frequency than the current operating voltage and the current operating frequency are determined as the target operating voltage and the target operating frequency of the CPU, and then the target operating voltage is 1.20V and the target operating frequency is 1100000 Hz. For example, if the CPU load is 90%, the current operating voltage of the CPU is 1.25V, and the current operating frequency is 1300000Hz, and the current operating voltage and the current operating frequency are the maximum operating voltage and the maximum operating frequency recorded in the second DVFS table, the current operating voltage and the current operating frequency of the CPU are determined as the target operating voltage and the target operating frequency of the CPU, and the target operating voltage is 1.25V, and the target operating frequency is 1300000 Hz.
Fig. 3 is a schematic diagram of a DVFS process provided in an embodiment of the present invention, where the process includes the following steps:
s301: receiving working clock setting information, wherein the working clock setting information comprises the highest frequency of a working clock of a video encoder and the highest frequency of a working clock of a DDR, setting the working clock of the video encoder on the corresponding highest frequency, and setting the working clock of the DDR on the corresponding highest frequency.
S302: when the video coding scene is in, acquiring a video buffering utilization rate and a CPU load, and judging whether the video buffering utilization rate is greater than a set threshold, wherein the video buffering utilization rate is the ratio of the storage capacity occupied by the coded video to the total storage capacity of a video annular buffer area available for coding, if so, executing S303, and if not, executing S304.
S303: and determining the target working voltage and the target working frequency of the CPU according to the acquired CPU load and a predetermined first DVFS table.
S304: comparing the sizes of the CPU load with the upper CPU load threshold and the lower CPU load threshold in the second DVFS table, if the CPU load is within the range of the upper CPU load threshold and the lower CPU load threshold in the second DVFS table, executing S305, if the CPU load is greater than the upper CPU load threshold in the second DVFS table, executing S306, and if the CPU load is less than the lower CPU load threshold in the second DVFS table, executing S307.
S305: and determining the current working voltage and the current working frequency of the CPU as the target working voltage and the target working frequency of the CPU.
S306: and judging whether the current working voltage and the current working frequency of the CPU are the maximum working voltage and the maximum working frequency recorded in the second DVFS table, if so, executing S305, and if not, executing S308.
S307: and judging whether the current working voltage and the current working frequency of the CPU are the minimum working voltage and the minimum working frequency recorded in the second DVFS table, if so, executing S305, and if not, executing S309.
S308: and determining the working voltage and the working frequency in the group adjacent to the group as the target working voltage and the target working frequency of the CPU according to the group in the second DVFS table corresponding to the current working voltage and the current working frequency of the CPU, wherein the working voltage and the working frequency in the adjacent group are larger than the current working voltage and the current working frequency.
S309: and determining the working voltage and the working frequency in the group adjacent to the group as the target working voltage and the target working frequency of the CPU according to the group in the second DVFS table corresponding to the current working voltage and the current working frequency of the CPU, wherein the working voltage and the working frequency in the adjacent group are smaller than the current working voltage and the current working frequency.
S310: and working according to the determined target working voltage and target working frequency of the CPU.
Fig. 4 is a structural diagram of a DVFS apparatus according to embodiment 1 of the present invention, where the apparatus includes:
an obtaining and judging module 41, configured to obtain a video buffer utilization rate and a CPU load when a video coding scene is located, and judge whether the video buffer utilization rate is greater than a set threshold, where the video buffer utilization rate is a ratio of a storage capacity occupied by a coded video to a total storage capacity of a video ring buffer area available for coding;
a first determining module 42, configured to determine a target operating voltage and a target operating frequency of the CPU according to the acquired CPU load and a predetermined first DVFS table when the determination result of the acquiring determining module is yes;
a second determining module 43, configured to determine a target operating voltage and a target operating frequency of the CPU according to the acquired CPU load and a predetermined second DVFS table when the determination result of the acquiring determining module is negative, where a CPU load lower threshold in the second DVFS table is greater than a CPU load lower threshold in the first DVFS table;
and the working module 44 is used for working according to the determined target working voltage and target working frequency of the CPU.
Fig. 5 is a structural diagram of a DVFS apparatus according to an embodiment of the present invention, and based on fig. 4, the apparatus further includes:
the receiving module 51 is configured to receive working clock setting information, where the working clock setting information includes a highest frequency of a working clock of a video encoder and a highest frequency of a working clock of a double-rate synchronous dynamic random access memory DDR;
a setting module 52, configured to set the operating clock of the video encoder at the corresponding highest frequency, and set the operating clock of the DDR at the corresponding highest frequency.
The second determining module 43 is specifically configured to compare the CPU load with a CPU load upper threshold and a CPU load lower threshold in the second DVFS table; if the CPU load is located in the range of the upper threshold value and the lower threshold value of the CPU load in the second DVFS table, determining the current working voltage and the current working frequency of the CPU as the target working voltage and the target working frequency of the CPU; and if the CPU load is not in the range of the upper CPU load threshold and the lower CPU load threshold in the second DVFS table, determining the target working voltage and the target working frequency of the CPU according to the comparison result, each group of working voltage and working frequency recorded in the second DVFS table and the current working voltage and the current working frequency of the CPU.
The second determining module 43 is specifically configured to, when the comparison result indicates that the CPU load is greater than the upper CPU load threshold in the second DVFS table, determine, according to a group in the second DVFS table corresponding to the current operating voltage and the current operating frequency of the CPU, an operating voltage and an operating frequency in a group adjacent to the group as a target operating voltage and a target operating frequency of the CPU, where the operating voltage and the operating frequency in the adjacent group are greater than the current operating voltage and the current operating frequency; and when the comparison result shows that the CPU load is smaller than the lower threshold of the CPU load in the second DVFS table, according to the group in the second DVFS table corresponding to the current working voltage and the current working frequency of the CPU, determining the working voltage and the working frequency in the group adjacent to the group as the target working voltage and the target working frequency of the CPU, wherein the working voltage and the working frequency in the adjacent group are smaller than the current working voltage and the current working frequency.
The device further comprises:
a judging module 53, configured to judge whether a current operating voltage and a current operating frequency of the CPU are the maximum operating voltage and the maximum operating frequency recorded in the second DVFS table;
the second determining module 43 is further configured to determine the current working voltage and the working frequency as the target working voltage and the target working frequency of the CPU when the determination result of the determining module is yes;
the determining module 53 is further configured to determine whether the current operating voltage and the current operating frequency of the CPU are the minimum operating voltage and the minimum operating frequency recorded in the second DVFS table;
the second determining module 43 is further configured to determine the current operating voltage and the operating frequency as the target operating voltage and the target operating frequency of the CPU when the determination result of the determining module is yes.
The embodiment of the invention discloses a DVFS method and a device, wherein the method comprises the following steps: when the video coding scene is in the video coding scene, acquiring a video buffering utilization rate and a CPU load, and judging whether the video buffering utilization rate is greater than a set threshold value or not, wherein the video buffering utilization rate is the ratio of the storage capacity occupied by a coded video to the total storage capacity of a video annular buffer area available for coding; if yes, determining a target working voltage and a target working frequency of the CPU according to the acquired CPU load and a predetermined first DVFS table; if not, determining a target working voltage and a target working frequency of the CPU according to the obtained CPU load and a predetermined second DVFS table, wherein a lower threshold value of the CPU load in the second DVFS table is larger than that of the first DVFS table; and working according to the determined target working voltage and target working frequency of the CPU. In the embodiment of the present invention, when the obtained video buffer utilization rate is greater than the set threshold, the obtained load of the CPU is also greater, and the target operating voltage and the target operating frequency of the CPU may be determined by using the predetermined first DVFS table. When the acquired video buffer utilization rate is not greater than the set threshold, the acquired load of the CPU is also small and generally lies between the lower threshold of the first DVFS table and the lower threshold range of the second DVFS table, and at this time, the target operating voltage and the target operating frequency of the CPU can be determined by the predetermined second DVFS table, and the target operating voltage and the target operating frequency of the CPU determined in this way are smaller than the target operating voltage and the target operating frequency of the CPU determined only by the first DVFS table, thereby achieving the purpose of reducing power consumption.
For the system/apparatus embodiments, since they are substantially similar to the method embodiments, the description is relatively simple, and reference may be made to some descriptions of the method embodiments for relevant points.
It is to be noted that, in this document, relational terms such as first and second, and the like are used solely to distinguish one entity or operation from another entity or operation without necessarily requiring or implying any actual such relationship or order between such entities or operations.
As will be appreciated by one skilled in the art, embodiments of the present application may be provided as a method, system, or computer program product. Accordingly, the present application may take the form of an entirely hardware embodiment, an entirely application embodiment, or an embodiment combining application and hardware aspects. Furthermore, the present application may take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, and the like) having computer-usable program code embodied therein.
The present application is described with reference to flowchart illustrations and/or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of the application. It will be understood that each flow and/or block of the flow diagrams and/or block diagrams, and combinations of flows and/or blocks in the flow diagrams and/or block diagrams, can be implemented by computer program instructions. These computer program instructions may be provided to a processor of a general purpose computer, special purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be stored in a computer-readable memory that can direct a computer or other programmable data processing apparatus to function in a particular manner, such that the instructions stored in the computer-readable memory produce an article of manufacture including instruction means which implement the function specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer implemented process such that the instructions which execute on the computer or other programmable apparatus provide steps for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
While the preferred embodiments of the present application have been described, additional variations and modifications in those embodiments may occur to those skilled in the art once they learn of the basic inventive concepts. Therefore, it is intended that the appended claims be interpreted as including preferred embodiments and all alterations and modifications as fall within the scope of the application.
It will be apparent to those skilled in the art that various changes and modifications may be made in the present application without departing from the spirit and scope of the application. Thus, if such modifications and variations of the present application fall within the scope of the claims of the present application and their equivalents, the present application is intended to include such modifications and variations as well.
Claims (10)
1. A method for dynamic voltage frequency scaling DVFS, the method comprising:
when the video coding scene is in the video coding scene, acquiring a video buffering utilization rate and a CPU load, and judging whether the video buffering utilization rate is greater than a set threshold value or not, wherein the video buffering utilization rate is the ratio of the storage capacity occupied by a coded video to the total storage capacity of a video annular buffer area available for coding;
if yes, determining a target working voltage and a target working frequency of the CPU according to the acquired CPU load and a predetermined first DVFS table;
if not, determining a target working voltage and a target working frequency of the CPU according to the obtained CPU load and a predetermined second DVFS table, wherein a lower threshold value of the CPU load in the second DVFS table is larger than that of the first DVFS table;
and working according to the determined target working voltage and target working frequency of the CPU.
2. The method of claim 1, wherein prior to said obtaining video buffer utilization and CPU load, the method further comprises:
receiving working clock setting information, wherein the working clock setting information comprises the highest frequency of a working clock of a video encoder and the highest frequency of a working clock of a double-rate synchronous dynamic random access memory DDR;
setting the operating clock of the video encoder at a corresponding highest frequency, and setting the operating clock of the DDR at a corresponding highest frequency.
3. The method of claim 1, wherein determining a target operating voltage and a target operating frequency of a CPU based on the obtained CPU load and a predetermined second DVFS table comprises:
comparing the CPU load to an upper CPU load threshold and a lower CPU load threshold in the second DVFS table;
if the CPU load is located in the range of the upper threshold value and the lower threshold value of the CPU load in the second DVFS table, determining the current working voltage and the current working frequency of the CPU as the target working voltage and the target working frequency of the CPU;
and if the CPU load is not in the range of the upper CPU load threshold and the lower CPU load threshold in the second DVFS table, determining the target working voltage and the target working frequency of the CPU according to the comparison result, each group of working voltage and working frequency recorded in the second DVFS table and the current working voltage and the current working frequency of the CPU.
4. The method of claim 3, wherein determining the target operating voltage and the target operating frequency of the CPU according to the comparison result, each set of operating voltage and operating frequency recorded in the second DVFS table, and the current operating voltage and the current operating frequency of the CPU comprises:
when the comparison result shows that the CPU load is greater than the upper threshold of the CPU load in the second DVFS table, according to a group in the second DVFS table corresponding to the current working voltage and the current working frequency of the CPU, determining the working voltage and the working frequency in a group adjacent to the group as the target working voltage and the target working frequency of the CPU, wherein the working voltage and the working frequency in the adjacent group are greater than the current working voltage and the current working frequency;
and when the comparison result shows that the CPU load is smaller than the lower threshold of the CPU load in the second DVFS table, according to the group in the second DVFS table corresponding to the current working voltage and the current working frequency of the CPU, determining the working voltage and the working frequency in the group adjacent to the group as the target working voltage and the target working frequency of the CPU, wherein the working voltage and the working frequency in the adjacent group are smaller than the current working voltage and the current working frequency.
5. The method of claim 4, wherein before determining the operating voltage and the operating frequency in the group adjacent to the group as the target operating voltage and the target operating frequency of the CPU when the comparison result is that the CPU load is greater than the upper CPU load threshold in the second DVFS table, the method further comprises:
judging whether the current working voltage and the current working frequency of the CPU are the maximum working voltage and the maximum working frequency recorded in the second DVFS table; if yes, determining the current working voltage and the working frequency as the target working voltage and the target working frequency of the CPU; if not, then carrying out the next steps;
when the comparison result is that the CPU load is less than the CPU load lower threshold in the second DVFS table, before determining the operating voltage and the operating frequency in the group adjacent to the group as the target operating voltage and the target operating frequency of the CPU, the method further includes:
judging whether the current working voltage and the current working frequency of the CPU are the minimum working voltage and the minimum working frequency recorded in the second DVFS table; if yes, determining the current working voltage and the working frequency as the target working voltage and the target working frequency of the CPU; if not, the next steps are performed.
6. A dynamic voltage frequency scaling DVFS apparatus, comprising:
the video coding device comprises an acquisition judging module, a video coding processing module and a video coding processing module, wherein the acquisition judging module is used for acquiring a video buffering utilization rate and a CPU load when the video coding processing module is in a video coding scene, and judging whether the video buffering utilization rate is greater than a set threshold value or not, wherein the video buffering utilization rate is the ratio of the storage capacity occupied by a coded video to the total storage capacity of a video annular buffer area available for coding;
the first determining module is used for determining the target working voltage and the target working frequency of the CPU according to the acquired CPU load and a first DVFS table which is determined in advance when the judgment result of the acquiring and judging module is yes;
a second determining module, configured to determine a target operating voltage and a target operating frequency of the CPU according to the acquired CPU load and a predetermined second DVFS table when the determination result of the acquiring and determining module is negative, where a CPU load lower threshold in the second DVFS table is greater than a CPU load lower threshold in the first DVFS table;
and the working module is used for working according to the determined target working voltage and target working frequency of the CPU.
7. The apparatus of claim 6, wherein the apparatus further comprises:
the receiving module is used for receiving working clock setting information, wherein the working clock setting information comprises the highest frequency of a working clock of a video encoder and the highest frequency of a working clock of a double-rate synchronous dynamic random access memory DDR;
and the setting module is used for setting the working clock of the video encoder at the corresponding highest frequency and setting the working clock of the DDR at the corresponding highest frequency.
8. The apparatus according to claim 6, wherein the second determining module is specifically configured to compare the CPU load with an upper CPU load threshold and a lower CPU load threshold in the second DVFS table; if the CPU load is located in the range of the upper threshold value and the lower threshold value of the CPU load in the second DVFS table, determining the current working voltage and the current working frequency of the CPU as the target working voltage and the target working frequency of the CPU; and if the CPU load is not in the range of the upper CPU load threshold and the lower CPU load threshold in the second DVFS table, determining the target working voltage and the target working frequency of the CPU according to the comparison result, each group of working voltage and working frequency recorded in the second DVFS table and the current working voltage and the current working frequency of the CPU.
9. The apparatus according to claim 8, wherein the second determining module is specifically configured to determine, according to a group in the second DVFS table corresponding to a current operating voltage and a current operating frequency of the CPU, an operating voltage and an operating frequency in a group adjacent to the group as a target operating voltage and a target operating frequency of the CPU, when the comparison result indicates that the CPU load is greater than a CPU load upper threshold in the second DVFS table, where the operating voltage and the operating frequency in the adjacent group are greater than the current operating voltage and the current operating frequency; and when the comparison result shows that the CPU load is smaller than the lower threshold of the CPU load in the second DVFS table, according to the group in the second DVFS table corresponding to the current working voltage and the current working frequency of the CPU, determining the working voltage and the working frequency in the group adjacent to the group as the target working voltage and the target working frequency of the CPU, wherein the working voltage and the working frequency in the adjacent group are smaller than the current working voltage and the current working frequency.
10. The apparatus of claim 9, wherein the apparatus further comprises:
the judging module is used for judging whether the current working voltage and the current working frequency of the CPU are the maximum working voltage and the maximum working frequency recorded in the second DVFS table;
the second determining module is further configured to determine the current working voltage and the working frequency as a target working voltage and a target working frequency of the CPU when the determination result of the determining module is yes;
the judging module is further configured to judge whether a current working voltage and a current working frequency of the CPU are a minimum working voltage and a minimum working frequency recorded in the second DVFS table;
and the second determining module is further used for determining the current working voltage and the working frequency as the target working voltage and the target working frequency of the CPU when the judgment result of the judging module is yes.
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Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101312519A (en) * | 2008-07-04 | 2008-11-26 | 深圳华为通信技术有限公司 | Data frame processing method and apparatus |
CN103596045A (en) * | 2012-08-14 | 2014-02-19 | 上海海德数据科技有限公司 | An energy-saving control method for a video code stream playing terminal |
CN104604241A (en) * | 2012-07-09 | 2015-05-06 | Vid拓展公司 | Power aware video decoding and streaming |
Family Cites Families (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
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CN101150698B (en) * | 2007-09-04 | 2010-06-02 | 浙江大学 | Dynamic voltage adjustment and frequency modulation energy-saving method applicable to MP4 palm video playing device |
US8171187B2 (en) * | 2008-07-25 | 2012-05-01 | Freescale Semiconductor, Inc. | System and method for arbitrating between memory access requests |
KR101991682B1 (en) * | 2012-08-29 | 2019-06-21 | 삼성전자 주식회사 | A DVFS controlling method and A System-on Chip using thereof |
US20150350656A1 (en) * | 2014-05-30 | 2015-12-03 | Qualcomm Innovation Center, Inc. | Dynamic video core clock and voltage scaling |
-
2017
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Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101312519A (en) * | 2008-07-04 | 2008-11-26 | 深圳华为通信技术有限公司 | Data frame processing method and apparatus |
CN104604241A (en) * | 2012-07-09 | 2015-05-06 | Vid拓展公司 | Power aware video decoding and streaming |
KR101692516B1 (en) * | 2012-07-09 | 2017-01-03 | 브이아이디 스케일, 인크. | Power aware video decoding and streaming |
CN103596045A (en) * | 2012-08-14 | 2014-02-19 | 上海海德数据科技有限公司 | An energy-saving control method for a video code stream playing terminal |
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