CN107241155A - A kind of adaptive clock recovery method and device - Google Patents
A kind of adaptive clock recovery method and device Download PDFInfo
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- CN107241155A CN107241155A CN201610182482.6A CN201610182482A CN107241155A CN 107241155 A CN107241155 A CN 107241155A CN 201610182482 A CN201610182482 A CN 201610182482A CN 107241155 A CN107241155 A CN 107241155A
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04J—MULTIPLEX COMMUNICATION
- H04J3/00—Time-division multiplex systems
- H04J3/02—Details
- H04J3/06—Synchronising arrangements
- H04J3/0635—Clock or time synchronisation in a network
- H04J3/0638—Clock or time synchronisation among nodes; Internode synchronisation
- H04J3/0658—Clock or time synchronisation among packet nodes
- H04J3/0661—Clock or time synchronisation among packet nodes using timestamps
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04J—MULTIPLEX COMMUNICATION
- H04J3/00—Time-division multiplex systems
- H04J3/02—Details
- H04J3/06—Synchronising arrangements
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Abstract
The invention discloses a kind of adaptive clock recovery method, including：Detect in any buffering area and whether be filled with time stamp data, the time stamp data includes sequence number and timestamp；If being filled with time stamp data, each time stamp data in buffering area is obtained, and the time stamp data of acquisition is modified so that the sequence number of each time stamp data is arranged according to predetermined interval, timestamp is arranged according to time order and function order；Adaptive clock recovery is carried out according to correction result.Pass through the implementation of the present invention, during adaptive clock recovery is carried out, by being modified to abnormal time stamp data, preferable time stamp data will not be modified to according to the time stamp data of setting rule compositor, so as to reduce the error of clock recovery, the efficiency and stability of clock recovery are improved.In addition, present invention also offers a kind of adaptive clock recovery device, will be realized originally by hard-wired adaptive clock recovery function by the device come complete, and so as to reduce the demand to hardware, improve the flexibility ratio of design.
Description
Technical field
The present invention relates to communication technical field, more particularly to a kind of adaptive clock recovery method and device.
Background technology
For TDM (Time Division Multiplexing, time division multiplexing) business, a variety of industry can be configured
Be engaged in clock module, including system clock, differential clocks and self-adaptation clock, and to clock synchronization requirement compared with
It is high.Self-adaptation clock pattern, can be according to the time stamp number that message is received in communication network without necessarily referring to clock
According to adaptively recovered clock, the synchronization of networking clock is reached.
It is by TDM business in current PTN (Packet Transport Network, Packet Transport Network) equipment
Data after the packing forms encapsulation of Ethernet service using being transmitted, and it is using certain chip or is based on
NIOS systems (embeded processor) framework realizes adaptive clock recovery function, the whole realization function
Module can all be loaded into specific chip or FPGA (Field Programmable Gate Array, it is existing
Field programmable gate array) in, the integrated soft kernel function on FPGA passes through the configuration of software and hardware
Handle to recover self-adaptation clock, specifically, software coordinates the processing requirement of hardware using the mode interrupted to determine
When by information transfers such as fiducial time accumulated value and time stamp datas to hardware, it is then by hardware that timestamp value is extensive again
Answer into clock signal.
But such processing mode needs to expend many hardware resources, and the requirement to hardware is also of a relatively high, together
When, by the way of interruption the design of whole board software can be caused to be restricted, so that market can not be adapted to
Demand.In addition, during adaptive clock recovery is carried out, because network failure, Network Packet Loss, hard
The problems such as part unstability so that mistake occurs in data during transmission or storage, and existing
Adaptive clock recovery mode to the abnormal time stamp data in message due to that can not be modified, so that when influenceing
The Stability and veracity that clock recovers, operation efficiency during reduction clock recovery.
The content of the invention
The main technical problem to be solved in the present invention is to provide a kind of adaptive clock recovery method and device,
To solve in the prior art not carrying out the abnormal time stamp data in message when carrying out adaptive clock recovery
Amendment, so that the Stability and veracity of clock recovery is influenceed, the skill of operation efficiency during reduction clock recovery
Art problem.
In order to solve the above technical problems, the present invention provides a kind of adaptive clock recovery method, including：
Detect and time stamp data whether is filled with any buffering area, the time stamp data includes sequence number and timestamp；
If being filled with time stamp data, each time stamp data in the buffering area is obtained；
The time stamp data of acquisition is modified so that the sequence number of each time stamp data arranged according to predetermined interval,
Timestamp is arranged according to time order and function order；
Adaptive clock recovery is carried out according to correction result.
In an embodiment of the present invention, described pair acquisition time stamp data be modified including：
Judge whether the sequence number of each time stamp data in the buffering area arranges according to predetermined interval；
If not arranged according to predetermined interval, the time stamp data not arranged according to predetermined interval is modified.
In an embodiment of the present invention, to the time stamp data that is not arranged according to predetermined interval as follows
It is modified：
The sequence number of the sequence number of latter time stamp data=previous time stamp data+sequence number difference；
Timestamp+message time delay of the timestamp of latter time stamp data=previous time stamp data；
According to above-mentioned correcting mode, follow-up time stamp data is modified successively.
It is described to be specially according to correction result progress adaptive clock recovery in an embodiment of the present invention：
The time stamp data that timestamp is most concentrated is obtained according to correction result；
The time stamp data of acquisition is subjected to adaptive clock recovery.
It is described to be specially according to correction result progress adaptive clock recovery in an embodiment of the present invention：
Frequency Dividing Factor will be calculated according to correction result；
Adaptive clock recovery is carried out according to the Frequency Dividing Factor.
In an embodiment of the present invention, before whether being filled with time stamp data in any buffering area of detection
Also include：
When detecting the TDM service of either port configuration self-adaptation clock pattern, when enabling adaptive
Clock recovers function.
The present invention also one provides a kind of adaptive clock recovery device, including：
Buffer detection module, for detecting time stamp data whether is filled with any buffering area, the time stamp number
According to including sequence number and timestamp；
Acquisition module, if for being filled with time stamp data, obtaining each time stamp data in the buffering area；
Correcting module, for the time stamp data to acquisition be modified cause each time stamp data sequence number according to
Predetermined interval arrangement, timestamp are arranged according to time order and function order；
Recovery module, for carrying out adaptive clock recovery according to correction result.
In an embodiment of the present invention, the correcting module includes：
Judging submodule, for judging the sequence number of each time stamp data in the buffering area whether according between default
Every arrangement；
Submodule is corrected, if for not arranged according to predetermined interval, to the time stamp not arranged according to predetermined interval
Data are modified.
In an embodiment of the present invention, to the time stamp data that is not arranged according to predetermined interval in such a way
It is modified：
The sequence number of the sequence number of latter time stamp data=previous time stamp data+sequence number difference；
Timestamp+message time delay of the timestamp of latter time stamp data=previous time stamp data；
According to above-mentioned correcting mode, follow-up time stamp data is modified successively.
In an embodiment of the present invention, the recovery module includes：
Acquisition submodule, for obtaining one group of time stamp data that timestamp is most concentrated according to correction result；
Recover submodule, for the time stamp data of acquisition to be carried out into adaptive clock recovery.
In an embodiment of the present invention, the recovery module includes：
Computing submodule, for calculating Frequency Dividing Factor according to correction result；
Recover submodule, for carrying out adaptive clock recovery according to the Frequency Dividing Factor.
In an embodiment of the present invention, in addition to：
Business detection module, for before whether time stamp data is filled with detecting any buffering area, working as detection
When configuring the TDM service of self-adaptation clock pattern to either port, adaptive clock recovery function is enabled.
The beneficial effects of the invention are as follows：
The invention provides a kind of adaptive clock recovery method, including：Detect in any buffering area whether deposit
Full time stamp data, the time stamp data includes sequence number and timestamp；If being filled with time stamp data, buffering is obtained
Each time stamp data in area, and the time stamp data of acquisition is modified cause the sequence number of each time stamp data by
Arranged according to predetermined interval arrangement, timestamp according to time order and function order；When carrying out adaptive according to correction result
Clock recovers.By the present invention implementation, carry out adaptive clock recovery during, by it is abnormal when
Stamp data are modified, and will not be modified to preferable time stamp data according to the time stamp data of setting rule compositor,
The stability of clock recovery is also improved while improving clock recovery efficiency.
Present invention also offers a kind of adaptive clock recovery device, will originally by it is hard-wired adaptive when
Clock recovers function and realized by the device come complete, so as to reduce the demand to hardware, is not take up extra hardware
Resource improves the flexibility ratio of design to reduce equipment cost.
Brief description of the drawings
Fig. 1 is a kind of adaptive clock recovery method flow diagram that the embodiment of the present invention one is provided；
Self-adaptation clock is to TDM business recovery mistakes in the PTN network that Fig. 2 provides for the embodiment of the present invention one
Journey schematic diagram；
Fig. 3 is a kind of flow chart for enabling adaptive clock recovery function that the embodiment of the present invention one is provided；
Fig. 4 is a kind of adaptive clock recovery schematic device that the embodiment of the present invention two is provided.
Embodiment
The present invention is described in further detail below by embodiment combination accompanying drawing.
Embodiment one：
First, to should be mentioned that time stamp data is illustrated in the present embodiment, the time stamp data is 64bit number
According to preceding 16bit is the sequence number of time stamp data, and rear 48bit is the timestamp of time stamp data；In addition, this when
Stamp data are contained in the message of transmission.
Then a kind of adaptive clock recovery method is present embodiments provided, Fig. 1 is referred to, its specific recovery step
It is rapid as follows：
S101, detects in any buffering area whether be filled with time stamp data, the time stamp data include sequence number and when
Between stab；
S102, if being filled with time stamp data, obtains each time stamp data in buffering area；
S103, is modified to the time stamp data of acquisition so that the sequence number of each time stamp data is according to predetermined interval
Arrangement, timestamp are arranged according to time order and function order；
S104, adaptive clock recovery is carried out according to correction result.
Based on above-mentioned adaptive clock recovery step, during adaptive clock recovery is carried out, by right
Abnormal time stamp data is modified, and will not be modified to preferable time stamp number according to the time stamp data of setting rule compositor
According to also improving the stability of clock recovery while clock recovery efficiency is improved.Wherein, abnormal time stamp
Data refer to, when the time stamp data in message is transmitted because the reasons such as network failure cause part number
According to packet loss, or because the unstability of hardware causes partial data to occur when to hardware store time stamp data
Mistake so that sequence number and timestamp in the time stamp data of part can not be stored according to normal rule.
Specifically, for the recovery of self-adaptation clock, referring to Fig. 2, its principle is as follows：
E1 Business Streams are divided into several data segments by PTN access devices, then by several data segments by mark
Quasiconfiguaration is encapsulated into multiple bearing messages of PTN network, and TDM business passes through PTN nets in message form
Network is sequentially delivered to carry time stamp data in another PTN access devices, the message, and time stamp data includes sequence
Time point when row number and reception message；Then another PTN access devices are split to each message of reception,
Several data segments are obtained, and E1 Business Streams are recovered by some data segments.
Further, the buffering area in S101 steps is the section in logic FPGA, and logic FPGA is
Hardware, distributes 4 sections to store time stamp data, each section can store 255 time stamp datas altogether,
And in the case of being only all filled with a section, just allow software to read full wafer data, i.e., ought detect
The full flag bit in one of section is set, then software can take out all time stamp datas in the section.In addition,
Logic FPGA in the present embodiment is only used for storing time stamp data, and the processing for data is to pass through
What software was realized；Time stamp data in the present embodiment is made up of sequence number and timestamp, and each time stamp data
Sequence number is ideally that timestamp is this moment at equal intervals (regular incremented by successively or successively decrease successively)
Receive the time point of message.It is to be understood that above-mentioned 4 sections, 255 its be only used for the present embodiment
Explain, it is impossible to assert that specific value is only limitted to described above.
In S102 steps, get after all time stamp datas in buffering area, it is necessary to each time stamp data
Sequence number is ranked up according to the form of increasing or decreasing, it is intended that by by the sequence of time stamp data
Number according to setting rule compositor, identify between whether waiting between the sequence number of all time stamp datas in buffering area
Whether arranged away from, timestamp according to order from small to large, thus judge during message transmissions whether
There is packet loss or because the unstable of hardware causes the situation of data storage errors.Described is equidistantly each
It is in arithmetic progression between the sequence number of time stamp data, timestamp is corresponded with sequence number, therefore, if sequence
Number according to from big to small order arrange, then the big timestamp of sequence number is relatively small；If sequence number according to from
Small to be arranged to big order, then the small timestamp of sequence number is corresponding smaller.
After all time stamp datas sequence of acquisition, detect whether the sequence number of all time stamp datas is satisfied by
Difference series rule, if meeting arithmetic progression rule, illustrates time stamp datas all in the buffering area in transmission
All it is continuous, during message transmissions are carried out, does not occur packet loss or the unstable situation of hardware；Phase
Instead, if there is the time stamp data that sequence number is unsatisfactory for arithmetic progression rule, show carrying out message transmissions
Process, some message packet losses or when being stored to the time stamp data in message because hardware reason causes subsequently
The sequence number of time stamp data in message can not meet arithmetic progression rule.It is to be understood that being reported
During text transmission, because the sequence number in front and rear message is equidistant, and sequence number and timestamp value are one by one
Correspondence, will not influence the sequence number in follow-up time stamp data and time because of the unstability of packet loss or hardware
Stamp.Therefore, if the time stamp data obtained can not meet arithmetic progression rule, so that it may illustrate that time stamp data occurs
It is abnormal, such as packet loss or hardware unstability, so as to influence the continuity of whole time stamp data.
Further, in S103 steps, predetermined interval refers between each sequence number not exclusively at equal intervals, example
Such as：In certain time period, at intervals of A between the sequence number of time stamp data；After that period of time, may be used
Predetermined interval is adjusted to B so that the sequence number interval of follow-up time stamp data becomes B.Preferably, this is pre-
If at intervals of the ratio in arithmetic progression, i.e., before and after time stamp data sequence number difference, time stamp data meets etc.
Difference series rule, will hereafter be illustrated by taking arithmetic progression rule as an example to the process that time stamp data is modified.
It is right when there is the time stamp data for being unsatisfactory for arithmetic progression rule in all time stamp datas for finding to obtain
These time stamp datas are modified, and using revised time stamp data as next time stamp data, are deposited before discarding
The time stamp data of storage, the time stamp data that will not meet arithmetic progression rule is abandoned, specifically according to equation below
It is modified：
The sequence number of the sequence number of latter time stamp data=previous time stamp data+sequence number difference；
The time delay of timestamp+message of the timestamp of latter time stamp data=previous time stamp data.
Above-mentioned formula is modified for being currently unsatisfactory for the time stamp data of arithmetic progression rule, for the time stamp
Time stamp data after data, if being equally unsatisfactory for arithmetic progression rule, is also modified according to above-mentioned formula,
For latter time stamp data, the sequence number of its previous time stamp data is the sequence number of current time stamp data, when
Between stamp be current time stamp data timestamp.It is to be understood that for being unsatisfactory for arithmetic progression rule
Time stamp data, the correcting mode that this implementation is used is to be modified it in an ideal way, is not modified to
The time stamp data lost on practical significance.The correcting mode can by the larger time stamp data of front and rear difference according to
Perfect condition reduces gap, but revised data and the time stamp data lost still have error, its purpose
Only it is that ungratified time stamp data is modified to the time stamp data for meeting and requiring as far as possible, so that minimum may
Reduction clock recovery error.
Specifically, above-mentioned formula complete procedure is as follows：
TimeSequence_2=TimeSequence_1+DisStgValue
Wherein, TimeSequence_1 is the sequence number of previous time stamp data；TimeSequence_2 is latter
The sequence number of time stamp data；TimeStamp_1 is the timestamp of previous time stamp data；After TimeStamp_2 is
The timestamp of one time stamp data；DisStgValue is the sequence number and previous time stamp data of latter time stamp data
Difference between sequence number；FrameSpeed is E1 frame rate, and it uses synchronous TDM technologies by 30
Voice channel and 2 control channels are compounded on 2.048Mbits/s IA High Speed Channel, and the length of a frame is
125us；ConjNum is cascade number, and its span is 1-40.
Further, after being modified to the time stamp data for being unsatisfactory for arithmetic progression rule so that the institute of acquisition
The sequence number for having time stamp data all meets spacing phase between arithmetic progression rule, i.e., the sequence number of each time stamp data
Deng its timestamp is also ascending incremental successively.Then, in S104 steps, correction result refers to not
Meet after the time stamp data amendment of arithmetic progression rule, meet that spacing between sequence number is equal, timestamp successively
The time stamp data of incremental all acquisitions, obtains one group of time stamp that timestamp is most concentrated from these time stamp datas
Data, and this group of time stamp data is calculated according to preset algorithm, Frequency Dividing Factor is obtained, then basis point
Frequency factor pair self-adaptation clock is recovered.When timestamp most concentrate one group is obtained from these time stamp datas
Data are stabbed, it is intended that this group or a piece of time stamp data can be gone out in this period the time with normal reaction
Situation of change, carry out clock recovery when time error it is also relatively small so that more accurately to adaptive
Clock is recovered.It should be noted that the preset algorithm includes but is not limited to adaptive clock recovery calculation
Method.
Further, before S101 steps, the TDM business of establishment self-adaptation clock pattern is included,
During establishment, the phase for cascading number, service channel numbering and adaptive clock recovery of configuration message
Close information.Then each port is detected, judge the port whether the TDM of adaptation transmitter clock module
Business, if the TDM business of self-adaptation clock pattern, then enable adaptive clock recovery function, refer to
Fig. 3, specifically enables process as follows：
S301, travels through each port and judges whether TDM operation transmission, if so, S302 is performed, if it is not,
Perform S301；
S302, whether detect the TDM business models is self-adaptation clock pattern, if so, S303 is performed,
If it is not, performing S302；
S303, enables adaptive clock recovery function.
After personal adaptation clock recovery is enabled, the flow in Fig. 1 can be just performed.Specifically, in TDM industry
Business includes the cascade number and service channel numbering of message, wherein, number is numbered and cascaded according to service channel
Correspondence time stamp data can be obtained, so as to realize whole handling process in Fig. 1.It is logic FPGA according to cascade number
Configure packet loss strategy value (i.e. sequence number difference).Wherein, the specific formula for calculation of packet loss strategy value is as follows：
Wherein, DisStgValue is packet loss strategy value (i.e. sequence number difference)；FrameSpeed is E1 frames speed
Rate, 8000 frames/s；TimeStampNum is the timestamp number of a section storage, totally 255；ConjNum
For cascade number, its span is 1-40.
The packet loss strategy value that logic FPGA is drawn according to above-mentioned calculation formula, by TDM business message when
Stamp data are stored, so that time stamp data meets arithmetic progression rule.
Embodiment two：
A kind of adaptive clock recovery device is present embodiments provided, Fig. 4 is referred to, the device includes：
Buffer detection module 401, for detecting in any buffering area whether be filled with time stamp data, the time stamp number
According to including sequence number and timestamp；
Acquisition module 402, if for being filled with time stamp data, obtaining each time stamp data in buffering area；
Correcting module 403, for the time stamp data to acquisition be modified cause each time stamp data sequence number by
Arranged according to predetermined interval arrangement, timestamp according to time order and function order；
Recovery module 404, for carrying out adaptive clock recovery according to correction result.
Wherein, predetermined interval refers between each sequence number not exclusively at equal intervals, for example：In certain time period,
At intervals of A between the sequence number of time stamp data；After that period of time, predetermined interval can be adjusted to B, made
The sequence number interval for obtaining time stamp data subsequently becomes B.Preferably, the predetermined interval is the ratio in arithmetic progression
Value, i.e., the sequence number difference of front and rear time stamp data, time stamp data meets arithmetic progression rule, hereafter will with etc.
The process that time stamp data is modified is illustrated exemplified by difference series rule.
By the adaptive clock recovery device of the present embodiment, the adaptive clock recovery device is applied to PTN
In equipment, adaptive clock recovery can be carried out in software view, make it in not enabled adaptive clock recovery
In the case of function, the present apparatus is not run；After enabling, when being passed to software and realizing complete adaptive
Clock recovers function, so as to be not take up extra hardware resource, reduces equipment cost, and then improve the spirit of design
Activity.
The device also includes business detection module 405, and the business detection module 405 is used to detect any buffering
Whether it is filled with before time stamp data, is answered when the time-division for detecting either port configuration self-adaptation clock pattern in area
When using business, adaptive clock recovery function is enabled.
Specifically, when realizing the function of clock recovery by adaptive clock recovery device, first by device
Initialization, such as initial makeup to internal dog feeding operation, the related component of initialization IP clocks initializes shape
State machine etc..Wherein, dog feeding operation refers to empty house dog counter, specifically, in normal program operation,
Need to be emptied before house dog counter reaches maximum, make it restart to count.Then, open
With the timer of the 100ms timing cycles in device, timing inquiry port whether TDM operation transmission, and industry
Whether business clock is self-adaptation clock type；Timing is detected to logic FPGA buffering area simultaneously, really
Whether the time stamp data recognized in buffering area is filled with.At the same time, another timer in device is enabled, this is determined
When device timing cycle be 20ms, the function for realizing timing performs network choosing bag, packet loss detection, time stamp
Data collect after the operation such as comparing calculation, the state switching in clock each stage etc. is according to the counting list
Carried out based on position.Timer timing cycle includes but is not limited to above-mentioned numerical value in the present embodiment, can root
Rationally set, do not limited here according to being actually needed.
Start timing after the completion of initialization, then board software receives the instruction of TDM service creations, and is assigned to
SDK (Software Development, SDK) carries out TDM service creations.SDK exists
In the TDM business procedures for creating self-adaptation clock pattern, letter of the meeting configuration pin to adaptive clock recovery device
Breath, and cascade number and the service channel numbering of configuration message, and the cascade number and service channel of configuration are numbered
Adaptive clock recovery device is transferred to, then device is that logic FPGA configures packet loss strategy according to cascade number
Value, logic FPGA is stored according to packet loss strategy value to time stamp data.The packet loss strategy value refers to reality
Example one is applied, is repeated no more here.The TDM of self-adaptation clock pattern is transmitted in each port when device is detected
Business, may turn on self-adaptation clock device and handles time stamp data progress row clock recovery of going forward side by side.
Specifically, for the recovery of self-adaptation clock, referring to Fig. 2, its principle is as follows：
E1 Business Streams (the TDM business for needing carrying) are divided into several data by PTN access devices
Several data segments, are then encapsulated into multiple bearing messages of PTN network, TDM by section by reference format
When business is sequentially delivered to carry in another PTN access devices, the message in message form by PTN network
Stab data, time point when time stamp data includes sequence number and receives message；Then another PTN accesses are set
Standby each message to reception is split, and obtains several data segments, and recover E1 by some data segments
Business Stream.
Further, above-mentioned buffering area is the section in logic FPGA, and logic FPGA is hardware, always
Distribute 4 sections altogether to store time stamp data, each section can store 255 time stamp datas, and only exist
In the case that one section is all filled with, just allows software to read full wafer data, i.e., ought detect one of them
The full flag bit in section is set, then software can take out all time stamp datas in the section.In addition, the present embodiment
In logic FPGA be only used for storing time stamp data, the processing for data is realized by software
's；Time stamp data in the present embodiment is made up of sequence number and timestamp, and the sequence number reason of each time stamp data
It is that timestamp is to receive message this moment at equal intervals (regular incremented by successively or successively decrease successively) in the case of thinking
Time point.It is to be understood that above-mentioned 4 sections, 255 its be only used for explaining to the present embodiment,
It cannot be assumed that specific value is only limitted to described above.
Acquisition module 402 is got after all time stamp datas in buffering area, it is necessary to the sequence of each time stamp data
Row number is ranked up according to the form of increasing or decreasing, it is intended that by by the sequence number of time stamp data
According to setting rule compositor, identify between the sequence number of all time stamp datas in buffering area whether equidistantly,
Whether timestamp arranges according to order from small to large, so as to judge whether occur during message transmissions
The situation of packet loss.It is described equidistantly be each time stamp data sequence number between be in arithmetic progression, timestamp with
Sequence number correspond, therefore, if sequence number according to from big to small order arrange, sequence number it is big when
Between stab relatively small；If sequence number is arranged according to order from small to large, the small timestamp of sequence number is corresponding
It is smaller.
After all time stamp datas sequence of acquisition, detect whether the sequence number of all time stamp datas is satisfied by
Difference series rule, if meeting arithmetic progression rule, illustrates time stamp datas all in the buffering area in transmission
All it is continuous, does not occur the situation of packet loss during message transmissions are carried out, or in data storage
During do not occur mistake；If on the contrary, there is the time stamp data that sequence number is unsatisfactory for arithmetic progression rule,
Show that time stamp data occurs abnormal, causing the sequence number of the time stamp data in subsequent packet the difference such as can not meet
Row rule.It is to be understood that during message transmissions are carried out, due to the sequence number in front and rear message
Equidistantly, and sequence number and timestamp value are corresponded, will not because of packet loss or hardware unstability and shadow
Ring the sequence number and timestamp in follow-up time stamp data.
Further, correcting module 403 includes：
Judging submodule 4031, for judging the sequence number of each time stamp data in the buffering area whether according to pre-
If being spaced；
Submodule 4032 is corrected, if for not arranged according to predetermined interval, to what is do not arranged according to predetermined interval
Time stamp data is modified.
When judging submodule 4031 finds occur what is do not arranged according to predetermined interval in all time stamp datas obtained
During time stamp data, these time stamp datas are modified, revised time stamp data are regard as next time stamp number
According to the time stamp data stored before discarding, the time stamp data that will do not arranged according to predetermined interval is abandoned, tool
Body is modified according to equation below：
The sequence number of the sequence number of latter time stamp data=previous time stamp data+sequence number difference；
The time delay of timestamp+message of the timestamp of latter time stamp data=previous time stamp data.
Above-mentioned formula is modified for the current time stamp data not arranged according to predetermined interval, for the time stamp
Time stamp data after data, if not arranged according to predetermined interval equally, is also modified with above-mentioned formula,
For latter time stamp data, the sequence number of its previous time stamp data is the sequence number of current time stamp data, when
Between stamp be current time stamp data timestamp.It is to be understood that for not arranged according to predetermined interval
Time stamp data, the correcting mode that this implementation is used is to be modified it in an ideal way, is not modified to
The time stamp data lost on practical significance.The correcting mode can by the larger time stamp data of front and rear difference according to
Perfect condition reduces gap, but revised data and the time stamp data lost still have error, its purpose
Only it is that ungratified time stamp data is modified to the time stamp data for meeting and requiring as far as possible, so that minimum may
Reduction clock recovery error.
Specifically, above-mentioned formula complete procedure is as follows：
TimeSequence_2=TimeSequence_1+DisStgValue
Wherein, TimeSequence_1 is the sequence number of previous time stamp data；TimeSequence_2 is latter
The sequence number of time stamp data；TimeStamp_1 is the timestamp of previous time stamp data；After TimeStamp_2 is
The timestamp of one time stamp data；DisStgValue is the sequence number and previous time stamp data of latter time stamp data
Difference between sequence number；FrameSpeed is E1 frame rate, and it uses synchronous TDM technologies by 30
Voice channel and 2 control channels meet on 2.048Mbits/s IA High Speed Channel, and the length of a frame is
125us；ConjNum is cascade number, and its span is 1-40.
Further, after being modified to the time stamp data not arranged according to predetermined interval so that the institute of acquisition
The sequence number for having time stamp data is all arranged according to predetermined interval, and its timestamp is also arranged according to time order and function order.
Then, recovery module 404 includes：
Acquisition submodule 4041, for obtaining one group of time stamp data that timestamp is most concentrated according to correction result；
Recover submodule 4042, for the time stamp data of acquisition to be carried out into adaptive clock recovery.
Or, recovery module includes：
Computing submodule, for calculating Frequency Dividing Factor according to correction result, specifically, during by described one group
Stamp data are calculated according to preset algorithm, obtain Frequency Dividing Factor；
Recover submodule, for carrying out adaptive clock recovery according to the Frequency Dividing Factor.
Correction result in acquisition submodule 4041 refers to the time stamp data amendment by arithmetic progression rule is unsatisfactory for
Afterwards, the time stamp data of all acquisitions that spacing is equal, timestamp is incremented by successively between sequence number is met, from this
One group of time stamp data that timestamp is most concentrated is obtained in a little time stamp datas, and by this group of time stamp data according to default
Algorithm is calculated, and obtains Frequency Dividing Factor, then self-adaptation clock is recovered according to Frequency Dividing Factor.From
One group of time stamp data that timestamp is most concentrated is obtained in these time stamp datas, it is intended that this group or one
Piece time stamp data can go out the situation of change of time in this period with normal reaction, carry out clock recovery constantly
Between error it is also relatively small, so as to more accurately recover to self-adaptation clock.It should be noted that institute
State preset algorithm including but not limited to adaptive clock recovery algorithm.
Obviously, those skilled in the art should be understood that each module or each step of the invention described above can be used
General computing device realizes that they can be concentrated on single computing device, or be distributed in multiple
On the network that computing device is constituted, alternatively, they can with computing device can perform program code come
Realize, it is thus possible to be stored in storage medium (ROM/RAM, magnetic disc, CD) by calculating
Device is performed, and in some cases, can be shown or described to be performed different from order herein
The step of, they are either fabricated to each integrated circuit modules respectively or by multiple modules in them
Or step is fabricated to single integrated circuit module to realize.So, the present invention is not restricted to any specific hard
Part and software are combined.
Above content is to combine specific embodiment further description made for the present invention, it is impossible to recognized
The specific implementation of the fixed present invention is confined to these explanations.For the ordinary skill of the technical field of the invention
For personnel, without departing from the inventive concept of the premise, some simple deduction or replace can also be made,
Protection scope of the present invention should be all considered as belonging to.
Claims (12)
1. a kind of adaptive clock recovery method, it is characterised in that including：
Detect and time stamp data whether is filled with any buffering area, the time stamp data includes sequence number and timestamp；
If being filled with time stamp data, each time stamp data in the buffering area is obtained；
The time stamp data of acquisition is modified so that the sequence number of each time stamp data arranged according to predetermined interval,
Timestamp is arranged according to time order and function order；
Adaptive clock recovery is carried out according to correction result.
2. adaptive clock recovery method as claimed in claim 1, it is characterised in that described pair of acquisition
Time stamp data be modified including：
Judge whether the sequence number of each time stamp data in the buffering area arranges according to predetermined interval；
If not arranged according to predetermined interval, the time stamp data not arranged according to predetermined interval is modified.
3. adaptive clock recovery method as claimed in claim 2, it is characterised in that to not according to pre-
If spaced time stamp data is modified in such a way：
The sequence number of the sequence number of latter time stamp data=previous time stamp data+sequence number difference；
Timestamp+message time delay of the timestamp of latter time stamp data=previous time stamp data；
According to above-mentioned correcting mode, follow-up time stamp data is modified successively.
4. the adaptive clock recovery method as described in claim any one of 1-3, it is characterised in that described
Carrying out adaptive clock recovery according to correction result is specially：
The time stamp data that timestamp is most concentrated is obtained according to correction result；
The time stamp data of acquisition is subjected to adaptive clock recovery.
5. the adaptive clock recovery method as described in claim any one of 1-3, it is characterised in that described
Carrying out adaptive clock recovery according to correction result is specially：
Frequency Dividing Factor is calculated according to correction result；
Adaptive clock recovery is carried out according to the Frequency Dividing Factor.
6. the adaptive clock recovery method as described in claim any one of 1-3, it is characterised in that in institute
State also includes before whether being filled with time stamp data in any buffering area of detection：
When detecting the TDM service of either port configuration self-adaptation clock pattern, when enabling adaptive
Clock recovers function.
7. a kind of adaptive clock recovery device, it is characterised in that including：
Buffer detection module, for detecting time stamp data whether is filled with any buffering area, the time stamp number
According to including sequence number and timestamp；
Acquisition module, if for being filled with time stamp data, obtaining each time stamp data in the buffering area；
Correcting module, for the time stamp data to acquisition be modified cause each time stamp data sequence number according to
Predetermined interval arrangement, timestamp are arranged according to time order and function order；
Recovery module, for carrying out adaptive clock recovery according to correction result.
8. adaptive clock recovery device as claimed in claim 7, it is characterised in that the amendment mould
Block includes：
Judging submodule, for judging the sequence number of each time stamp data in the buffering area whether according between default
Every arrangement；
Submodule is corrected, if for not arranged according to predetermined interval, to the time stamp not arranged according to predetermined interval
Data are modified.
9. adaptive clock recovery device as claimed in claim 8, it is characterised in that to not according to pre-
If spaced time stamp data is modified in such a way：
The sequence number of the sequence number of latter time stamp data=previous time stamp data+sequence number difference；
Timestamp+message time delay of the timestamp of latter time stamp data=previous time stamp data；
According to above-mentioned correcting mode, follow-up time stamp data is modified successively.
10. the adaptive clock recovery device as described in claim any one of 7-9, it is characterised in that described
Recovery module includes：
Acquisition submodule, for obtaining the time stamp data that timestamp is most concentrated according to correction result；
Recover submodule, for the time stamp data of acquisition to be carried out into adaptive clock recovery.
11. the adaptive clock recovery device as described in claim any one of 7-9, it is characterised in that institute
Stating recovery module includes：
Computing submodule, for calculating Frequency Dividing Factor according to correction result；
Recover submodule, for carrying out adaptive clock recovery according to the Frequency Dividing Factor.
12. the adaptive clock recovery device as described in claim any one of 7-9, it is characterised in that also
Including：
Business detection module, for before whether time stamp data is filled with detecting any buffering area, working as detection
When configuring the TDM service of self-adaptation clock pattern to either port, adaptive clock recovery function is enabled.
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
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| CN201610182482.6A CN107241155A (en) | 2016-03-28 | 2016-03-28 | A kind of adaptive clock recovery method and device |
| PCT/CN2017/072903 WO2017166925A1 (en) | 2016-03-28 | 2017-02-04 | Method and apparatus for adaptive clock recovery |
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| Application Number | Priority Date | Filing Date | Title |
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| CN201610182482.6A CN107241155A (en) | 2016-03-28 | 2016-03-28 | A kind of adaptive clock recovery method and device |
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| CN201610182482.6A Pending CN107241155A (en) | 2016-03-28 | 2016-03-28 | A kind of adaptive clock recovery method and device |
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| WO (1) | WO2017166925A1 (en) |
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| CN113032413A (en) * | 2021-03-10 | 2021-06-25 | 北京嘀嘀无限科技发展有限公司 | Data sampling method, device, electronic equipment, storage medium and program product |
| CN113055718A (en) * | 2021-06-02 | 2021-06-29 | 杭州星犀科技有限公司 | Method, system, electronic device and storage medium for time stamp homogenization |
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| CN1496072A (en) * | 2002-08-24 | 2004-05-12 | ���ֿ˰뵼������˾ | Self-adaptive clock restorer |
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| CN104410475A (en) * | 2014-12-12 | 2015-03-11 | 成都朗锐芯科技发展有限公司 | Recovering method for network clock based on TDM (Time Division Multiplex) |
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| GB2399263A (en) * | 2003-03-07 | 2004-09-08 | Zarlink Semiconductor Ltd | Clock synchronisation over a packet network |
| CN101674174B (en) * | 2008-09-12 | 2013-06-05 | 华为技术有限公司 | Method and equipment for increasing clock stability |
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| CN1496072A (en) * | 2002-08-24 | 2004-05-12 | ���ֿ˰뵼������˾ | Self-adaptive clock restorer |
| CN101014001A (en) * | 2006-11-13 | 2007-08-08 | 陈哲 | RTP packet mending apparatus, RTP packet sorting method and complementing method |
| CN102404066A (en) * | 2011-11-21 | 2012-04-04 | 杭州晨晓科技有限公司 | Self-adaptive clock recovery method |
| CN104410475A (en) * | 2014-12-12 | 2015-03-11 | 成都朗锐芯科技发展有限公司 | Recovering method for network clock based on TDM (Time Division Multiplex) |
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| CN113032413A (en) * | 2021-03-10 | 2021-06-25 | 北京嘀嘀无限科技发展有限公司 | Data sampling method, device, electronic equipment, storage medium and program product |
| CN113055718A (en) * | 2021-06-02 | 2021-06-29 | 杭州星犀科技有限公司 | Method, system, electronic device and storage medium for time stamp homogenization |
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| WO2017166925A1 (en) | 2017-10-05 |
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