CN107241067A - A kind of digital self calibration copped wave precision amplifier and implementation method - Google Patents
A kind of digital self calibration copped wave precision amplifier and implementation method Download PDFInfo
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- CN107241067A CN107241067A CN201710429464.8A CN201710429464A CN107241067A CN 107241067 A CN107241067 A CN 107241067A CN 201710429464 A CN201710429464 A CN 201710429464A CN 107241067 A CN107241067 A CN 107241067A
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Classifications
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/30—Modifications of amplifiers to reduce influence of variations of temperature or supply voltage or other physical parameters
- H03F1/301—Modifications of amplifiers to reduce influence of variations of temperature or supply voltage or other physical parameters in MOSFET amplifiers
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/26—Modifications of amplifiers to reduce influence of noise generated by amplifying elements
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/45—Differential amplifiers
- H03F3/45071—Differential amplifiers with semiconductor devices only
- H03F3/45076—Differential amplifiers with semiconductor devices only characterised by the way of implementation of the active amplifying circuit in the differential amplifier
- H03F3/45179—Differential amplifiers with semiconductor devices only characterised by the way of implementation of the active amplifying circuit in the differential amplifier using MOSFET transistors as the active amplifying circuit
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F2200/00—Indexing scheme relating to amplifiers
- H03F2200/15—Indexing scheme relating to amplifiers the supply or bias voltage or current at the drain side of a FET being continuously controlled by a controlling signal
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F2200/00—Indexing scheme relating to amplifiers
- H03F2200/271—Indexing scheme relating to amplifiers the DC-isolation amplifier, e.g. chopper amplifier, modulation/demodulation amplifier, uses capacitive isolation means, e.g. capacitors
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F2200/00—Indexing scheme relating to amplifiers
- H03F2200/372—Noise reduction and elimination in amplifier
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F2203/00—Indexing scheme relating to amplifiers with only discharge tubes or only semiconductor devices as amplifying elements covered by H03F3/00
- H03F2203/45—Indexing scheme relating to differential amplifiers
- H03F2203/45354—Indexing scheme relating to differential amplifiers the AAC comprising offset means
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Abstract
The present invention provides the good digital self calibration copped wave precision amplifier and implementation method that a kind of cost is relatively low, be easily achieved.The amplifier mainly includes digital self calibration loop and chopper circuit.On amplifier after electricity, digital self calibration state is configured in time period, chopper circuit and amplification output circuit are closed.The digital quantity of calibration is stored in register, and the input offset voltage of amplifier is calibrated by digital analog converter.After digital self calibration state terminates, compare output circuit closing, the amplifier is configured to chopper amplification state, and chopper circuit and amplification output circuit are operated, further to reduce the input offset voltage of the amplifier, the temperature drift of offset voltage and flicker noise.
Description
Technical field
The present invention relates to the amplifier region in Analogous Integrated Electronic Circuits, the amplification is improved more specifically to one kind
The technology of device precision.
Background technology
In current industrial control system, instrument and meter, Medical Devices, security protection, automobile, Aero-Space and consumer electronics
Deng field, precision amplifier integrated circuit has a wide range of applications.The temperature drift of input offset voltage, offset voltage（drift）, dodge
Bright noise（1/f noise）It is the important technology index for indicating amplifier precision, its performance directly influences above-mentioned application apparatus
With the precision index of system.
During using semiconductor technology manufacture integrated circuit, factors can influence the precision of amplifier, for example
Device mismatch（mismatch）, flicker noise, the temperature drift of device parameters, encapsulation pressure（stress）Deng.Excellent in design
The initial input offset voltage of universal amplifier is in several millivolts, and the temperature drift of offset voltage is in every degree Celsius of several microvolt, low frequency
Flicker noise has the shake of the microvolt of peak-to-peak value more than ten.In some precision applications, the performance of universal amplifier, which can not be met, is
The required precision for design of uniting.
Extensive exploration has been done to the method for improving the precision of amplifier by domestic and international semiconductor company.Current method has envelope
Trimmed after laser trimming or burning fuse, encapsulation before dress（etrim）, upper electric self-calibration technique, wave chopping technology, ripple eliminate
Wave chopping technology, table tennis Auto zeroing technology, table tennis Auto zeroing wave chopping technology etc.., can according to the requirement of amplifier precision and cost
To consider to take corresponding rational method.
In above method, the method cost trimmed after the laser trimming or burning fuse, encapsulation before encapsulation is higher, and volume production is surveyed
Examination, which needs to develop, trims program accordingly, and the temperature drift performance of offset voltage cannot improve or can become worse.Upper electricity
Self-calibration technique cost is low, but can not equally solve the problems, such as the temperature drift of offset voltage.Wave chopping technology cost is relatively low, but exists
The problem of output ripple is larger.If eliminating the ripple output of copped wave, cost can be larger.Auto zeroing technology of rattling is, it is necessary to more
Individual main amplifier and booster amplifier, cost can be higher.
The content of the invention
There is provided a kind of cost is relatively low, the good digital self-correcting that is easily achieved for the advantage and disadvantage based on existing scheme of the invention
Quasi- copped wave precision amplifier and implementation method.
The amplifier includes digital self calibration loop and chopper circuit.On amplifier after electricity, in time period
Digital self calibration state is configured to, chopper circuit and amplification output circuit are closed.The digital quantity of calibration is stored in register, and
Pass through digital analog converter（DAC）The input offset voltage of amplifier is calibrated.After digital self calibration state terminates, compare output
Circuit is closed, and the amplifier is configured to chopper amplification state, and chopper circuit and amplification output circuit are operated, to enter one
The input offset voltage of the step reduction amplifier, the temperature drift of offset voltage（drift）And flicker noise（1/f noise）.
The amplification path of the amplifier is folded common source and common grid AB classes（Class AB）Output circuit, it is poor that it includes input
It is divided to, two pairs of difference current sources and amplification output circuit.The amplification output circuit is included with gain lifting（gain boost）
The two groups of cascode amplifiers and AB classes output circuit and its biasing circuit of circuit.The frequency compensated circuit for amplifying path is Miller
Compensation（Miller compensation）, i.e., compensation capacitor is positioned at amplifier out and the grid of output driving pipe.Its
In, cause amplifier mismatch（mismatch）And the circuit of noise is input difference pair and difference current source.
The digital self calibration loop includes the circuit for causing amplifier mismatch and noise, two groups of cascode amplifiers and constituted
Comparison output circuit, the dichotomy successive approximation register logic of predetermined figure（SAR logic）Circuit and for calibrate put
The digital analog converter of big device mismatch.
When the amplifier is configured to digital self calibration state, causes the circuit of amplifier mismatch and noise and compare output
Circuit constitutes comparator and is operated, while the input short circuit of the comparator, to cause the input of comparator as the amplification
The equivalent inpnt voltage of device.
The dichotomy successive approximation register logic circuit is the result that is exported according to comparator to judge that register is every
The storage state of one.During digital self calibration state, the digital quantity of register storage is calibrated for comparator input offset voltage
Digital quantity, through digital analog converter produce calibration voltage.The input offset voltage summation of the calibration voltage and comparator.Pre-determined bit
After several digital quantity execution terminates, dichotomy Approach by inchmeal sequential is completed, and the input of calibration voltage and comparator now is lacked of proper care
Voltage and go to zero, digital self calibration state terminates.
After digital self calibration state terminates, compare output circuit closing, the amplifier is configured to chopper amplification state.This
When, the digital quantity that all predetermined figures are deposited in register is the digital quantity that amplifier input offset voltage is calibrated, through digital-to-analogue conversion
Device produces calibration voltage and the input offset voltage of the amplifier is calibrated.
The digital self calibration loop also includes voltage detection circuit, electrification reset circuit, calibration cycle and controls to patrol
Collect and oscillator.When electric on amplifier, voltage detection circuit detects supply voltage and reaches comparator normal working voltage
After enable electrification reset circuit.When cycle resetting time of electrification reset circuit must set up more than each node bias voltage of comparator
Between and the oscillator frequency stabilizing time, to ensure that comparator and oscillator enter normal operating conditions.Then, electrification reset electricity
Road is closed, and enables dichotomy successive approximation register logic circuit.
The voltage detection circuit can continuously detect supply voltage.Electricity is caused when the supply voltage of amplifier is under-voltage
During the cisco unity malfunction of road, voltage detection circuit can produce signal so that the amplifier is reconfigured for numeral certainly
Align mode, while the storage of electrification reset circuit is discharged, to cause amplifier to re-power rear normal reset school
Paracycle control logic.
The chopper circuit includes the chopping modulation positioned at amplifier in（modulate）On-off circuit, positioned at amplification
The copped wave demodulation of two groups of cascode amplifier sources in output circuit（demodulate）On-off circuit and carried positioned at two gains
Rise the chopping modulation on-off circuit of circuit output end.
When the amplifier is configured to chopper amplification state, amplification output circuit and chopper circuit are operated.Amplifier
Input signal be connected to the input of input difference pair by chopper circuit, input signal is modulated.Input difference pair it is defeated
Go out the source for the cascode amplifier that end is connected to by chopper circuit in amplification output circuit, input signal is demodulated.Finally,
Input signal amplified output circuit is exported without distortions.The input offset voltage signal of the amplifier is only by amplification output
The chopper circuit modulation of cascode amplifier source in circuit, input offset voltage is transformed to high frequency ripple output.
Above-mentioned amplifier is after digital self calibration, and input offset voltage becomes after very little, therefore amplifier chopper amplification
Output ripple very little.Chopper circuit can further reduce the input offset voltage of the amplifier, and can reduce institute
State the temperature drift and flicker noise of the important indicator offset voltage of amplifier precision.
Brief description of the drawings
Fig. 1 show the digital self calibration copped wave precision amplifier circuit diagram according to the present invention.
Embodiment
Fig. 1 is a kind of physical circuit implementation of the digital self calibration copped wave precision amplifier of the present invention, although other are matched somebody with somebody
It is possible to put.Digital self calibration copped wave precision amplifier 100 includes a pair of input differences to 111, two pairs of difference current sources 112
With 113, amplification output circuit 120, the chopping modulation in chopper circuit（modulate）On-off circuit 131 and copped wave demodulation
（demodulate）On-off circuit 132 and 133, compares output circuit 140, is predefined for the dichotomy successive approximation register of N
Logic（SAR logic）Circuit 150, and the N digit weighted-voltage D/A converters for CALIBRATION AMPLIFIER mismatch（Calibration DAC）
Circuit 160.Amplification output circuit 120 is lifted including gain（gain boost）Fully-differential amplifier A1 and A2 and fully differential driving
AB classes（Class AB）Output amplifier.
The AB classes output amplifier of fully differential driving includes the of the first order amplifier that fully differential exports and the output of AB classes
Two-stage amplifier.Input signal Vin+ and Vin- are connected to input difference to MP1 in 111 by chopping modulation on-off circuit 131
With MP2 grid.MP1 and MP2 drain electrode is connected respectively to two inputs of A2 in amplification output circuit 120, and by cutting
Ripple demodulation on-off circuit 132 is connected respectively to the source of cascode amplifier MN3 and MN4 in amplification output circuit 120.
MP5 and MP6 drain electrode is connected respectively to two inputs of A1 in amplification output circuit 120 in difference current source 113,
And the source that on-off circuit 133 is connected to cascode amplifier MP3 and MP4 in amplification output circuit 120 is demodulated by copped wave.
Fully-differential amplifier output end vo-and Vo+ are controlled by AB classes in amplification output circuit 120（Class AB
control）Circuit is connected respectively to two inputs of output stage amplifier MN5, MP7.
Fully-differential amplifier A1 input common mode reference voltage is Vcmp, fully-differential amplifier in amplification output circuit 120
A2 input common mode reference voltage is Vcmn.A1 fully differential output end is connected respectively to by chopping modulation on-off circuit 135
MP3 and MP4 grid, A2 fully differential output end is connected respectively to MN3 and MN4 grid by chopping modulation on-off circuit 134
Pole.
When amplifier 100 is configured to digital self calibration state, chopping modulation on-off circuit 131 disconnects input difference pair
MP1 and MP2 and input signal Vin+ and Vin- connection in 111, and by MP1 and MP2 grid short circuit.Copped wave solution tune switch
Circuit 132 and 133 is configured to be fixedly connected with state, for example, MN3 and MN4 source is coupled with MN1 in difference current source 112
With MN2 drain electrode, MP3 and MP4 source are coupled with the drain electrode of MP5 and MN6 in difference current source 113.Vcmp is configured to put
The positive voltage VDD, Vcmn of big device 100 are configured to negative supply voltage VSS.Compare the grid of MN6 and MN7 in output circuit 140
Pole VB3 is changed into normal bias condition from VSS, and MP8 and MP9 are changed into normal bias condition from VDD.At this moment, A1 common-mode feedback electricity
Road（Do not show in figure）MN3 and MN4 is turned off, A2 common mode feedback circuit（Do not show in figure）MP3 and MP4 is turned off.Compare output
MP8 and MN6 drain electrodes connection is as an output end of comparator in circuit 140, and MP9 and MN7 drain electrode connections are used as the another of comparator
One output end.The poor Comp of two output ends of comparator is the input of successive approximation register logic circuit 150.
The output of successive approximation register logic circuit 150（Din）It is connected to the input of d convertor circuit 160.With
In the N positions d convertor circuit 160 of calibration comparator input offset voltage, a range of equivalent inpnt calibration electricity is produced
Pressure.Maximum calibration voltage Vmax and minimum calibration voltage Vmin is distributed according to the estimation of the input offset voltage of comparator to be set.
Minimum calibration step-length is LSB=(Vmax-Vmin)/2^N.Comparator is used to judge that input offset voltage is plus calibration voltage
It is no to be more than zero, its output result as successive approximation register logic circuit 150 input.Successive approximation register logic circuit
The output of N-bit register is connected to the input of N d convertor circuits 160 in 150.According to known dichotomy Approach by inchmeal
Register logical（SAR logic）Principle, input offset voltage will be gradually close to zero plus calibration voltage.Finally, by N number of
After the Approach by inchmeal cycle, input offset voltage is plus calibration voltage by the voltage less than LSB, and digital self calibration state terminates.
When electric on amplifier 100, voltage detection circuit（Do not show in figure）Detecting supply voltage reaches comparator just
Electrification reset circuit is enabled after normal operating voltage（Do not show in figure）.Cycle resetting time of electrification reset circuit must be more than comparator
Each node bias voltage setup time and oscillator（Do not show in figure）Frequency settling time, to ensure that comparator and oscillator enter
Enter normal operating conditions.Then, electrification reset circuit is closed, and enables successive approximation register logic circuit 150.
After digital self calibration state terminates, amplifier 100 is configured to chopper amplification state.VB3 is configured to VSS, VB2 configurations
For VDD, compare output circuit 140 and close, while successive approximation register logic terminates.Vcmn and Vcmp points of common mode reference voltage
Do not configure normal bias voltage, the chopping modulation on-off circuit 131 of input is by input signal Vin+ and Vin- and input difference
Connected to 111.Chopping modulation on-off circuit 131 and copped wave demodulate on-off circuit 132 and 133 in clock signal FP and FPN
To the calibrated copped wave of amplifier 100 for crossing input offset voltage under control.Chopper circuit is also included positioned at A1 and A2 output ends
Chopping modulation on-off circuit 134 and 135.Chopper circuit can further step-down amplifier 100 input offset voltage, and can
With the temperature drift and flicker noise of the important indicator offset voltage of the precision of step-down amplifier 100.
Each working condition of amplifier 100 is by sequential（Do not show in figure）And control logic circuit（Do not show in figure）It is produced
Control signal（Do not show in figure）Selected.The design of control circuit based on foregoing description, for being familiar with timing circuit
Technical staff is well-known.
Although disclosing and describing specific embodiment of the present invention already, for those skilled in the art,
A variety of remodeling and replacement can be made.Therefore, the present invention is only limited by the scope of appended claims.
Claims (6)
1. a kind of amplifier, main to include digital self calibration loop and chopper circuit, it is characterised in that on the amplifier after electricity,
Digital self calibration state is configured in time period, the chopper circuit and amplification output circuit are closed,
The digital quantity of calibration is stored in register, and does school to the input offset voltage of the amplifier by digital analog converter
Standard,
After the digital self calibration state terminates, compare output circuit closing, the amplifier is configured to chopper amplification state, institute
State chopper circuit and the amplification output circuit is operated.
2. amplifier according to claim 1, it is characterised in that the amplification path of the amplifier is folded common source and common grid
AB class output circuits, it includes input difference to, two pairs of difference current sources and the amplification output circuit,
The amplification output circuit include with gain improvement circuit two groups of cascode amplifiers and AB classes output circuit and its
Biasing circuit,
The frequency compensated circuit of the amplification path is miller-compensated, i.e., compensation capacitor is located at the amplifier out and defeated
Go out the grid of driving tube.
3. amplifier according to claim 1, it is characterised in that the digital self calibration loop, which is included, causes the amplification
The circuit of device mismatch and noise, two groups of cascode amplifiers constitute it is described compare output circuit, predetermined figure dichotomy by
Secondary to approach register logical circuit and the digital analog converter for calibrating the amplifier mismatch, the amplifier is configured to
During the digital self calibration state,
The described circuit and the output circuit composition comparator that compares that cause the amplifier mismatch and noise is operated,
Simultaneously the input short circuit of the comparator, to cause the input of the comparator to be the equivalent inpnt voltage of the amplifier；
The dichotomy successive approximation register logic circuit is to judge the deposit according to the result of comparator output
The device storage state of each,
The digital quantity of the register storage is the digital quantity that the comparator input offset voltage is calibrated, through the digital-to-analogue conversion
Device produces calibration voltage,
The input offset voltage of the calibration voltage and the comparator is summed,
After the digital quantity execution of predetermined figure terminates, dichotomy Approach by inchmeal sequential is completed, calibration voltage and the ratio now
Compared with device input offset voltage and go to zero, the digital self calibration state terminates.
4. amplifier according to claim 1, it is characterised in that the digital self calibration loop also includes supply voltage and examined
Slowdown monitoring circuit, electrification reset circuit, calibration cycle control logic and oscillator,
When electric on the amplifier, the voltage detection circuit detects supply voltage and reaches the comparator normal work
The electrification reset circuit is enabled after voltage,
Cycle resetting time of the electrification reset circuit must be more than each node bias voltage setup time of the comparator and
The oscillator frequency stabilizing time,
Then, the electrification reset circuit is closed, and enables the dichotomy successive approximation register logic circuit,
The voltage detection circuit can continuously detect supply voltage,
When the supply voltage of the amplifier is under-voltage causes circuit cisco unity malfunction, the voltage detection circuit can be with
Signal is produced so that the amplifier is reconfigured for the digital self calibration state, while by the electrification reset circuit
Storage is discharged, to cause the amplifier to re-power calibration cycle control logic described in rear normal reset.
5. amplifier according to claim 1, it is characterised in that the chopper circuit includes being located at amplifier input
The chopping modulation on-off circuit at end, in the amplification output circuit two groups of cascode amplifier sources copped wave solution tune switch
Circuit and the chopping modulation on-off circuit positioned at two gain improvement circuit output ends, the amplifier are configured to described cut
During ripple magnifying state,
The digital quantity that all predetermined figures are deposited in the register is the digital quantity that the amplifier input offset voltage is calibrated, warp
The digital analog converter produces calibration voltage and the input offset voltage of the amplifier is calibrated,
The amplification output circuit and the chopper circuit are operated, and the input signal of the amplifier is by copped wave electricity
Road is connected to the input of the input difference pair, and the input signal is modulated, and the output end of the input difference pair is passed through
The chopper circuit is connected to the source of the cascode amplifier in the amplification output circuit, and the input signal is solved
Adjust,
Finally, the input signal is exported without distortions through the amplification output circuit.
6. a kind of method that amplifier precision is improved by digital self calibration and chopper amplification, the amplifier includes
The amplification path of folded common source and common grid AB classes output, it includes input difference to, two pairs of difference current sources and amplification output
Circuit, the amplification output circuit include with gain improvement circuit two groups of cascode amplifiers and AB classes output circuit and its
Biasing circuit,
Digital self-calibration circuit, it includes comparison output circuit, the dichotomy of predetermined figure that two groups of cascode amplifiers are constituted
Successive approximation register logic circuit and the digital analog converter for calibrating the amplifier mismatch, in addition to supply voltage detection
Circuit, electrification reset circuit, calibration cycle control logic and oscillator,
Chopper circuit, it includes being located at the chopping modulation on-off circuit of the amplifier in, exports electricity positioned at the amplification
The copped wave demodulation on-off circuit of two groups of cascode amplifier sources and positioned at two gain improvement circuit output ends in road
Chopping modulation on-off circuit,
Job step is：
On the amplifier after electricity, the voltage detection circuit, which detects supply voltage and reached, described is comparing output circuit just
The electrification reset circuit is enabled after normal operating voltage,
Then, the electrification reset circuit is closed, and the amplifier is configured to digital self calibration state, the chopper circuit and institute
Amplification output circuit closing is stated, the dichotomy successive approximation register logic circuit is enabled,
Now, the circuit and the output circuit composition comparator that compares of the amplifier mismatch and noise is caused to be operated,
Simultaneously
The input short circuit of the comparator, to cause the input of the comparator to be the equivalent inpnt voltage of the amplifier,
The dichotomy successive approximation register logic circuit is to judge that register is every according to the result of comparator output
The storage state of one,
Now, the digital quantity of the register storage is the digital quantity that the comparator input offset voltage is calibrated, through the number
Weighted-voltage D/A converter produces calibration voltage,
The input offset voltage of the calibration voltage and the comparator is summed,
After the digital quantity execution of predetermined figure terminates, dichotomy Approach by inchmeal sequential is completed, calibration voltage and the ratio now
Compared with device input offset voltage and go to zero, the digital self calibration state terminates,
When the supply voltage of the amplifier is under-voltage causes circuit cisco unity malfunction, the voltage detection circuit can be with
Signal is produced so that the amplifier is reconfigured for the digital self calibration state, while by the electrification reset circuit
Storage is discharged, to cause the amplifier to re-power calibration cycle control logic described in rear normal reset,
After the digital self calibration state terminates, compare output circuit closing, the amplifier is configured to chopper amplification state,
Now, the digital quantity that all predetermined figures are deposited in the register is the numeral that the amplifier input offset voltage is calibrated
Amount, produces calibration voltage through the digital analog converter and the input offset voltage of the amplifier is calibrated, meanwhile,
The amplification output circuit and the chopper circuit are operated, and the input signal of the amplifier is by copped wave electricity
Road is connected to the input of the input difference pair, and the input signal is modulated, and the output end of the input difference pair is passed through
The chopper circuit is connected to the source of the cascode amplifier in the amplification output circuit, and the input signal is solved
Adjust,
Finally, the input signal is exported without distortions through the amplification output circuit.
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Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107911117A (en) * | 2017-11-22 | 2018-04-13 | 成都九芯微科技有限公司 | A kind of high position settling time dynamic calibration circuit |
| CN109922410A (en) * | 2017-12-12 | 2019-06-21 | 络达科技股份有限公司 | Audio system |
| CN110855259A (en) * | 2019-12-19 | 2020-02-28 | 上海宏桐实业有限公司 | Digital compensation differential signal acquisition system circuit and compensation method |
| CN112152569A (en) * | 2019-06-28 | 2020-12-29 | 圣邦微电子（北京）股份有限公司 | Chopper amplification device and method |
| JP2021500784A (en) * | 2017-10-20 | 2021-01-07 | シナプティクス インコーポレイテッド | Systems and methods to mitigate amplifier flicker noise and offset |
| CN112422106A (en) * | 2021-01-25 | 2021-02-26 | 微龛(广州)半导体有限公司 | Comparator for inhibiting offset voltage and method for inhibiting offset voltage of comparator |
| CN112713858A (en) * | 2020-12-22 | 2021-04-27 | 上海东软载波微电子有限公司 | Oscillator |
| CN112799460A (en) * | 2021-01-30 | 2021-05-14 | 珠海巨晟科技股份有限公司 | Comparison circuit with mismatch calibration function |
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