CN107220107A - A kind of multi-clock multi-task parallel real-time emulation system and method - Google Patents
A kind of multi-clock multi-task parallel real-time emulation system and method Download PDFInfo
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/46—Multiprogramming arrangements
- G06F9/48—Program initiating; Program switching, e.g. by interrupt
- G06F9/4806—Task transfer initiation or dispatching
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- G—PHYSICS
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- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/44—Arrangements for executing specific programs
- G06F9/455—Emulation; Interpretation; Software simulation, e.g. virtualisation or emulation of application or operating system execution engines
- G06F9/45533—Hypervisors; Virtual machine monitors
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- G06F9/00—Arrangements for program control, e.g. control units
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- G06F9/5005—Allocation of resources, e.g. of the central processing unit [CPU] to service a request
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- G—PHYSICS
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- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/44—Arrangements for executing specific programs
- G06F9/455—Emulation; Interpretation; Software simulation, e.g. virtualisation or emulation of application or operating system execution engines
- G06F9/45533—Hypervisors; Virtual machine monitors
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Abstract
The invention discloses a kind of multi-clock multi-task parallel real-time emulation system and method, the system is included:Clock zone control module, it is used to obtain some pulse clock sources, and exports some clock drive information to Simulation Control module;Simulation Control module, it is used to, by clock-time scheduling mechanism, be allocated clock drive information and management and control, to some artificial tasks tranmitting data register schedule driven signals, while the data to artificial tasks are monitored in real time;Hardware interface mapping block, it is used in the form of artificial tasks language the operation for describing hardware interface;And artificial tasks module, it is used under the driving of the clock-time scheduling drive signal of Simulation Control module, carries out operation independent, and by hardware interface mapping block, completes corresponding hardware interface operation.The analogue system of the present invention can form homologous clock driving and the driving of isomery clock, so as to meet the parallel artificial requirement of multi-clock multitask by multitask application demand.
Description
Technical field
The invention belongs to engineering system Real-time Simulation Technology field, it is related to a kind of real-time emulation system, and in particular to one
Plant multi-clock multi-task parallel real-time emulation system and method.
Background technology
Real-time emulation system is that control technology realizes that algorithm simulation, progress controlled device modeling and completion control system are closed
The key of ring emulation.It requires that the time scale of artificial tasks and the time scale of real system are consistent, therefore can be real
Shi Wending reception dynamically inputs and sent dynamical output, and real-time emulation system can also access prototype system, so as to avoid
The error that complex system modeling is caused, further ensures the real-time of emulation, therefore its analysis, research in control system
It is widely used with design.
With in control system controlled device it is increasingly sophisticated, multitask emulation difficulty also increasingly increase.Simulated environment
In node it is more, scale is bigger, and required artificial tasks are also more, the direct isomery sex differernce meeting of each artificial tasks
It is increasing.Multitask emulation is mainly manifested on the basis of same periodic duty, the requirement of allocycly task is gradually added,
On the basis of the homologous clock of multitask, the requirement of isomery clock is also gradually added.And traditional replicating machine, for clock pipe
The control of reason concentrates on the homologous synperiodic multitask requirement of solution, it is impossible to solve the multi-clock multitask for the homologous allocycly
Emulation, and isomery clock multi-clock multitask simulation requirements.
In multitask emulation, substantial amounts of artificial tasks are established, and interface, the scheduling mechanism of artificial tasks are not had
The suitable management of effect, influences the execution efficiency of simulation engine and the development efficiency of artificial tasks.In traditional simulation machine, system is adjusted
Degree, the execution of Clock management and artificial tasks are often to mix, and have so both been unfavorable for that development is Clear & Transparent, emulation
The transplanting and maintenance of task, can not more peel off design dependence and artificial tasks of the artificial tasks to particular dummy system to specific
The design of clock source is relied on.
With the more maturation of distributed application environment, bus communication technology has obtained more concerns and application, bus
It can be the passage of each artificial tasks and simulation node data exchange.The clock for completing each artificial tasks by bus is adjusted
Degree, can not only save existing clock sources, can more utilize bus data driving, the design of optimization Simulation task, tradition
Replicating machine can not obtain bus data driving as simulation clock in data/address bus, and this results in traditional replicating machine to distribution
The limitation of formula application is greatly increased.
With developing rapidly for control system industry, the development of artificial tasks, it will have quick design, high-speed simulation, soon
The design requirement of speed checking.This has higher utilization rate the need for meaning that to emulator resource.Traditional emulation is set
It is standby that the support of hardware resource and system resource can only be provided to one group of artificial tasks, it is impossible to realize the multiplexing of simulation system device.
Chinese Authorization Notice No. is CN102929158B patent of invention, discloses a kind of multinuclear multi-model parallel distributed
Real-time emulation system, which depict a kind of method for providing task scheduling, completes the emulation work(of multi-model on polycaryon processor
Can, but multi-clock application can not be emulated.
Chinese Authorization Notice No. is CN103136032B patent of invention, discloses a kind of multi-core system parallel artificial system
System, which depict the simulation model for determining hardware environment is directed to quickly to build, is adjusted so as to accelerate to multi-core system static state
The checking of algorithm is spent, but does not provide emulation to multitask application and multi-clock application and is supported.
The content of the invention
It is an object of the invention to provide a kind of multi-clock multi-task parallel real-time emulation system and method, system solves the problem
The problem of prior art can not carry out the emulation of multi-clock multitask, can form homologous clock by multitask application demand
Driving and the driving of isomery clock, the emulation demand of multitask is driven with this.
In order to achieve the above object, the invention provides a kind of multi-clock multi-task parallel real-time emulation system, the system
Comprising:Clock zone control module, it is used to obtain some pulse clock sources, and exports some clock drives to Simulation Control module
Information;Simulation Control module, it is used for by clock-time scheduling mechanism, and described clock drive information is allocated and management and control,
To some artificial tasks tranmitting data register schedule driven signals, while the data to artificial tasks are monitored in real time;Hardware interface
Mapping block, it is used in the form of artificial tasks language the operation for describing hardware interface;And artificial tasks module, it is used for
Under the driving of the clock-time scheduling drive signal of described Simulation Control module, an operation independent is carried out, and by described
Hardware interface mapping block, completes once corresponding hardware interface operation.
Wherein, described clock drive packet contains:Homologous clock drive information and/or isomery clock drive information.
Wherein, described artificial tasks are included:Some synchronism tasks and/or some asynchronism tasks.
Described clock zone control module is included:Pulse clock acquisition submodule, it is used to carry out in pulse clock source
The collection of clock signal, carries out interruption commission by the pulse clock source collected, is sent to clock drive submodule;Bus clock
Acquisition submodule, it is used for the collection for carrying out bus signals in the bus, and the data signal bus collected is carried out into data drive
It is dynamic, and interruption commission is carried out, it is sent to clock drive submodule;Clock drive submodule, when it is used to receive described pulse
The interruption commission of clock acquisition submodule and bus clock acquisition submodule, pulse clock signal or bus data drive when received
During dynamic signal, clock drive submodule will produce clock drive signal, and be sent to described Simulation Control module.
Described Simulation Control module is included:Resource distribution submodule, it is used for the resource distribution of some artificial tasks
Information, is sent to artificial tasks collection intermediate layer submodule, while the clock information of some artificial tasks is sent into clock
Dispatch submodule;Clock-time scheduling submodule, it is used to from described clock zone control module obtain clock drive information;Emulation
Task-set intermediate layer submodule, it is used to be defined the base attribute of artificial tasks, and according to resource allocation information and when
Clock excitation information, instantiates some artificial tasks, forms artificial tasks collection.
The base attribute of described artificial tasks is included:Processor information that artificial tasks are run, hardware environment, monitoring
Bus environment, and clock drive information interface.
Described Simulation Control module is also included:Artificial tasks collection dispatches submodule, and it is used to hang up artificial tasks module,
When clock drive is triggered, after artificial tasks module receives corresponding clock drive information, sent to artificial tasks module
The clock-time scheduling drive signal of corresponding artificial tasks.
Described Simulation Control module is also included:Data find submodule, and it is used for the monitored data in controlling bus please
Information, and the queue in described artificial tasks collection scheduling submodule by intertask communication are asked, is completed to required data
Extract;Data simultaneous interpretation submodule, it is used to find data content in submodule by controlling bus to imitative described data
True system dynamic monitoring host computer is sent, while the modification emulation data command that analogue system dynamically monitors host computer is also received,
Data to corresponding artificial tasks module are modified;And data storage submodule, it is used for described data discovery
Data content in submodule, analogue system dynamically the modification emulation data command of monitoring host computer and data simultaneous interpretation submodule
Operation content is locally stored.
The hardware operation of described hardware interface mapping block specification includes:Analog acquisition operation, analog output behaviour
Work, internal memory swap operation between I/O interfaces read-write operation, task, bus data read-write operation, reflective memory data read-write operation and
Network communication protocol read-write operation;Described bus data read-write operation includes:CAN data read-write operation and 1553B are total
Line data read-write operation.
Present invention also offers a kind of homologous allocycly and/or the method for isomery multitask clock-time scheduling, this method is used
Described multi-clock multi-task parallel real-time emulation system, it is included:
The first step:Disposed in resource distribution submodule each synchronism or/and asynchronism task M_1, M_2 ... Mi ...,
M_n } the clock information cycle T_1, T_2 ... Ti ..., T_n };
Second step:In the initialization procedure of analogue system, clock-time scheduling submodule loading resource distribution submodule obtains synchronous
Property or/and asynchronism job M_1, M_2 ... Mi ..., M_n } the clock information cycle T_1, T_2,
...Ti, …, T_n};
3rd step:Clock drive is hung up in clock drive submodule, clock drive triggering is waited;
4th step:In synchronizing property task, when clock drive is triggered, mark current state clock T and added up, time
The clock information cycle { T_1, T_2 ... Ti ..., T_n } of synchronism task is gone through, whether state timer T meets T before judging
==T_i, triggering correspondence task M_i clock-time scheduling drive signal, otherwise until traversal is completed, is waited next when meeting the condition
Individual clock drive;When carrying out asynchronism task, when isomery clock i clock drive i triggerings, clock-time scheduling drive signal i
Triggering, asynchronism task i responses are performed, and wait remaining clock drive to trigger.
Present invention also offers a kind of homologous allocycly and/or the clock signal responder of isomery multitask clock-time scheduling
Method, this method triggers clock drive by the method according to described homologous allocycly and/or isomery multitask clock-time scheduling,
As current time ti=Ti, i-th of clock-time scheduling drive signal is triggered, i-th of synchronism or/and asynchronism task is responded
Perform.
When carrying out n synchronism task, the fundamental frequency of homologous clock is T0, as Ti=i*T0,0<I≤n, and be natural number
When, at the ti moment, for p-th of synchronism task, 0<P≤n and for natural number, when i can divided evenly p when, p-th of clock is adjusted
Drive signal triggering is spent, p-th of synchronism task response is performed;When i can not divided evenly p when, p-th of clock-time scheduling drive signal
Do not trigger;As i=0, at the t0 moment, n clock-time scheduling drive signal corresponding with n synchronism task is triggered, n
Synchronism task responds execution.
When carrying out n asynchronism task, the triggered time of each corresponding clock-time scheduling drive signal of asynchronism task
Separate, each asynchronism task is responded execution respectively, each asynchronism task does not have common synchronization node.
The present invention multi-clock multi-task parallel real-time emulation system and method, solve prior art can not carry out it is many
The problem of emulation of clock multitask, with advantages below:
(1)The analogue system of the present invention is allocated and dispatched by the clock drive information to collection, is needed by multitask application
Ask, form homologous clock driving and the driving of isomery clock, the emulation demand of multitask is driven with this;
(2)The present invention is by artificial tasks collection intermediate layer submodule by the otherness resource of each artificial tasks(CPU, hardware loop
Border, controlling bus environment and clock drive information)Detached in itself with artificial tasks, make the design of artificial tasks, safeguard
It is more flexibly and independent;
(3)The present invention is driven to the method for simulation clock with bus data, extends the multi-clock application of analogue system, and distribution
Formula bus application scenarios;
(4)The present invention can carry out isomery clock multitask clock-time scheduling, and under conditions of hardware resource does not conflict, multitask is simultaneously
The no associate feature of row operation, allows analogue system to deploy to apply to multiple artificial tasks, adds simulation system device
Durability, improves the utilization rate of equipment;
(5)The present invention provides analogue system for the application of the real-time simulation of many unit formation types, and system of the invention both may be used
The emulation of formation type is carried out using the aggregate as many units, can also be participated in as unit individual in the set of many units
Carry out the emulation of formation type.When the aggregate as many units, each unit is appointed as the synchronism in this analogue system
Business application, by homologous clock control;During as unit individual, this analogue system is one of synchronism in fleet system
Task application, by the homologous clock control in fleet system.
Brief description of the drawings
Fig. 1 is the structural representation of the multi-clock multi-task parallel real-time emulation system of the embodiment of the present invention 1.
Fig. 2 is the flow chart of the homologous allocycly multitask clock-time scheduling of the embodiment of the present invention 1.
Fig. 3 is the timing diagram of the homologous allocycly multitask clock-time scheduling of the embodiment of the present invention 1.
Fig. 4 is the flow chart of the isomery clock multitask clock-time scheduling of the embodiment of the present invention 2.
Fig. 5 is the timing diagram of the isomery clock multitask clock-time scheduling of the embodiment of the present invention 2.
Embodiment
Technical scheme is described further below in conjunction with drawings and examples.
The multi-clock multi-task parallel real-time emulation system of the present invention, the system is included:Clock zone control module, it is used for
Some pulse clock sources are obtained, and some clock drive information are exported to Simulation Control module;Simulation Control module, it is used for pair
Clock drive information is allocated and management and control, to some artificial tasks tranmitting data register excitation informations, while to the number of artificial tasks
According to being monitored in real time;Hardware interface mapping block, it is used in the form of artificial tasks language the operation for describing hardware interface;
And artificial tasks module, it is used under the driving of the clock drive information of Simulation Control module, completes an operation independent,
And by hardware interface mapping block, complete once corresponding hardware interface operation.
Above-mentioned clock drive packet contains:Homologous clock drive information and/or isomery clock drive information.Artificial tasks bag
Contain:Some synchronism tasks and/or some asynchronism tasks.
Above-mentioned clock zone control module is included:Pulse clock acquisition submodule, when it is used to carry out in pulse clock source
The collection of clock signal, carries out interruption commission by the pulse clock source collected, is sent to clock drive submodule;Bus clock is obtained
Submodule is taken, it is used for the collection for carrying out bus signals in the bus, the data signal bus collected is subjected to data-driven,
And interruption commission is carried out, it is sent to clock drive submodule;Clock drive submodule, it is used to receive pulse clock acquisition submodule
The interruption commission of block and bus clock acquisition submodule, pulse clock signal or during bus data drive signal when received,
Clock drive submodule will produce clock drive signal, and be sent to Simulation Control module.
Above-mentioned Simulation Control module is included:Resource distribution submodule, it is used for the resource distribution letter of some artificial tasks
Breath, is sent to artificial tasks collection intermediate layer submodule, is adjusted while the clock information of some artificial tasks is sent into clock
Spend submodule;Clock-time scheduling submodule, it is used to from clock zone control module obtain clock drive information;Artificial tasks are concentrated
Interbed submodule, it is used to be defined the base attribute of artificial tasks, and is believed according to resource allocation information and clock drive
Breath, instantiates some artificial tasks, forms artificial tasks collection.
The base attribute of above-mentioned artificial tasks is included:Processor information that artificial tasks are run, hardware environment, monitoring are total
Thread environment, and clock drive information interface.
Above-mentioned Simulation Control module is also included:Artificial tasks collection dispatches submodule, and it is used to hang up artificial tasks module, when
When clock drive is triggered, after artificial tasks module receives corresponding clock drive information, to the transmission pair of artificial tasks module
The clock-time scheduling drive signal for the artificial tasks answered.
Above-mentioned Simulation Control module is also included:Data find submodule, and it, which is used for the monitored data in controlling bus, asks
Information, and the queue in artificial tasks collection dispatches submodule by intertask communication, complete the extraction to required data;Data
Simultaneous interpretation submodule, it is used to finding data into that the data content in submodule is dynamically monitored by controlling bus to analogue system
Position machine is sent, while the modification emulation data command that analogue system dynamically monitors host computer is also received, to corresponding artificial tasks
The data of module are modified;And data storage submodule, its data content being used to find data in submodule, emulation
Dynamically the modification emulation data command of monitoring host computer and the operation content of data simultaneous interpretation submodule are locally stored system.
The hardware operation of above-mentioned hardware interface mapping block specification also includes(But it is not limited to):Analog acquisition operation, mould
Analog quantity output operation, internal memory swap operation, bus data read-write operation, reflective memory data between I/O interfaces read-write operation, task
Read-write operation and network communication protocol read-write operation.The hardware operation of above-mentioned hardware interface mapping block specification can also be other
Expansible custom hardware interface operation.
Above-mentioned bus data read-write operation includes:CAN data read-write operation and 1553B bus data read-write operations.
A kind of homologous allocycly of the present invention and/or the method for isomery multitask clock-time scheduling, this method use multi-clock
Multi-task parallel real-time emulation system, it is included:
The first step:Disposed in resource distribution submodule each synchronism or/and asynchronism task M_1, M_2 ... Mi ...,
M_n } the clock information cycle T_1, T_2 ... Ti ..., T_n };
Second step:In the initialization procedure of analogue system, clock-time scheduling submodule loading resource distribution submodule obtains synchronous
Property or/and asynchronism job M_1, M_2 ... Mi ..., M_n } the clock information cycle T_1, T_2,
...Ti, …, T_n};
3rd step:Clock drive is hung up in clock drive submodule, clock drive triggering is waited;
4th step:In synchronizing property task, when clock drive is triggered, mark current state clock T and added up, time
The clock information cycle { T_1, T_2 ... Ti ..., T_n } of synchronism task is gone through, whether state timer T meets T before judging
==T_i, triggering correspondence task M_i clock-time scheduling drive signal, otherwise until traversal is completed, is waited next when meeting the condition
Individual clock drive;When carrying out asynchronism task, when isomery clock i clock drive i triggerings, clock-time scheduling drive signal i
Triggering, asynchronism task i responses are performed, and wait remaining clock drive to trigger.
A kind of homologous allocycly of the present invention and/or the clock signal response method of isomery multitask clock-time scheduling, the party
Method triggers clock drive by the method according to homologous allocycly and/or isomery multitask clock-time scheduling, when current time ti=
During Ti, i-th of clock-time scheduling drive signal is triggered, i-th of synchronism or/and asynchronism task is responded and performs.
When carrying out n synchronism task, the fundamental frequency of homologous clock is T0, as Ti=i*T0,0<I≤n, and be natural number
When, at the ti moment, for p-th of synchronism task, 0<P≤n and for natural number, when i can divided evenly p when, p-th of clock is adjusted
Drive signal triggering is spent, p-th of synchronism task response is performed;When i can not divided evenly p when, p-th of clock-time scheduling drive signal
Do not trigger;As i=0, at the t0 moment, n clock-time scheduling drive signal corresponding with n synchronism task is triggered, n
Synchronism task responds execution.
When carrying out n asynchronism task, the triggered time of each corresponding clock-time scheduling drive signal of asynchronism task
Separate, each asynchronism task is responded execution respectively, each asynchronism task does not have common synchronization node.
Embodiment 1
As shown in figure 1, the structural representation of the multi-clock multi-task parallel real-time emulation system for the embodiment of the present invention 1, this is
System is included:Simulation Control module 1, clock zone control module 2, artificial tasks module 3 and hardware interface mapping block 4.
Wherein, Simulation Control module 1 is included:Resource distribution submodule 101, artificial tasks collection scheduling submodule 102, emulation
Task-set intermediate layer submodule 103, clock-time scheduling submodule 104, data find submodule 105, the and of data simultaneous interpretation submodule 106
Data storage submodule 106.
Wherein, clock zone control module 2 is included:Pulse clock acquisition submodule 202, bus clock acquisition submodule 203
With clock drive submodule 201.
A kind of method of homologous allocycly multitask clock-time scheduling, as shown in Fig. 2 being the homologous different of the embodiment of the present invention 1
The flow chart of cycle multitask clock-time scheduling, when carrying out homologous allocycly multitask clock-time scheduling driving, method is specific as follows:
First step S1:Disposed in resource distribution submodule 101 each synchronism task M_1, M_2 ... Mi ..., M_n }
The clock information cycle T_1, T_2 ... Ti ..., T_n };
Second step S2:Clock-time scheduling submodule 104 carries out resource distribution submodule 101 in the initialization procedure of analogue system
Loading, obtain synchronism task { M_1, M_2 ... Mi ..., M_n } the clock information cycle T_1, T_2,
...Ti, …, T_n};
3rd step S3:Clock drive is hung up in clock drive submodule, clock drive triggering is waited;
4th step S4:When clock drive is triggered, mark current state clock T is added up, and travels through the clock of synchronism task
Information cycle T_1, T_2 ... and Ti ..., T_n }, whether state timer T meets T==T_i before judging, when meeting the condition
Triggering correspondence task M_i clock-time scheduling drive signal, otherwise until traversal is completed, waits next clock drive.
A kind of clock signal response method of homologous allocycly multitask clock-time scheduling, as shown in figure 3, being present invention implementation
Contain in the artificial tasks of analogue system in the timing diagram of the homologous allocycly multitask clock-time scheduling of example 1, the present embodiment:Three
Individual synchronism task, respectively synchronism task 1A(1st synchronism task), synchronism task 2A(2nd synchronism is appointed
Business)With synchronism task 3A(3rd synchronism task).Synchronism task 1A emulation cycle(That is clock information cycle)It is
T1, synchronism task 2A emulation cycle(That is clock information cycle)It is T2, synchronism task 3A emulation cycle(I.e. clock is believed
The breath cycle)It is T3.The fundamental frequency of the homologous clock of the system is T0.Wherein, T1=T0, T2=2T0, T3=3T0.The homologous allocycly is more
After task clock scheduling starts, the task response condition of different cycles is specific as follows:
(1)Work as t0(t0=0)During triggering, clock-time scheduling drive signal 1B(1st clock-time scheduling drive signal)Triggering, synchronism
Task 1A responses are performed;Clock-time scheduling drive signal 2B(2nd clock-time scheduling drive signal)Triggering, synchronism task 2A responses
Perform;Clock-time scheduling drive signal 3B(3rd clock-time scheduling drive signal)Triggering, synchronism task 3A responses are performed;
(2)Work as t1(t1=T1)During triggering, clock-time scheduling drive signal 1B triggerings, synchronism task 1A responses are performed;Clock-time scheduling
Drive signal 2B is not triggered, and clock-time scheduling drive signal 3B is not triggered;
(3)Work as t2(t2=T2)During triggering, clock-time scheduling drive signal 1B triggerings, synchronism task 1A responses are performed;Clock-time scheduling
Drive signal 2B is triggered, and synchronism task 2A responses are performed;Clock-time scheduling drive signal 3B is not triggered;
(4)Work as t3(t3=T3)During triggering, clock-time scheduling drive signal 1B triggerings, synchronism task 1A responses are performed;Clock-time scheduling
Drive signal 2B is not triggered;Clock-time scheduling drive signal 3B is triggered, and synchronism task 3A responses are performed;
(5)Work as t4(t4=4T0)During triggering, clock-time scheduling drive signal 1B triggerings, synchronism task 1A responses are performed;Clock is adjusted
Drive signal 2B triggerings are spent, synchronism task 2A responses are performed;Clock-time scheduling drive signal 3B is not triggered;
(6)Work as t5(t5=5T0)During triggering, clock-time scheduling drive signal 1B triggerings, synchronism task 1A responses are performed;Clock is adjusted
Degree drive signal 2B is not triggered;Clock-time scheduling drive signal 3B is not triggered;
(7)Work as t6(t6=6T0)During triggering, clock-time scheduling drive signal 1B triggerings, the response of synchronism task 1 is performed;Clock-time scheduling
Drive signal 2B is triggered, and synchronism task 2A responses are performed;Clock-time scheduling drive signal 3B is triggered, and synchronism task 3A responses are held
OK.
T0 and t6 is the synchronous point of the artificial tasks collection in above-mentioned homologous allocycly multitask clock-time scheduling.
Embodiment 2
A kind of method of isomery multitask clock-time scheduling, as shown in figure 4, for the embodiment of the present invention 2 isomery clock multitask when
The flow chart of clock scheduling, when carrying out the driving of isomery clock multitask clock-time scheduling, method is specific as follows:
First step S1 ':Be deployed with resource distribution submodule 101 each asynchronism task M_1, M_2 ... Mi ..., M_
N } the clock information cycle T_1, T_2 ... Ti ..., T_n };
Second step S2 ':Clock-time scheduling submodule 104 carries out resource distribution submodule 101 in the initialization procedure of analogue system
Loading, obtain asynchronism task { M_1, M_2 ... Mi ..., M_n } the clock information cycle T_1, T_2,
...Ti, …, T_n}
3rd step S3 ':Each isomery clock drive is hung up in clock drive submodule, clock drive triggering is waited;
4th step S4 ':When isomery clock i clock drive i triggerings, clock-time scheduling drive signal i triggerings, asynchronism task i
Response is performed, and waits remaining clock drive to trigger.
A kind of clock signal response method of isomery multitask clock-time scheduling, as shown in figure 5, being the embodiment of the present invention 2
Also contain in the artificial tasks of analogue system in the timing diagram of isomery clock multitask clock-time scheduling, the present embodiment:Two different
Step property task, respectively asynchronism task 1A '(1st asynchronism task)With asynchronism task 2A '(2nd asynchronism is appointed
Business).Asynchronism task 1A ' emulation cycle(That is clock information cycle)It is T1, asynchronism task 2A ' emulation cycle(Immediately
Clock information cycle)It is T2.After isomery clock multitask clock-time scheduling starts, the task response condition of different cycles is specific as follows:
(1)When t0, t1, t2, t3, t4, t5, t6 are triggered, clock-time scheduling drive signal 1B '(1st clock-time scheduling driving letter
Number)Triggering, the A ' of asynchronism task 1 responses are performed;
(2)When t10, t11, t12, t13, triggering, t10 is compared with the slow half periods of t0, and t11 is compared with the slow half periods of t2, and t12 is slow compared with t4
Half period, t13 is compared with the slow half periods of t6, clock-time scheduling drive signal 2B '(2nd clock-time scheduling drive signal)Triggering, it is different
A ' the responses of step property task 2 are performed;
Above-mentioned asynchronism task 1 and asynchronism task 2 do not have common synchronization node.
In summary, multi-clock multi-task parallel real-time emulation system of the invention and method, the system can be by many
Business application demand, forms homologous clock driving and the driving of isomery clock, so as to meet the parallel artificial requirement of multi-clock multitask.
Although present disclosure is discussed in detail by above preferred embodiment, but it should be appreciated that above-mentioned
Description is not considered as limitation of the present invention.After those skilled in the art have read the above, for the present invention's
A variety of modifications and substitutions all will be apparent.Therefore, protection scope of the present invention should be limited to the appended claims.
Claims (10)
1. a kind of multi-clock multi-task parallel real-time emulation system, it is characterised in that the system is included:
Clock zone control module, it is used to obtain some pulse clock sources, and exports some clock drives to Simulation Control module
Information;
Simulation Control module, it is used for by clock-time scheduling mechanism, and described clock drive information is allocated and management and control, to
Some artificial tasks tranmitting data register schedule driven signals, while the data to artificial tasks are monitored in real time;
Hardware interface mapping block, it is used in the form of artificial tasks language the operation for describing hardware interface;And
Artificial tasks module, it is used under the driving of the clock-time scheduling drive signal of described Simulation Control module, carries out one
Secondary operation independent, and by described hardware interface mapping block, complete once corresponding hardware interface operation;
Wherein, described clock drive packet contains:Homologous clock drive information and/or isomery clock drive information;
Wherein, described artificial tasks are included:Some synchronism tasks and/or some asynchronism tasks.
2. multi-clock multi-task parallel real-time emulation system according to claim 1, it is characterised in that described clock zone
Control module is included:
Pulse clock acquisition submodule, it is used for the collection for entering row clock signal in pulse clock source, by the pulse collected
Clock source carries out interruption commission, is sent to clock drive submodule;
Bus clock acquisition submodule, it is used for the collection for carrying out bus signals in the bus, by the number of buses collected it is believed that
Number data-driven is carried out, and carry out interruption commission, be sent to clock drive submodule;
Clock drive submodule, it is used to receive in described pulse clock acquisition submodule and bus clock acquisition submodule
Disconnected commission, pulse clock signal or during bus data drive signal when received, clock drive submodule swashs clock is produced
Signal is encouraged, and is sent to described Simulation Control module.
3. multi-clock multi-task parallel real-time emulation system according to claim 2, it is characterised in that described emulation control
Molding block is included:
Resource distribution submodule, it is used to be sent to the resource allocation information of some artificial tasks in the middle of artificial tasks collection
Straton module, while the clock information of some artificial tasks is sent into clock-time scheduling submodule;
Clock-time scheduling submodule, it is used to from described clock zone control module obtain clock drive information;
Artificial tasks collection intermediate layer submodule, it is used to be defined the base attribute of artificial tasks, and according to resource distribution
Information and clock drive information, instantiate some artificial tasks, form artificial tasks collection.
4. multi-clock multi-task parallel real-time emulation system according to claim 3, it is characterised in that described emulation is appointed
The base attribute of business is included:Processor information that artificial tasks are run, hardware environment, controlling bus environment, and clock swash
Encourage information interface.
5. multi-clock multi-task parallel real-time emulation system according to claim 3, it is characterised in that described emulation control
Molding block is also included:
Artificial tasks collection dispatches submodule, and it is used to hang up artificial tasks module, when clock drive is triggered, in artificial tasks mould
Block is received after corresponding clock drive information, and the clock-time scheduling for sending corresponding artificial tasks to artificial tasks module, which drives, to be believed
Number.
6. multi-clock multi-task parallel real-time emulation system according to claim 5, it is characterised in that described emulation control
Molding block is also included:
Data find submodule, and it is used for the monitored data solicited message in controlling bus, and is adjusted in described artificial tasks collection
The queue by intertask communication in submodule is spent, the extraction to required data is completed;
Data simultaneous interpretation submodule, it is used to find data content in submodule by controlling bus to emulation described data
Dynamically monitoring host computer is sent system, while the modification emulation data command of analogue system dynamic monitoring host computer is also received, it is right
The data of corresponding artificial tasks module are modified;And
Data storage submodule, its data content being used to find described data in submodule, analogue system are dynamically monitored
The modification emulation data command of host computer and the operation content of data simultaneous interpretation submodule are locally stored.
7. multi-clock multi-task parallel real-time emulation system according to claim 3, it is characterised in that described hardware connects
The hardware operation of mouth mapping block specification includes:Analog acquisition operation, analog output operation, I/O interfaces read-write operation, appoint
Internal memory swap operation, bus data read-write operation, reflective memory data read-write operation and network communication protocol read-write operation between business;
Described bus data read-write operation includes:CAN data read-write operation and 1553B bus data read-write operations.
8. a kind of homologous allocycly and/or the method for isomery multitask clock-time scheduling, it is characterised in that this method will using right
The multi-clock multi-task parallel real-time emulation system described in any one in 3-7 is sought, it is included:
The first step:Disposed in resource distribution submodule each synchronism or/and asynchronism task M_1, M_2 ... Mi ...,
M_n } the clock information cycle T_1, T_2 ... Ti ..., T_n };
Second step:In the initialization procedure of analogue system, clock-time scheduling submodule loading resource distribution submodule obtains synchronous
Property or/and asynchronism job M_1, M_2 ... Mi ..., M_n } the clock information cycle T_1, T_2,
...Ti, …, T_n};
3rd step:Clock drive is hung up in clock drive submodule, clock drive triggering is waited;
4th step:In synchronizing property task, when clock drive is triggered, mark current state clock T and added up, time
The clock information cycle { T_1, T_2 ... Ti ..., T_n } of synchronism task is gone through, whether state timer T meets T before judging
==T_i, triggering correspondence task M_i clock-time scheduling drive signal, otherwise until traversal is completed, is waited next when meeting the condition
Individual clock drive;When carrying out asynchronism task, when isomery clock i clock drive i triggerings, clock-time scheduling drive signal i
Triggering, asynchronism task i responses are performed, and wait remaining clock drive to trigger.
9. a kind of homologous allocycly and/or the clock signal response method of isomery multitask clock-time scheduling, it is characterised in that the party
Method is swashed by homologous allocycly according to claim 8 and/or the method for isomery multitask clock-time scheduling, triggering clock
Encourage, as current time ti=Ti, trigger i-th of clock-time scheduling drive signal, ring i-th of synchronism or/and asynchronism task
It should perform.
10. homologous allocycly according to claim 9 and/or the clock signal responder of isomery multitask clock-time scheduling
Method, it is characterised in that when carrying out n synchronism task, the fundamental frequency of homologous clock is T0, as Ti=i*T0,0<I≤n, and be
During natural number, at the ti moment, for p-th of synchronism task, 0<P≤n and for natural number, when i can divided evenly p when, p-th
Clock-time scheduling drive signal is triggered, and p-th of synchronism task response is performed;When i can not divided evenly p when, p-th clock-time scheduling is driven
Dynamic signal is not triggered;As i=0, at the t0 moment, n clock-time scheduling drive signal corresponding with n synchronism task is touched
Hair, n synchronism task responds execution;
When carrying out n asynchronism task, the triggered time of each corresponding clock-time scheduling drive signal of asynchronism task separates,
Each asynchronism task is set to respond execution respectively, each asynchronism task does not have common synchronization node.
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Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN110609555A (en) * | 2019-09-20 | 2019-12-24 | 百度在线网络技术(北京)有限公司 | Method, apparatus, electronic device, and computer-readable storage medium for signal control |
CN111008065A (en) * | 2019-12-05 | 2020-04-14 | 南京科太智汇科技有限公司 | Multi-branch parallel simulation method |
CN111752692A (en) * | 2020-06-23 | 2020-10-09 | 北京经纬恒润科技有限公司 | Multi-core task processing method and device under simulation environment |
CN117521583A (en) * | 2023-11-17 | 2024-02-06 | 中科苏州智能计算技术研究院 | Software and hardware joint simulation method and system driven by clock and storage medium |
CN117608207A (en) * | 2024-01-18 | 2024-02-27 | 成都流体动力创新中心 | Communication system and method based on reflective memory network |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101719078A (en) * | 2009-12-15 | 2010-06-02 | 北京空间飞行器总体设计部 | Parallel computation management-based autonomous navigation simulation and scheduling management system |
CN101741850A (en) * | 2009-12-25 | 2010-06-16 | 北京邮电大学 | Multitask concurrent executive system and method for hybrid network service |
CN102929158A (en) * | 2012-10-30 | 2013-02-13 | 北京华力创通科技股份有限公司 | Multi-core multi-model parallel distributed type real-time simulation system |
US20170123861A1 (en) * | 2011-12-29 | 2017-05-04 | Oracle International Corporation | Efficiency sequencer for multiple concurrently-executing threads of execution |
-
2017
- 2017-06-29 CN CN201710517925.7A patent/CN107220107B/en active Active
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101719078A (en) * | 2009-12-15 | 2010-06-02 | 北京空间飞行器总体设计部 | Parallel computation management-based autonomous navigation simulation and scheduling management system |
CN101741850A (en) * | 2009-12-25 | 2010-06-16 | 北京邮电大学 | Multitask concurrent executive system and method for hybrid network service |
US20170123861A1 (en) * | 2011-12-29 | 2017-05-04 | Oracle International Corporation | Efficiency sequencer for multiple concurrently-executing threads of execution |
CN102929158A (en) * | 2012-10-30 | 2013-02-13 | 北京华力创通科技股份有限公司 | Multi-core multi-model parallel distributed type real-time simulation system |
Cited By (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN110609555A (en) * | 2019-09-20 | 2019-12-24 | 百度在线网络技术(北京)有限公司 | Method, apparatus, electronic device, and computer-readable storage medium for signal control |
CN110609555B (en) * | 2019-09-20 | 2023-05-26 | 百度在线网络技术(北京)有限公司 | Method, apparatus, electronic device, and computer-readable storage medium for signal control |
CN111008065A (en) * | 2019-12-05 | 2020-04-14 | 南京科太智汇科技有限公司 | Multi-branch parallel simulation method |
CN111752692A (en) * | 2020-06-23 | 2020-10-09 | 北京经纬恒润科技有限公司 | Multi-core task processing method and device under simulation environment |
CN111752692B (en) * | 2020-06-23 | 2024-04-12 | 北京经纬恒润科技股份有限公司 | Multi-core task processing method and device in simulation environment |
CN117521583A (en) * | 2023-11-17 | 2024-02-06 | 中科苏州智能计算技术研究院 | Software and hardware joint simulation method and system driven by clock and storage medium |
CN117608207A (en) * | 2024-01-18 | 2024-02-27 | 成都流体动力创新中心 | Communication system and method based on reflective memory network |
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