CN107204371A - A kind of ferro-electric field effect transistor and preparation method thereof - Google Patents
A kind of ferro-electric field effect transistor and preparation method thereof Download PDFInfo
- Publication number
- CN107204371A CN107204371A CN201710338715.1A CN201710338715A CN107204371A CN 107204371 A CN107204371 A CN 107204371A CN 201710338715 A CN201710338715 A CN 201710338715A CN 107204371 A CN107204371 A CN 107204371A
- Authority
- CN
- China
- Prior art keywords
- ferro
- field effect
- effect transistor
- electric field
- film
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000002360 preparation method Methods 0.000 title claims abstract description 12
- 238000002353 field-effect transistor method Methods 0.000 title abstract description 5
- 239000000463 material Substances 0.000 claims abstract description 53
- 239000004065 semiconductor Substances 0.000 claims abstract description 40
- 230000005669 field effect Effects 0.000 claims abstract description 32
- 238000000034 method Methods 0.000 claims abstract description 26
- 239000000758 substrate Substances 0.000 claims abstract description 14
- 239000002086 nanomaterial Substances 0.000 claims abstract description 9
- 229910052751 metal Inorganic materials 0.000 claims description 14
- 239000002184 metal Substances 0.000 claims description 14
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 claims description 10
- 239000010410 layer Substances 0.000 claims description 10
- 238000012546 transfer Methods 0.000 claims description 9
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 7
- 238000000576 coating method Methods 0.000 claims description 7
- 238000001704 evaporation Methods 0.000 claims description 7
- 230000008020 evaporation Effects 0.000 claims description 7
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 claims description 5
- 239000002033 PVDF binder Substances 0.000 claims description 5
- 238000010894 electron beam technology Methods 0.000 claims description 5
- 229920000642 polymer Polymers 0.000 claims description 5
- 229920002981 polyvinylidene fluoride Polymers 0.000 claims description 5
- 229910052582 BN Inorganic materials 0.000 claims description 4
- PZNSFCLAULLKQX-UHFFFAOYSA-N Boron nitride Chemical compound N#B PZNSFCLAULLKQX-UHFFFAOYSA-N 0.000 claims description 4
- VYZAMTAEIAYCRO-UHFFFAOYSA-N Chromium Chemical compound [Cr] VYZAMTAEIAYCRO-UHFFFAOYSA-N 0.000 claims description 4
- 238000005516 engineering process Methods 0.000 claims description 4
- 239000000377 silicon dioxide Substances 0.000 claims description 4
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 3
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 claims description 3
- 229910021389 graphene Inorganic materials 0.000 claims description 3
- 235000016768 molybdenum Nutrition 0.000 claims description 3
- CWQXQMHSOZUFJS-UHFFFAOYSA-N molybdenum disulfide Chemical compound S=[Mo]=S CWQXQMHSOZUFJS-UHFFFAOYSA-N 0.000 claims description 3
- 229910052982 molybdenum disulfide Inorganic materials 0.000 claims description 3
- 229910002113 barium titanate Inorganic materials 0.000 claims description 2
- JRPBQTZRNDNNOP-UHFFFAOYSA-N barium titanate Chemical compound [Ba+2].[Ba+2].[O-][Ti]([O-])([O-])[O-] JRPBQTZRNDNNOP-UHFFFAOYSA-N 0.000 claims description 2
- 229910052681 coesite Inorganic materials 0.000 claims description 2
- 229910052906 cristobalite Inorganic materials 0.000 claims description 2
- 229910052451 lead zirconate titanate Inorganic materials 0.000 claims description 2
- HFGPZNIAWCZYJU-UHFFFAOYSA-N lead zirconate titanate Chemical compound [O-2].[O-2].[O-2].[O-2].[O-2].[Ti+4].[Zr+4].[Pb+2] HFGPZNIAWCZYJU-UHFFFAOYSA-N 0.000 claims description 2
- 239000002127 nanobelt Substances 0.000 claims description 2
- 238000003672 processing method Methods 0.000 claims description 2
- KVXHGSVIPDOLBC-UHFFFAOYSA-N selanylidenetungsten Chemical class [Se].[W] KVXHGSVIPDOLBC-UHFFFAOYSA-N 0.000 claims description 2
- 239000002094 self assembled monolayer Substances 0.000 claims description 2
- 239000013545 self-assembled monolayer Substances 0.000 claims description 2
- 229910052682 stishovite Inorganic materials 0.000 claims description 2
- 229910052905 tridymite Inorganic materials 0.000 claims description 2
- ITRNXVSDJBHYNJ-UHFFFAOYSA-N tungsten disulfide Chemical compound S=[W]=S ITRNXVSDJBHYNJ-UHFFFAOYSA-N 0.000 claims description 2
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 claims 4
- KDLHZDBZIXYQEI-UHFFFAOYSA-N Palladium Chemical compound [Pd] KDLHZDBZIXYQEI-UHFFFAOYSA-N 0.000 claims 4
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims 2
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 claims 2
- 239000004411 aluminium Substances 0.000 claims 2
- 229910052782 aluminium Inorganic materials 0.000 claims 2
- 229910052802 copper Inorganic materials 0.000 claims 2
- 239000010949 copper Substances 0.000 claims 2
- 239000007770 graphite material Substances 0.000 claims 2
- 229910052759 nickel Inorganic materials 0.000 claims 2
- 229910052763 palladium Inorganic materials 0.000 claims 2
- 239000010936 titanium Substances 0.000 claims 2
- 229910052719 titanium Inorganic materials 0.000 claims 2
- 229910000449 hafnium oxide Inorganic materials 0.000 claims 1
- WIHZLLGSGQNAGK-UHFFFAOYSA-N hafnium(4+);oxygen(2-) Chemical compound [O-2].[O-2].[Hf+4] WIHZLLGSGQNAGK-UHFFFAOYSA-N 0.000 claims 1
- 239000005416 organic matter Substances 0.000 claims 1
- 230000008569 process Effects 0.000 abstract description 7
- 238000002347 injection Methods 0.000 abstract description 3
- 239000007924 injection Substances 0.000 abstract description 3
- 239000002120 nanofilm Substances 0.000 abstract 1
- 239000010408 film Substances 0.000 description 31
- 230000005621 ferroelectricity Effects 0.000 description 6
- CSCPPACGZOOCGX-UHFFFAOYSA-N Acetone Chemical compound CC(C)=O CSCPPACGZOOCGX-UHFFFAOYSA-N 0.000 description 4
- XEEYBQQBJWHFJM-UHFFFAOYSA-N Iron Chemical compound [Fe] XEEYBQQBJWHFJM-UHFFFAOYSA-N 0.000 description 4
- 239000000243 solution Substances 0.000 description 4
- 238000004528 spin coating Methods 0.000 description 4
- 239000010409 thin film Substances 0.000 description 4
- 239000011248 coating agent Substances 0.000 description 3
- 230000004048 modification Effects 0.000 description 3
- 238000012986 modification Methods 0.000 description 3
- 230000004044 response Effects 0.000 description 3
- 238000003860 storage Methods 0.000 description 3
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 2
- HEDRZPFGACZZDS-UHFFFAOYSA-N Chloroform Chemical compound ClC(Cl)Cl HEDRZPFGACZZDS-UHFFFAOYSA-N 0.000 description 2
- KFZMGEQAYNKOFK-UHFFFAOYSA-N Isopropanol Chemical compound CC(C)O KFZMGEQAYNKOFK-UHFFFAOYSA-N 0.000 description 2
- 230000004888 barrier function Effects 0.000 description 2
- 230000008901 benefit Effects 0.000 description 2
- 230000003111 delayed effect Effects 0.000 description 2
- 238000011161 development Methods 0.000 description 2
- 239000004205 dimethyl polysiloxane Substances 0.000 description 2
- 235000013870 dimethyl polysiloxane Nutrition 0.000 description 2
- 230000005611 electricity Effects 0.000 description 2
- 238000005566 electron beam evaporation Methods 0.000 description 2
- 239000010931 gold Substances 0.000 description 2
- 229910002804 graphite Inorganic materials 0.000 description 2
- 239000010439 graphite Substances 0.000 description 2
- 230000002687 intercalation Effects 0.000 description 2
- 238000009830 intercalation Methods 0.000 description 2
- 229910052742 iron Inorganic materials 0.000 description 2
- CXQXSVUQTKDNFP-UHFFFAOYSA-N octamethyltrisiloxane Chemical compound C[Si](C)(C)O[Si](C)(C)O[Si](C)(C)C CXQXSVUQTKDNFP-UHFFFAOYSA-N 0.000 description 2
- 238000004987 plasma desorption mass spectroscopy Methods 0.000 description 2
- 230000010287 polarization Effects 0.000 description 2
- 229920000435 poly(dimethylsiloxane) Polymers 0.000 description 2
- 229920003229 poly(methyl methacrylate) Polymers 0.000 description 2
- 239000004926 polymethyl methacrylate Substances 0.000 description 2
- 238000011160 research Methods 0.000 description 2
- ZOKXTWBITQBERF-UHFFFAOYSA-N Molybdenum Chemical compound [Mo] ZOKXTWBITQBERF-UHFFFAOYSA-N 0.000 description 1
- 229910003421 Pb(Zr0.2Ti0.8)O3 Inorganic materials 0.000 description 1
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 1
- 230000033228 biological regulation Effects 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 238000005229 chemical vapour deposition Methods 0.000 description 1
- 239000011651 chromium Substances 0.000 description 1
- 238000004140 cleaning Methods 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 229910052593 corundum Inorganic materials 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 230000001066 destructive effect Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000006870 function Effects 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 229910052735 hafnium Inorganic materials 0.000 description 1
- VBJZVLUMGGDVMO-UHFFFAOYSA-N hafnium atom Chemical compound [Hf] VBJZVLUMGGDVMO-UHFFFAOYSA-N 0.000 description 1
- 238000007654 immersion Methods 0.000 description 1
- 239000011810 insulating material Substances 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- 238000001755 magnetron sputter deposition Methods 0.000 description 1
- 239000007769 metal material Substances 0.000 description 1
- 229910052750 molybdenum Inorganic materials 0.000 description 1
- 239000011733 molybdenum Substances 0.000 description 1
- 229910052757 nitrogen Inorganic materials 0.000 description 1
- 230000005693 optoelectronics Effects 0.000 description 1
- 239000001301 oxygen Substances 0.000 description 1
- 229910052760 oxygen Inorganic materials 0.000 description 1
- 238000001259 photo etching Methods 0.000 description 1
- 239000004033 plastic Substances 0.000 description 1
- 229920003023 plastic Polymers 0.000 description 1
- 238000007747 plating Methods 0.000 description 1
- 239000007787 solid Substances 0.000 description 1
- 238000012360 testing method Methods 0.000 description 1
- 238000002207 thermal evaporation Methods 0.000 description 1
- 229910001845 yogo sapphire Inorganic materials 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/78391—Field effect transistors with field effect produced by an insulated gate the gate comprising a layer which is used for its ferroelectric properties
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
- H01L29/51—Insulating materials associated therewith
- H01L29/516—Insulating materials associated therewith with at least one ferroelectric layer
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/6684—Unipolar field-effect transistors with an insulated gate, i.e. MISFET with a ferroelectric gate insulator
Abstract
The invention discloses a kind of ferro-electric field effect transistor and preparation method thereof, the ferro-electric field effect transistor includes substrate, source region, drain region, grid region and grid, it is low dimension semiconductor nano material conductive channel between source region and drain region, grid region uses film of ferroelectric material, the present invention is inserted between low-dimension nano material and film of ferroelectric material using the ultrathin insulating cushion for not introducing charge trap, in the charge trap for preventing the carrier injection ferroelectric material in conducting channel, so as to thoroughly solve reversely to return stagnant problem in LD FeFET.The popularization and application process of low-dimensional nonvolatile semiconductor memory member will be promoted significantly using the present invention.
Description
Technical field
The invention belongs to nano electron device field, and in particular to a kind of low dimensional semiconductor material ferroelectricity with cushion
FET and preparation method.
Background technology
Ferro-electric field effect transistor (Ferroelectric Field Effect Transistor, hereinafter referred to as
" FeFET "), by metal gates, film of ferroelectric material layer and semiconductor conductive channel are constituted, and it is situated between using ferroelectric material as grid
Electric layer, by applying the polarization of the electric dipole in voltage, regulation ferroelectric thin film to grid, realizes the tune to channel material resistance
Section, makes device be on (ON state " 1 ") and cut-off (OFF state " 0 "), so as to realize that logic is stored.Ferro-electric field effect transistor has
There is quickly read-write response, the advantages of low-power consumption and non-destructive are read is indispensable one in modem logic memory device
Class.
Traditional FeFET is using 3 D semiconductor film as conducting channel, however as the development of semi-conductor industry, three-dimensional
Semiconductive thin film moves closer to dimension limit.At the same time, the research of low-dimension nano material is developed rapidly.With conventional three-dimensional film
Compare, low-dimension nano material has a film thickness of atomic level, thus with low-power consumption, the advantage such as quick response.Therefore, with low
Tie up the FeFET (hereinafter referred to as LD-FeFET) that (low dimensional) nano material replaces conventional three-dimensional semiconductive thin film
Extensive concern and research are obtained.Chinese Academy of Sciences CAS Institute of Physics king grace brother in 2007 et al., which proposes, a kind of is based on semiconductor nano material
(king grace brother, accords with vast sea to ferro-electric field effect transistor of material and preparation method thereof, and Bai Xuedong one kind is based on semiconductor nano material
Ferro-electric field effect transistor and preparation method thereof, CN101075636 [P] .2007.), mainly describe with one dimension semiconductor material
Expect the ferro-electric field effect transistor for conductive channel；2014, Shanghai skill thing institute Wang Xudong etc. proposed a kind of based on curing
(Wang Xudong, Wang Jianlu, Meng Xiangjian wait one kind to be based on molybdenum disulfide to the preparation method of the PVDF base ferroelectric field effect pipes of molybdenum film
The preparation method of the PVDF base ferroelectric field effect pipes of film, CN104362252A [P] .2015.).With conventional three-dimensional semiconductor iron
Field effect tubing seemingly, in LD-FeFET, the resistance of conducting channel with the scan round of grid voltage have delayed time it is stagnant, so
And lead-lag (also known as reversely returning stagnant anti-hysteresis) behavior is frequently found in practical study (see Chen Y, Wang
X,Wang P,et al.Optoelectronic Properties of Few-layer MoS2FET Gated by
Ferroelectric Relaxor Polymer [J] .2016. and Hong X, Hoffman J, Posadas A, et
al.Unusual resistance hysteresis in n-layer graphene field effect transistors
fabricated on ferroelectric Pb(Zr0.2Ti0.8)O3[J].Applied Physics Letters,2010,
97(97):The documents such as 033114-033114-3.).It is this reversely to return the capture ionization that stagnant behavior is typically due to interface trapped charge
Influence to conductive channel resistance is more than caused by the influence of ferroelectric material electric dipole, that is to say, that have reversely this
Return in stagnant ferroelectric memory device, the performance of ferroelectric material is blanked completely, and device performance is mainly influenceed by trapped charge.
Therefore, for being caused to return stagnant ferro-electric device in advance by trapped charge, return it is stagnant may be without non-volatile, even if part of devices
Reversely return it is stagnant have non-volatile, as response is slow, the problems such as Memory windows size is unstable is difficult to be adapted to actual
The need for, one of maximum obstruction as LD-FeFET popularization and application.
The content of the invention
It is a kind of with cushion it is an object of the invention to propose for LD-FeFET problems of the prior art
LD-FET, so as to effectively solve reversely to return stagnant problem in LD-FeFET, accelerates LD-FeFET popularization and application processes.
To achieve the above object, the present invention is partly led using the ultrathin insulating cushion intercalation for not introducing charge trap in low-dimensional
Between body material and ferroelectric thin film, prevent in the charge trap in the carrier injection ferroelectric material in conducting channel, so that thorough
Bottom solves reversely to return stagnant problem in LD-FeFET.
The low dimensional semiconductor material ferro-electric field effect transistor of the present invention respectively is substrate (1) and source region from bottom to up
(2), drain region (3) and the low dimensional semiconductor material conductive channel (4) between source region (2) and drain region (3), partly lead in low-dimensional
Body materials conductive passage (4) is provided with cushion (5) and ferroelectricity grid region (6) and grid, shown in such as Fig. 1 (a)；Or, this hair
Bright low dimensional semiconductor material ferro-electric field effect transistor respectively is substrate (1), grid (7), ferroelectricity grid region from bottom to up
(6) and source region (2), drain region (3) and the low dimensional semiconductor material conductive channel (4) between source region (2) and drain region (3),
As shown in Fig. 1 (b).Source region (2), drain region (3) and grid (7) are the metal film of tens nanometer thickness, and the cushion is surface
The insulation film for not introducing charge trap of atomically flating, i.e. cushion could be used without charge trap or charge trap seldom and
Insulating materials with barrier electric charge function of injecting.
Further, the cushion is less than 50 nanometers of hexagonal lattice boron nitride, silica, alundum (Al2O3) or oxygen
Change hafnium or organic self assembled monolayer.
Further, the substrate (1) is thermal oxide growth SiO2Si substrates or mechanical stripping thickness at 10 nanometers
With the hexagonal lattice boron nitride (h-BN) and SiO between 30 nanometers2/ Si combination.
Further, the low dimensional semiconductor material can be one-dimensional CNT, graphene nanobelt, or two dimension it is black
Phosphorus, molybdenum disulfide, two selenizing molybdenums, tungsten disulfide, two tungsten selenides etc..
Further, the ferroelectricity grid region (6) uses thickness for the polyvinylidene fluoride Organic Iron between 2 nanometers -500 nanometers
Electric polymer (PVDF) or thickness are in ferroelectricities such as 50 nanometers -1000 nanometers of the inorganic ferroelectric polymers of barium titanate or lead zirconate titanate
Material.
Further, the chromium metal and the gold of 65 nanometer thickness of metal film preferably 6 nanometer thickness of the source region (2) and drain region (3)
Metallic film, select other any metal materials as device source-drain electrode and grid does not have shadow to this patent core content
Ring.
Further, for the device in terms of applied to electricity, the grid (7) is preferably identical with source region (2) and drain region (3)
Metal film；For the device applied to optics aspect, the aluminum metal or thin layer graphite of grid (7) preferably 12 nanometer thickness
The conductive material good etc. translucency.
The preparation method of the above-mentioned low dimensional semiconductor material ferro-electric field effect transistor with cushion, it is characterized in that including
Step：
1) low dimensional semiconductor material is obtained on substrate using the method for mechanical stripping or chemically grown or dry type is utilized
The low dimensional semiconductor material that mechanical stripping or chemically grown are obtained is transferred on substrate by transfer method；
2) cushion is prepared on low dimensional semiconductor material using the method for method or the dry type transfer of chemically grown；
3) metallic film is prepared using the conventional micro-processing method such as electron beam exposure and electron beam plated film, obtains source region and leakage
Area；
4) it is thin using P (VDF-TrFE) ferroelectric material of method acquisition described in patent (CN104362252A [P] .2015)
Film；
5) gate patterns are obtained using micro-nano technology mask, and metal gates is obtained using evaporation coating method.
The present invention uses the ultrathin insulating cushion intercalation for not introducing charge trap in low dimensional semiconductor material and ferroelectric thin
Between film, prevent in the charge trap in the carrier injection ferroelectric material in conducting channel, so as to thoroughly solve low-dimensional
It is common in ferro-electric field effect transistor reversely to return stagnant problem, and obtain with well storing that specific low-dimensional is non-volatile to deposit
Memory device.The present invention will promote the popularization and application process of low-dimensional nonvolatile semiconductor memory member significantly.
Brief description of the drawings
Fig. 1 has the schematic diagram of the low dimensional semiconductor material ferro-electric field effect transistor of cushion for the present invention；
Fig. 2 has the preparation flow figure of the low dimensional semiconductor material ferro-electric field effect transistor of cushion for the present invention；
Fig. 3 for low dimensional semiconductor material ferro-electric field effect transistor of the present invention with cushion channel conductivity-deposit
Store up grid voltage Ids-VdsTransfer characteristic curve；
Fig. 4 has the control device of the low dimensional semiconductor material ferro-electric field effect transistor of cushion for the present invention：No
The channel conductivity of the low dimensional semiconductor material ferro-electric field effect transistor of cushion-storage grid voltage Ids-VdsTransfer characteristic
Curve.
Wherein, 1-substrate；2-source region；3-drain region；4-low dimensional semiconductor material conductive channel；5-cushion；6—
Ferroelectricity grid region；7-grid.
Embodiment
The present invention is described in further detail below in conjunction with the accompanying drawings
With the h-BN of less than 50 nanometers thickness, (or other do not introduce charge trap to low dimension semiconductor embodiment of the present invention
Insulating barrier) it is cushion, using P (VDF-TrTE) (or other ferroelectric materials) as storage gate medium, with the black phosphorus of 15 nanometer thickness
Material (or other low dimensional semiconductor materials) is conductive channel, has made the P (VDF- based on thin layer black phosphorus with cushion
TrTE) ferro-electric field effect transistor.
Fig. 2 has the preparation flow of the low dimensional semiconductor material ferro-electric field effect transistor of cushion for the present invention, specifically
For：
1st, substrate is blown clean with high pure nitrogen, it is ensured that the cleannes on surface, black phosphorus is obtained using the method for mechanical stripping
Film.
The wherein described method for obtaining low dimensional semiconductor material is not limited to mechanical stripping, or chemical vapor deposition etc.
The method of generally acknowledged acquisition low-dimension nano material；
2nd, the h-BN below 50 nanometers of cushion is transferred on black phosphorus film using dry type transfer method；
PPC films is are placed on PDMS thin slices by the dry type transfer method, using this structure in 50-60 degree celsius temperatures
It is lower to stick up h-BN films, then h-BN thin layers are aligned under light microscope help and are placed on black phosphorus film, 150 are utilized
PPC films are made to be separated with PDMS thin slices under degree celsius temperature, whole device then is placed on into normal temperature in chloroform soln soaks
Steep half an hour to dissolve PPC films, then be sequentially placed into cleaning in acetone soln and aqueous isopropanol；
The PPC films are that PPC solution is made in 7 grams of solid PPC 100 milliliters of chloroforms of proportioning, then film is made；
3rd, source-drain electrode figure is obtained in the double-deck plastic structures of black phosphorus surface spin coating MMA/PMMA, baking, electron beam exposure, development
Shape structure；Again source region and drain region are obtained by evaporation coating metal film, solution-off step；
The spin coating parameters of the MMP are 4000 revs/min, and PMMA spin coating parameters are 6000 revs/min, each spin coating it
Toasted 10 minutes with 150 degrees Celsius of temperature all on hot plate afterwards；
The evaporation coating can be the micro Process film plating process such as thermal evaporation plated film, electron beam evaporation deposition, magnetron sputtering；
The solution-off method is immersion 2-3 hours in normal temperature acetone soln；
4th, the P (VDF-TrFE) of 300 nanometer thickness is obtained using method described in patent (CN104362252A [P] .2015)
Film of ferroelectric material.
5th, gate patterns are obtained using micro-nano technology mask, and utilizes the chromium metal and 65 of evaporation coating method 6 nanometer thickness of acquisition
The golden metallic film of nanometer thickness；
The micro Process mask can be photoetching and mechanical mask etc., and the evaporation coating method can be hot evaporation or electron beam
Evaporation coating, the metal electrode can be Cr/Au, or the good Al of translucency, graphite etc..
So far, the low-dimensional ferro-electric field effect transistor with cushion is prepared and finished.
Fig. 3 and Fig. 4 be respectively the present invention with cushion low dimensional semiconductor material ferro-electric field effect transistor and and its
Do channel conductivity-storage grid voltage of the low dimensional semiconductor material ferro-electric field effect transistor without cushion contrasted
Ids-VdsTransfer characteristic curve；Source-drain electrode maintains V during testds=5mV DC voltage, grid voltage scan round (from-
40V to 40V, then return to -40V from 40V).The electric current of conductive channel is presented delayed time with the scan round of grid voltage in Fig. 3
Stagnant phenomenon, this time stagnant direction is due to electric dipole in ferroelectric material as the hysteresis polarization of grid voltage is to conductive channel
Low dimensional semiconductor material electricity doping caused by；And for there is no the device of cushion in Fig. 4, the electric current of conductive channel with
Stagnant phenomenon is returned in the scan round presentation for grid voltage in advance.It is same to note conducting channel used in Fig. 3 and Fig. 4 two devices
Piece black phosphorus film, and experienced identical micro process, is not both uniquely that device in Fig. 3 has the thick BN of 5nm
Device in cushion, Fig. 4 does not have cushion, and the black phosphorus film of conductive channel is directly contacted with ferroelectric material P (VDF-TrFE).
This has absolutely proved the technique effect of the present invention.
Although the present invention is disclosed as above with preferred embodiment, but is not limited to the present invention.It is any to be familiar with ability
The technical staff in domain, without departing from the scope of the technical proposal of the invention, all using in the methods and techniques of the disclosure above
Appearance makes many possible variations and modification to technical solution of the present invention, or is revised as the equivalent embodiment of equivalent variations.Therefore,
Every content without departing from technical solution of the present invention, the technical spirit according to the present invention is to made for any of the above embodiments any simple
Modification, equivalent variations and modification, in the range of still falling within technical solution of the present invention protection.
Claims (8)
1. a kind of ferro-electric field effect transistor, it is characterised in that the FET includes substrate, source region, drain region, grid region and grid
Pole, wherein, there is low dimension semiconductor nano material conductive channel between source region and drain region, grid region uses film of ferroelectric material,
There is one layer of cushion between film of ferroelectric material and low dimensional semiconductor material, the cushion is not introduce the exhausted of charge trap
Edge film.
2. ferro-electric field effect transistor as claimed in claim 1, it is characterised in that the cushion is the six of less than 50 nanometers
Angle lattice boron nitride, silica, alundum (Al2O3), hafnium oxide or organic matter self assembled monolayer.
3. ferro-electric field effect transistor as claimed in claim 1, it is characterised in that the substrate is thermal oxide growth SiO2's
Hexagonal lattice boron nitride and SiO of the thickness of Si substrates or mechanical stripping between 10 nanometers and 30 nanometers2/ Si combination.
4. ferro-electric field effect transistor as claimed in claim 1, it is characterised in that the film of ferroelectric material is thickness 2
Nanometer -500 nanometers between the organic ferroelectric polymers of polyvinylidene fluoride or thickness 50 nanometers -1000 nanometers barium titanate or
The inorganic ferroelectric polymers such as lead zirconate titanate.
5. ferro-electric field effect transistor as claimed in claim 1, it is characterised in that the low dimensional semiconductor material is one-dimensional
CNT, graphene nanobelt, or two dimension black phosphorus, molybdenum disulfide, two selenizing molybdenums, tungsten disulfide, two tungsten selenides.
6. ferro-electric field effect transistor as claimed in claim 1, it is characterised in that the source region or drain region using copper, aluminium,
Nickel, palladium, chromium metal, golden metal, or the bi-layer metal film or graphite material that titanium and golden metal are constituted.
7. ferro-electric field effect transistor as claimed in claim 6, it is characterised in that the grid uses copper, aluminium, nickel, palladium, chromium
Metal, golden metal, or the bi-layer metal film or graphite material that titanium and golden metal are constituted.
8. the preparation method of ferro-electric field effect transistor as claimed in claim 1, it is comprised the following steps that：
1) low dimensional semiconductor material is obtained on substrate using the method for mechanical stripping or chemically grown or utilizes dry type transfer
The low dimensional semiconductor material that mechanical stripping or chemically grown are obtained is transferred on substrate by method；
2) cushion is prepared on low dimensional semiconductor material using the method for method or the dry type transfer of chemically grown；
3) metallic film is prepared using electron beam exposure and electron beam plated film micro-processing method, obtains source region and drain region；
4) film of ferroelectric material is prepared；
5) gate patterns are obtained using micro-nano technology mask, and metal gates is obtained using evaporation coating method.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710338715.1A CN107204371B (en) | 2017-05-15 | 2017-05-15 | Ferroelectric field effect transistor and preparation method thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710338715.1A CN107204371B (en) | 2017-05-15 | 2017-05-15 | Ferroelectric field effect transistor and preparation method thereof |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN107204371A true CN107204371A (en) | 2017-09-26 |
| CN107204371B CN107204371B (en) | 2020-11-03 |
Family
ID=59905101
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201710338715.1A Active CN107204371B (en) | 2017-05-15 | 2017-05-15 | Ferroelectric field effect transistor and preparation method thereof |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN107204371B (en) |
Cited By (16)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108417636A (en) * | 2018-02-26 | 2018-08-17 | 上海电力学院 | A kind of two-dimensional phase becomes field-effect transistor and preparation method thereof |
| CN110047996A (en) * | 2019-04-24 | 2019-07-23 | 南京大学 | Super low-power consumption ferroelectric crystal cast memory based on two-dimentional organic functional material and preparation method thereof |
| CN110186979A (en) * | 2019-05-28 | 2019-08-30 | 南京邮电大学 | A kind of field effect transistor applied to highly sensitive gas sensor |
| CN110224025A (en) * | 2018-03-01 | 2019-09-10 | 南京理工大学 | The preparation method of flexible ferroelectricity photovoltaic field-effect tube based on black phosphorus two-dimensional semiconductor |
| CN110364572A (en) * | 2019-07-04 | 2019-10-22 | 国家纳米科学中心 | A kind of double grid coupled structure and its preparation method and application |
| CN110518071A (en) * | 2018-05-21 | 2019-11-29 | 北京纳米能源与***研究所 | The field effect transistor and man-made electronic's skin regulated and controled using electret |
| CN111384178A (en) * | 2018-12-28 | 2020-07-07 | Imec 非营利协会 | Semiconductor device and method for manufacturing such a semiconductor device |
| CN111785829A (en) * | 2019-04-03 | 2020-10-16 | 天津大学 | Multi-bit storage flash memory unit |
| CN112531112A (en) * | 2020-12-03 | 2021-03-19 | 南京大学 | Ultrahigh-gain organic thin film transistor and preparation method thereof |
| CN112530989A (en) * | 2020-12-03 | 2021-03-19 | 南京大学 | Ultrahigh-gain organic amplifier and preparation method thereof |
| CN112968055A (en) * | 2021-02-23 | 2021-06-15 | 电子科技大学 | Two-dimensional ferroelectric semiconductor channel ferroelectric dielectric layer field effect transistor and preparation method thereof |
| WO2021129863A1 (en) * | 2019-12-28 | 2021-07-01 | 南方科技大学 | Method for manufacturing two-dimensional-material-based flexible ferroelectric storage unit |
| CN113257913A (en) * | 2020-02-12 | 2021-08-13 | 中国科学院物理研究所 | Synaptic three-terminal device based on ferroelectric domain inversion |
| CN113380892A (en) * | 2020-05-29 | 2021-09-10 | 台湾积体电路制造股份有限公司 | Memory device, ferroelectric field effect transistor thereof and reading method |
| CN116207144A (en) * | 2023-01-19 | 2023-06-02 | 西安电子科技大学 | Ferroelectric camouflage transistor and read-write mode of safety circuit thereof |
| CN112697843B (en) * | 2020-12-08 | 2023-10-03 | 湘潭大学 | Carbon-based field effect transistor sensor based on negative capacitance effect |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20090189152A1 (en) * | 2008-01-16 | 2009-07-30 | Samsung Electronics Co., Ltd. | Ferroelectric memory device |
| KR20130021534A (en) * | 2011-08-23 | 2013-03-06 | 서울시립대학교 산학협력단 | Mfis tyte fet and ferroelectric memory device, and method of manufacturing the same |
| CN104362252A (en) * | 2014-10-16 | 2015-02-18 | 中国科学院上海技术物理研究所 | Production method of PVDF (polyvinylidene fluoride) ferroelectric field effect transistor based on molybdenum disulfide film |
-
2017
- 2017-05-15 CN CN201710338715.1A patent/CN107204371B/en active Active
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20090189152A1 (en) * | 2008-01-16 | 2009-07-30 | Samsung Electronics Co., Ltd. | Ferroelectric memory device |
| KR20130021534A (en) * | 2011-08-23 | 2013-03-06 | 서울시립대학교 산학협력단 | Mfis tyte fet and ferroelectric memory device, and method of manufacturing the same |
| CN104362252A (en) * | 2014-10-16 | 2015-02-18 | 中国科学院上海技术物理研究所 | Production method of PVDF (polyvinylidene fluoride) ferroelectric field effect transistor based on molybdenum disulfide film |
Non-Patent Citations (2)
| Title |
|---|
| KOJI AIZAWA: "Impact of HfO2 buffer layers on data retention characteristics of ferroelectric-gate field-effect transistors", 《APPLIED PHYSICS LETTERS》 * |
| NAHEE PARK ET AL: "Ferroelectric single-crystal gate graphene/hexagonal-BN/ferroelectric field effect transistor", 《ACS NANO》 * |
Cited By (22)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108417636A (en) * | 2018-02-26 | 2018-08-17 | 上海电力学院 | A kind of two-dimensional phase becomes field-effect transistor and preparation method thereof |
| CN110224025A (en) * | 2018-03-01 | 2019-09-10 | 南京理工大学 | The preparation method of flexible ferroelectricity photovoltaic field-effect tube based on black phosphorus two-dimensional semiconductor |
| CN110518071A (en) * | 2018-05-21 | 2019-11-29 | 北京纳米能源与***研究所 | The field effect transistor and man-made electronic's skin regulated and controled using electret |
| CN111384178A (en) * | 2018-12-28 | 2020-07-07 | Imec 非营利协会 | Semiconductor device and method for manufacturing such a semiconductor device |
| CN111785829A (en) * | 2019-04-03 | 2020-10-16 | 天津大学 | Multi-bit storage flash memory unit |
| CN110047996A (en) * | 2019-04-24 | 2019-07-23 | 南京大学 | Super low-power consumption ferroelectric crystal cast memory based on two-dimentional organic functional material and preparation method thereof |
| CN110186979A (en) * | 2019-05-28 | 2019-08-30 | 南京邮电大学 | A kind of field effect transistor applied to highly sensitive gas sensor |
| CN110364572B (en) * | 2019-07-04 | 2022-11-15 | 国家纳米科学中心 | Double-gate coupling structure and preparation method and application thereof |
| CN110364572A (en) * | 2019-07-04 | 2019-10-22 | 国家纳米科学中心 | A kind of double grid coupled structure and its preparation method and application |
| WO2021129863A1 (en) * | 2019-12-28 | 2021-07-01 | 南方科技大学 | Method for manufacturing two-dimensional-material-based flexible ferroelectric storage unit |
| CN113257913A (en) * | 2020-02-12 | 2021-08-13 | 中国科学院物理研究所 | Synaptic three-terminal device based on ferroelectric domain inversion |
| CN113380892A (en) * | 2020-05-29 | 2021-09-10 | 台湾积体电路制造股份有限公司 | Memory device, ferroelectric field effect transistor thereof and reading method |
| CN113380892B (en) * | 2020-05-29 | 2024-04-09 | 台湾积体电路制造股份有限公司 | Memory device and ferroelectric field effect transistor and reading method thereof |
| CN112531112A (en) * | 2020-12-03 | 2021-03-19 | 南京大学 | Ultrahigh-gain organic thin film transistor and preparation method thereof |
| CN112530989A (en) * | 2020-12-03 | 2021-03-19 | 南京大学 | Ultrahigh-gain organic amplifier and preparation method thereof |
| CN112530989B (en) * | 2020-12-03 | 2024-04-12 | 南京大学 | Ultrahigh-gain organic amplifier and preparation method thereof |
| CN112531112B (en) * | 2020-12-03 | 2024-03-22 | 南京大学 | Ultrahigh-gain organic thin film transistor and preparation method thereof |
| CN112697843B (en) * | 2020-12-08 | 2023-10-03 | 湘潭大学 | Carbon-based field effect transistor sensor based on negative capacitance effect |
| CN112968055B (en) * | 2021-02-23 | 2022-06-10 | 电子科技大学 | Two-dimensional ferroelectric semiconductor channel ferroelectric dielectric layer field effect transistor and preparation method thereof |
| CN112968055A (en) * | 2021-02-23 | 2021-06-15 | 电子科技大学 | Two-dimensional ferroelectric semiconductor channel ferroelectric dielectric layer field effect transistor and preparation method thereof |
| CN116207144B (en) * | 2023-01-19 | 2024-02-02 | 西安电子科技大学 | Ferroelectric camouflage transistor and read-write mode of safety circuit thereof |
| CN116207144A (en) * | 2023-01-19 | 2023-06-02 | 西安电子科技大学 | Ferroelectric camouflage transistor and read-write mode of safety circuit thereof |
Also Published As
| Publication number | Publication date |
|---|---|
| CN107204371B (en) | 2020-11-03 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN107204371A (en) | A kind of ferro-electric field effect transistor and preparation method thereof | |
| Yu et al. | Flexible inorganic ferroelectric thin films for nonvolatile memory devices | |
| Park et al. | Control of thin ferroelectric polymer films for non-volatile memory applications | |
| Takahashi et al. | Thirty-day-long data retention in ferroelectric-gate field-effect transistors with HfO2 buffer layers | |
| Ren et al. | Highly Robust Flexible Ferroelectric Field Effect Transistors Operable at High Temperature with Low‐Power Consumption | |
| CN103413832B (en) | A kind of metal oxide thin-film transistor and preparation method thereof | |
| Khosla et al. | Charge trapping analysis of metal/Al 2 O 3/SiO 2/Si, gate stack for emerging embedded memories | |
| Liu et al. | Ferroelectric memory based on nanostructures | |
| CN106057873A (en) | Semiconductor device with a plurality of semiconductor chips | |
| CN100568574C (en) | A kind of organic field effect tube and preparation method thereof and application | |
| Liu et al. | Flexible Quasi‐van der Waals Ferroelectric Hafnium‐Based Oxide for Integrated High‐Performance Nonvolatile Memory | |
| Hwang et al. | Effect of insertion of dielectric layer on the performance of Hafnia ferroelectric devices | |
| CN106910776A (en) | Large area molybdenum bisuphide field-effect transistor and its preparation based on high-k gate dielectric | |
| Tsai et al. | Oxide heteroepitaxy-based flexible ferroelectric transistor | |
| CN107170828A (en) | A kind of ferro-electric field effect transistor and preparation method thereof | |
| Sünbül et al. | Optimizing ferroelectric and interface layers in HZO-based FTJs for neuromorphic applications | |
| EP2166571B1 (en) | Memory device and its reading method | |
| Wang et al. | A graphene oxide quantum dots embedded charge trapping memory with enhanced memory window and data retention | |
| CN104882490B (en) | A kind of preparation method of the floating-gate memory based on metal hetero quntum point | |
| CN101388397A (en) | Low-voltage erasable nano-crystal storage capacitor construction and preparation thereof | |
| Hwang et al. | Multi-level operation of three-dimensionally stacked non-volatile ferroelectric polymer memory with high-performance hole-injection layer | |
| Fan et al. | Enhanced ferroelectric and piezoelectric properties in graphene-electroded Pb (Zr, Ti) O3 thin films | |
| Huo et al. | Stacked HZO/$\alpha $-In $ _ {\text {2}} $ Se $ _ {\text {3}} $ Ferroelectric Dielectric/Semiconductor FET With Ultrahigh Speed and Large Memory Window | |
| US20070267679A1 (en) | Nonvolatile memory devices including floating gates formed of silicon nano-crystals and methods of manufacturing the same | |
| JP2005166742A (en) | Method of manufacturing laminate and method of manufacturing organic field effect transistor |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |