CN107181395A - A kind of adjustable control circuit of ON time - Google Patents
A kind of adjustable control circuit of ON time Download PDFInfo
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- CN107181395A CN107181395A CN201710589186.2A CN201710589186A CN107181395A CN 107181395 A CN107181395 A CN 107181395A CN 201710589186 A CN201710589186 A CN 201710589186A CN 107181395 A CN107181395 A CN 107181395A
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- nmos tube
- hysteresis comparator
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- pmos
- time
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Classifications
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/08—Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Logic Circuits (AREA)
- Electronic Switches (AREA)
Abstract
A kind of adjustable control circuit of ON time, belongs to electronic circuit technology field.Timing module exports different magnitudes of voltage to the negative input end of the first hysteresis comparator and the positive input terminal of the second hysteresis comparator, make the output end of the first hysteresis comparator and the second hysteresis comparator, i.e. the R input of rest-set flip-flop, S inputs control rest-set flip-flop by various combination mode, the signal control counter that on the one hand rest-set flip-flop is exported by QB output ends works, the output signal OT_OUT of output control circuit, the signal on the other hand exported by Q output feeds back to timing module to control the voltage change of timing module.The output voltage V1 of ON time adjusting module controls the positive input terminal voltage of the first hysteresis comparator to change ON time.The present invention can in accurately controlling switch power supply switching tube turn-on and turn-off.
Description
Technical field
The invention belongs to electronic circuit technology field, more particularly to a kind of adjustable control circuit of ON time.
Background technology
In power switch circuit, burr or concussion generally occurs in power switch pipe source-drain voltage or electric current, so as to lead
Cause opening by mistake for power switch pipe to open, turn off by mistake, cause the unstable and poor reliability of set meter systems, in order to solve the problem,
ON time adjustment circuit is generally used in driving IC, so as to reduce burr and concussion.Traditional way is in circuit
Using the gate resistance or the method using the set time of adjustment drive output, because outer meeting resistance is compared with the change of temperature
Greatly, thus adjustment gate resistance method also bring along uncontrollable problem, simultaneously because driving IC driving different model power open
Guan Guan, therefore the method for set time is the problem of can bring universality.
Based on this, designing a kind of adjustable control circuit of ON time is used for power switch circuit, it is adjusted in real time
Whole ON time avoids the opening by mistake for power switch pipe from opening and miss shut-off, to ensureing that circuit normal work, the stability of a system have
Significance.
The content of the invention
The purpose of the present invention, aiming above mentioned problem, proposes a kind of ON time control circuit, and according to circuit
Application requirement adjusts switching tube ON time, with the turn-on and turn-off of switching tube in accurately controlling switch power supply.
The technical scheme is that：
A kind of adjustable control circuit of ON time, including ON time adjusting module, timing module, the first phase inverter,
Second phase inverter, the first hysteresis comparator, the second hysteresis comparator, rest-set flip-flop and counter,
The input of the ON time adjusting module is used as the ON time control end of the control circuit, its Enable Pin
Connection enables signal EN, and its output end connects the positive input terminal of the first hysteresis comparator；
The input connection of first phase inverter enables signal EN, and its output end connects the enable of the timing module
End, its output end connects the negative input end of first hysteresis comparator and the positive input terminal of the second hysteresis comparator, and first is slow
The Enable Pin connection of stagnant comparator enables signal EN, and its output end connects the R input of rest-set flip-flop；
The negative input end of second hysteresis comparator connects the first reference voltage V REF1, and its output end connects the S of rest-set flip-flop
Input, the clear terminal connection of rest-set flip-flop enables signal EN, and its Q output connects the control end of timing module, its QB outputs
The input of the second phase inverter of end connection, the input of counter connects the output end of the second phase inverter, and its output end is used as institute
State the output end of control circuit；
The ON time adjusting module include first resistor R1, second resistance R2,3rd resistor R3, the 4th resistance R4,
First electric capacity C1, the first current source I1, the second current source I2, the 3rd hysteresis comparator and data selector,
First resistor R1 one end is used as the input of the ON time adjusting module, the other end the first current source of connection
I1, the first data input pin of the negative input end of the 3rd hysteresis comparator and data selector are simultaneously followed by by second resistance R2
Ground；The positive input terminal of 3rd hysteresis comparator connects the second reference voltage V REF2, and the connection of its Enable Pin enables signal EN, and its is defeated
Go out the address input end of end connection data selector；Second data input pin of data selector connects the second current source I2 and led to
Cross after 3rd resistor R3 and be grounded, its output end connects the 4th resistance R4 one end, the 4th resistance R4 other end is led as described
The output end of logical time regulating module is simultaneously grounded by the first electric capacity C1.
Specifically, the timing module includes the first NMOS tube NM1, the second NMOS tube NM2, the 3rd NMOS tube NM3, the 4th
NMOS tube NM4, the first PMOS PM1, the second PMOS PM2, the 3rd PMOS PM3, the 3rd current source I3, the 3rd phase inverter and
Second electric capacity C2,
First NMOS tube NM1 grid leak short circuit simultaneously connects the 3rd current source I3, the second NMOS tube NM2 and the 3rd NMOS tube
The drain electrode of NM3 grid and the 4th NMOS tube NM4, the 4th NMOS tube NM4 grid as the timing module control end；
First PMOS PM1 grid leak short circuit and drain electrode and the second PMOS for connecting the second NMOS tube NM2 and the 3rd PMOS PM3
PM2 grid；The input of 3rd phase inverter is used as the control end of the timing module, its output end the 3rd PMOS of connection
PM3 grid；Second PMOS PM2 and the 3rd NMOS tube NM3 drain interconnection is simultaneously used as the output end of the timing module,
Two electric capacity C2 are connected between the output end of the timing module and ground；First PMOS PM1, the second PMOS PM2 and the 3rd
PMOS PM3 source electrode connects supply voltage, the first NMOS tube NM1, the second NMOS tube NM2, the 3rd NMOS tube NM3 and the 4th NMOS
Pipe NM4 source ground.
Specifically, the ON time control end of the control circuit is hanging when that need not be adjusted to ON time；
The ON time control end outer meeting resistance of the control circuit when needing to be adjusted ON time.
The present invention operation principle be：
Timing module export different magnitudes of voltage to the first hysteresis comparator negative input end and the second hysteresis comparator just
Input, presses the R input of the output end of the first hysteresis comparator and the second hysteresis comparator, i.e. rest-set flip-flop, S inputs
Various combination mode controls rest-set flip-flop, and the signal control counter that on the one hand rest-set flip-flop is exported by QB output ends works,
The output signal OT_OUT of output control circuit, the signal on the other hand exported by Q output feeds back to timing module to control
The voltage change of timing module processed.
When it is high to enable signal EN, timing module is started working, and output voltage V2 constantly increases, when V2 is less than conducting
Between adjusting module output voltage V1 and less than the first reference voltage V REF1 when, rest-set flip-flop is set to 0, and counter does not work, feedback
Its output voltage V2 is set to continue to increase to timing module；As timing module output voltage V2 constantly increases, when V2 is more than first
Reference voltage V REF1 and less than V1 when, state is constant；When voltage increases to V2 more than V1, rest-set flip-flop puts 1, counter work
Make, feeding back to timing module reduces its output voltage；When V2 is less than V1 and is more than the first reference voltage V REF1, RS triggerings
Device state remains unchanged；When V2 is less than VREF1, rest-set flip-flop is set to 0 again.Constantly circulation, works as counter in this manner
When counting the full time, the output end OT_OUT output high level of control circuit shows to reach ON time.
The output voltage V1 of ON time adjusting module is by controlling the positive input terminal voltage of the first hysteresis comparator to change
Become ON time.When the ON time control end OT of control circuit is hanging, the negative input end voltage of the 3rd hysteresis comparator is
V4 (i.e. pressure drop on second resistance R2), it is output as low, and data selector is output as the voltage V3 of the second input, through filter
Output voltage V1 after wave circuit；When controlling the ON time control end OT outer meeting resistance R of circuit, the 3rd hysteresis comparator it is negative
Input terminal voltage be V4'(be (R+R1) ∥ R2 voltage), it is output as height, and data selector is output as first input end
Output voltage V1' after voltage V4', filtered circuit.The control circuit that the present invention is provided being capable of the control of automatic detection ON time
Hold OT whether outer meeting resistance so that judge whether need built-in ON time is adjusted, if without outer meeting resistance, adopting
With the ON time of acquiescence.
The output end of the control circuit is opened by the grid of connecting valve pipe after drive circuit by drive circuit control
The grid of pipe is closed, so as to reach the purpose of the turn-on and turn-off of switching tube in accurately controlling switch power supply.
Beneficial effects of the present invention are：The present invention changes ON time using ON time control module, while by RS
The Q output of trigger, which feeds back to timing module, to be used to control timing, is shielded the influence that noise is switched to metal-oxide-semiconductor, is prevented MOS
Pipe is turned off by mistake, makes circuit normal work；In addition invention increases counter, requirement of the circuit to the time is met.
Brief description of the drawings
Fig. 1 is a kind of schematic diagram for the adjustable control circuit of ON time that the present invention is provided；
Fig. 2 is the structural representation of ON time adjusting module in the present invention；
Fig. 3 is the structural representation of timing module in embodiment.
Embodiment
Technical scheme is described in detail below in conjunction with the accompanying drawings：
A kind of schematic diagram of the adjustable control circuit of ON time provided as shown in Figure 1 for the present invention, including during conducting
Between adjusting module, timing module, the first phase inverter, the second phase inverter, the first hysteresis comparator, the second hysteresis comparator, RS touch
Send out device and counter, the input of the ON time adjusting module as the control circuit ON time control end, its
Enable Pin connection enables signal EN, and its output end connects the positive input terminal of the first hysteresis comparator；First phase inverter it is defeated
Enter end connection and enable signal EN, its output end connects the Enable Pin of the timing module, and its output end connection described first is sluggish
The positive input terminal of the negative input end of comparator and the second hysteresis comparator, the Enable Pin connection of the first hysteresis comparator enables signal
EN, its output end connects the R input of rest-set flip-flop；The negative input end of second hysteresis comparator connects the first reference voltage
VREF1, its output end connects the S inputs of rest-set flip-flop, and the clear terminal connection of rest-set flip-flop enables signal EN, its Q output
The control end of timing module is connected, its QB output end connects the input of the second phase inverter, the input connection second of counter
The output end of phase inverter, its output end as it is described control circuit output end.
It is the structural representation of the ON time adjusting module in the present invention as shown in Figure 2, including first resistor R1, second
Resistance R2,3rd resistor R3, the 4th resistance R4, the first electric capacity C1, the first current source I1, the second current source I2, the 3rd sluggish ratio
Compared with device and data selector, first resistor R1 one end is used as the input of the ON time adjusting module, other end connection the
One current source I1, the negative input end of the 3rd hysteresis comparator and the first data input pin of data selector simultaneously pass through second resistance
It is grounded after R2；The positive input terminal of 3rd hysteresis comparator connects the second reference voltage V REF2, and the connection of its Enable Pin enables signal
EN, its output end connects the address input end of data selector；Second data input pin of data selector connects the second electric current
Source I2 simultaneously passes through ground connection after 3rd resistor R3, the 4th resistance R4 of its output end connection one end, the 4th resistance R4 other end work
Output end for the ON time adjusting module simultaneously passes through the first electric capacity C1 ground connection.
The structural representation of the timing module in embodiment as shown in Figure 3, timing module include the first NMOS tube NM1,
Second NMOS tube NM2, the 3rd NMOS tube NM3, the 4th NMOS tube NM4, the first PMOS PM1, the second PMOS PM2, the 3rd
PMOS PM3, the 3rd current source I3, the 3rd phase inverter and the second electric capacity C2, the first NMOS tube NM1 grid leak short circuit simultaneously connect the
The drain electrode of three current source I3, the second NMOS tube NM2 and the 3rd NMOS tube NM3 grid and the 4th NMOS tube NM4, the 4th NMOS
Pipe NM4 grid as the timing module control end；First PMOS PM1 grid leak short circuit simultaneously connects the second NMOS tube
NM2 and the 3rd PMOS PM3 drain electrode and the second PMOS PM2 grid；The input of 3rd phase inverter is used as the meter
When module control end, its output end connect the 3rd PMOS PM3 grid；Second PMOS PM2's and the 3rd NMOS tube NM3
Drain interconnection and as the output end of the timing module, the second electric capacity C2 is connected on the output end and ground of the timing module
Between；First PMOS PM1, the second PMOS PM2 and the 3rd PMOS PM3 source electrode connect supply voltage, the first NMO S pipes NM1,
Second NMOS tube NM2, the 3rd NMOS tube NM3 and the 4th NMOS tube NM4 source ground.
The concrete operating principle of timing module is in the present embodiment：Timing module utilizes electricity during the second electric capacity C2 discharge and recharges
Bucklingization inputs different voltages to the first hysteresis comparator and the second hysteresis comparator, makes the R of its output end, i.e. rest-set flip-flop
Input, S inputs control rest-set flip-flop, the signal that on the one hand rest-set flip-flop is exported by QB output ends by various combination mode
Control counter works, the output signal OT_OUT of output control circuit, and the signal on the other hand exported by Q output feeds back
Timing module is returned to control second point electric capacity C2 charging and discharging states.When it is high to enable signal EN, signal EN reverse letter is enabled
Number ENB is low, and timing module is started working, and is that the voltage V2 on the second electric capacity C2 chargings, the second electric capacity C2 constantly increases, works as V2
During less than V1 and less than the first reference voltage V REF1, rest-set flip-flop is set to 0, and counter does not work, the fed back in timing module
Three PMOS PM3 are turned off, and the PMOS current mirrors that the first PMOS PM1 and the second PMOS PM2 are constituted continue to the second electric capacity C2
Charging；As voltage V2 constantly increases, when V2 is more than the first reference voltage V REF1 and is less than V1, state is constant；When voltage increases
When being added to V2 more than V1, rest-set flip-flop puts 1, and counter works, the 3rd PMOS PM3 fed back in timing module is turned on, the
The PMOS current mirrors that one PMOS PM1 and the second PMOS PM2 is constituted stop charging to the second electric capacity C2, and the second electric capacity C2 passes through
NMOS current mirrors discharge, and capacitance voltage V2 starts reduction；When V2 is less than V1 and is more than the first reference voltage V REF1, RS triggerings
Device state remains unchanged；When V2 is less than VREF1, rest-set flip-flop is set to 0 again.Constantly circulation, works as counter in this manner
When counting the full time, the output end OT_OUT output high level of control circuit shows to reach ON time.
One of ordinary skill in the art can make various do not depart from originally according to these technical inspirations disclosed by the invention
The other various specific deformations and combination of essence are invented, these deformations and combination are still within the scope of the present invention.
Claims (3)
1. a kind of adjustable control circuit of ON time, it is characterised in that including ON time adjusting module, timing module,
One phase inverter, the second phase inverter, the first hysteresis comparator, the second hysteresis comparator, rest-set flip-flop and counter,
The input of the ON time adjusting module is used as the ON time control end of the control circuit, the connection of its Enable Pin
Signal (EN) is enabled, its output end connects the positive input terminal of the first hysteresis comparator；
The input connection of first phase inverter enables signal (EN), and its output end connects the Enable Pin of the timing module,
Its output end connects the negative input end of first hysteresis comparator and the positive input terminal of the second hysteresis comparator, the first sluggish ratio
Enable Pin connection compared with device enables signal (EN), and its output end connects the R input of rest-set flip-flop；
The negative input end of second hysteresis comparator connects the first reference voltage (VREF1), and the S of its output end connection rest-set flip-flop is defeated
Enter end, the clear terminal connection of rest-set flip-flop enables signal (EN), and its Q output connects the control end of timing module, its QB outputs
The input of the second phase inverter of end connection, the input of counter connects the output end of the second phase inverter, and its output end is used as institute
State the output end of control circuit；
The ON time adjusting module includes first resistor (R1), second resistance (R2), 3rd resistor (R3), the 4th resistance
(R4), the first electric capacity (C1), the first current source (I1), the second current source (I2), the 3rd hysteresis comparator and data selector,
First resistor (R1) one end is used as the input of the ON time adjusting module, the other end the first current source of connection
(I1), the negative input end of the 3rd hysteresis comparator and the first data input pin of data selector and by second resistance (R2) after
Ground connection；The positive input terminal of 3rd hysteresis comparator connects the second reference voltage (VREF2), and the connection of its Enable Pin enables signal
(EN), its output end connects the address input end of data selector；The electricity of the second data input pin connection second of data selector
Stream source (I2) is simultaneously grounded afterwards by 3rd resistor (R3), and its output end connects one end of the 4th resistance (R4), the 4th resistance (R4)
The other end as the ON time adjusting module output end and pass through the first electric capacity (C1) be grounded.
2. the adjustable control circuit of ON time according to claim 1, it is characterised in that the timing module includes the
One NMOS tube (NM1), the second NMOS tube (NM2), the 3rd NMOS tube (NM3), the 4th NMOS tube (NM4), the first PMOS
(PM1), the second PMOS (PM2), the 3rd PMOS (PM3), the 3rd current source (I3), the 3rd phase inverter and the second electric capacity
(C2),
The grid leak short circuit of first NMOS tube (NM1) simultaneously connects the 3rd current source (I3), the second NMOS tube (NM2) and the 3rd NMOS tube
(NM3) grid and the drain electrode of the 4th NMOS tube (NM4), the grid of the 4th NMOS tube (NM4) are used as the timing module
Control end；The grid leak short circuit of first PMOS (PM1) and the drain electrode for connecting the second NMOS tube (NM2) and the 3rd PMOS (PM3)
And second PMOS (PM2) grid；The input of 3rd phase inverter is used as the control end of the timing module, its output end
Connect the grid of the 3rd PMOS (PM3)；The drain interconnection of second PMOS (PM2) and the 3rd NMOS tube (NM3) is simultaneously used as institute
The output end of timing module is stated, the second electric capacity (C2) is connected between the output end of the timing module and ground；First PMOS
(PM1), the source electrode of the second PMOS (PM2) and the 3rd PMOS (PM3) connects supply voltage, the first NMO S pipes (NM1), second
The source ground of NMOS tube (NM2), the 3rd NMOS tube (NM3) and the 4th NMOS tube (NM4).
3. the adjustable control circuit of ON time according to claim 1, it is characterised in that when need not be to ON time
The ON time control end of the control circuit is hanging when being adjusted；The control when needing to be adjusted ON time
The ON time control end outer meeting resistance of circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710589186.2A CN107181395B (en) | 2017-07-19 | 2017-07-19 | A kind of adjustable control circuit of turn-on time |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710589186.2A CN107181395B (en) | 2017-07-19 | 2017-07-19 | A kind of adjustable control circuit of turn-on time |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN107181395A true CN107181395A (en) | 2017-09-19 |
| CN107181395B CN107181395B (en) | 2019-03-29 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201710589186.2A Expired - Fee Related CN107181395B (en) | 2017-07-19 | 2017-07-19 | A kind of adjustable control circuit of turn-on time |
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| Country | Link |
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| CN (1) | CN107181395B (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110708048A (en) * | 2019-12-16 | 2020-01-17 | 峰岹科技（深圳）有限公司 | Hysteresis comparator circuit |
| CN110752836A (en) * | 2019-09-11 | 2020-02-04 | 上海智浦欣微电子有限公司 | Signal control circuit and driving signal generating circuit |
| CN116760396A (en) * | 2023-07-28 | 2023-09-15 | 武汉景捷半导体有限公司 | Control circuit, method and system of bat and readable storage medium |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103401421A (en) * | 2013-07-30 | 2013-11-20 | 浙江大学 | Control circuit for Boost converter |
| US20160268905A1 (en) * | 2012-04-27 | 2016-09-15 | Stmicroelectronics S.R.L. | Control circuit with hysteresis for a switching voltage regulator and related control method |
| CN106899207A (en) * | 2017-05-10 | 2017-06-27 | 哈尔滨理工大学 | The modified constant on-time control method of no-load voltage ratio DC-DC down-converter high |
-
2017
- 2017-07-19 CN CN201710589186.2A patent/CN107181395B/en not_active Expired - Fee Related
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20160268905A1 (en) * | 2012-04-27 | 2016-09-15 | Stmicroelectronics S.R.L. | Control circuit with hysteresis for a switching voltage regulator and related control method |
| CN103401421A (en) * | 2013-07-30 | 2013-11-20 | 浙江大学 | Control circuit for Boost converter |
| CN106899207A (en) * | 2017-05-10 | 2017-06-27 | 哈尔滨理工大学 | The modified constant on-time control method of no-load voltage ratio DC-DC down-converter high |
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110752836A (en) * | 2019-09-11 | 2020-02-04 | 上海智浦欣微电子有限公司 | Signal control circuit and driving signal generating circuit |
| CN110752836B (en) * | 2019-09-11 | 2023-08-18 | 上海智浦欣微电子有限公司 | Signal control circuit and driving signal generation circuit |
| CN110708048A (en) * | 2019-12-16 | 2020-01-17 | 峰岹科技（深圳）有限公司 | Hysteresis comparator circuit |
| CN110708048B (en) * | 2019-12-16 | 2020-04-24 | 峰岹科技（深圳）有限公司 | Hysteresis comparator circuit |
| CN116760396A (en) * | 2023-07-28 | 2023-09-15 | 武汉景捷半导体有限公司 | Control circuit, method and system of bat and readable storage medium |
| CN116760396B (en) * | 2023-07-28 | 2024-01-26 | 武汉景捷半导体有限公司 | Control circuit, method and system of bat and readable storage medium |
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|---|---|
| CN107181395B (en) | 2019-03-29 |
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